[mlir] Fix the names of exported functionsThe names of the functions that are supposed to be exported do not match the implementations. This is due in part to https://github.com/llvm/llvm-project/c
[mlir] Fix the names of exported functionsThe names of the functions that are supposed to be exported do not match the implementations. This is due in part to https://github.com/llvm/llvm-project/commit/cac7aabbd8236bef2909bfc0dbba17644f7aaade.This change makes the implementations and declarations match and adds a couple missing declarations.The new names follow the pattern of the existing `verify` functions where the prefix is maintained as `_mlir_ciface_` but the suffix follows the new naming convention.Reviewed By: rriddleDifferential Revision: https://reviews.llvm.org/D124891
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[mlir][NFC] Update textual references of `func` to `func.func` in Integration testsThe special case parsing of `func` operations is being removed.
[mlir] Split out a new ControlFlow dialect from StandardThis dialect is intended to model lower level/branch based control-flow constructs. The initial setof operations are: AssertOp, BranchOp, Co
[mlir] Split out a new ControlFlow dialect from StandardThis dialect is intended to model lower level/branch based control-flow constructs. The initial setof operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the currentstandard dialect.See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061Differential Revision: https://reviews.llvm.org/D118966
[mlir][GPUtoNVVM] Relax restriction on wmma op loweringAllow lowering of wmma ops with 64bits indexes. Change the defaultversion of the test to use default layout.Differential Revision: https://
[mlir][GPUtoNVVM] Relax restriction on wmma op loweringAllow lowering of wmma ops with 64bits indexes. Change the defaultversion of the test to use default layout.Differential Revision: https://reviews.llvm.org/D112479
[MLIR] Replace std ops with arith dialect opsPrecursor: https://reviews.llvm.org/D110200Removed redundant ops from the standard dialect that were moved to the`arith` or `math` dialects.Renamed
[MLIR] Replace std ops with arith dialect opsPrecursor: https://reviews.llvm.org/D110200Removed redundant ops from the standard dialect that were moved to the`arith` or `math` dialects.Renamed all instances of operations in the codebase and in tests.Reviewed By: rriddle, jpienaarDifferential Revision: https://reviews.llvm.org/D110797
[mlir] Clean up boolean flags usage in LIT tests* Call `llvm_canonicalize_cmake_booleans` for all CMake options, which are propagated to `lit.local.cfg` files.* Use Python native boolean values
[mlir] Clean up boolean flags usage in LIT tests* Call `llvm_canonicalize_cmake_booleans` for all CMake options, which are propagated to `lit.local.cfg` files.* Use Python native boolean values instead of strings for such options.This fixes the cases, when CMake variables have values other than `ON` (like `TRUE`).This might happen due to IDE integration or due to CMake preset usage.Reviewed By: ftynseDifferential Revision: https://reviews.llvm.org/D110073
[mlir][NFC] Don't outline kernel in MMA integration testsThis matches better how other gpu integration tests are done.Differential Revision: https://reviews.llvm.org/D103099
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.In order to allow large matmul operations using the MMA ops we need to chainoperations this is not possible unless "DOp" and
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.In order to allow large matmul operations using the MMA ops we need to chainoperations this is not possible unless "DOp" and "COp" type have matchinglayout so remove the "DOp" layout and force accumulator and result type tomatch.Added a test for the case where the MMA value is accumulated.Differential Revision: https://reviews.llvm.org/D103023
[mlir] Lower sm version for TensorCore intergration testsThose tests only require sm70, this allows to run those integrationtests on more hardware.Differential Revision: https://reviews.llvm.org
[mlir] Lower sm version for TensorCore intergration testsThose tests only require sm70, this allows to run those integrationtests on more hardware.Differential Revision: https://reviews.llvm.org/D103049
[MLIR][GPU] Add CUDA Tensor core WMMA testAdd a test case to test the complete execution of WMMA ops on a NvidiaGPU with tensor cores. These tests are enabled underMLIR_RUN_CUDA_TENSOR_CORE_TESTS
[MLIR][GPU] Add CUDA Tensor core WMMA testAdd a test case to test the complete execution of WMMA ops on a NvidiaGPU with tensor cores. These tests are enabled underMLIR_RUN_CUDA_TENSOR_CORE_TESTS.Reviewed By: bondhugulaDifferential Revision: https://reviews.llvm.org/D95334