[mlir] Fix the names of exported functionsThe names of the functions that are supposed to be exported do not match the implementations. This is due in part to https://github.com/llvm/llvm-project/c
[mlir] Fix the names of exported functionsThe names of the functions that are supposed to be exported do not match the implementations. This is due in part to https://github.com/llvm/llvm-project/commit/cac7aabbd8236bef2909bfc0dbba17644f7aaade.This change makes the implementations and declarations match and adds a couple missing declarations.The new names follow the pattern of the existing `verify` functions where the prefix is maintained as `_mlir_ciface_` but the suffix follows the new naming convention.Reviewed By: rriddleDifferential Revision: https://reviews.llvm.org/D124891
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[mlir][NFC] Update textual references of `func` to `func.func` in Integration testsThe special case parsing of `func` operations is being removed.
[mlir][NFC] Rename StandardToLLVM to FuncToLLVMThe current StandardToLLVM conversion patterns only really handlethe Func dialect. The pass itself adds patterns for Arithmetic/CFToLLVM, butthose s
[mlir][NFC] Rename StandardToLLVM to FuncToLLVMThe current StandardToLLVM conversion patterns only really handlethe Func dialect. The pass itself adds patterns for Arithmetic/CFToLLVM, butthose should be/will be split out in a followup. This commit focuses solelyon being an NFC rename.Aside from the directory change, the pattern and pass creation API have been renamed: * populateStdToLLVMFuncOpConversionPattern -> populateFuncToLLVMFuncOpConversionPattern * populateStdToLLVMConversionPatterns -> populateFuncToLLVMConversionPatterns * createLowerToLLVMPass -> createConvertFuncToLLVMPassDifferential Revision: https://reviews.llvm.org/D120778
[mlir] Split out a new ControlFlow dialect from StandardThis dialect is intended to model lower level/branch based control-flow constructs. The initial setof operations are: AssertOp, BranchOp, Co
[mlir] Split out a new ControlFlow dialect from StandardThis dialect is intended to model lower level/branch based control-flow constructs. The initial setof operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the currentstandard dialect.See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061Differential Revision: https://reviews.llvm.org/D118966
[mlir] Replace StrEnumAttr -> EnumAttr in core dialectsRemoves uses of `StrEnumAttr` in core dialectsReviewed By: mehdi_amini, rriddleDifferential Revision: https://reviews.llvm.org/D117514
[mlir][GPUtoNVVM] Relax restriction on wmma op loweringAllow lowering of wmma ops with 64bits indexes. Change the defaultversion of the test to use default layout.Differential Revision: https://
[mlir][GPUtoNVVM] Relax restriction on wmma op loweringAllow lowering of wmma ops with 64bits indexes. Change the defaultversion of the test to use default layout.Differential Revision: https://reviews.llvm.org/D112479
[MLIR] Replace std ops with arith dialect opsPrecursor: https://reviews.llvm.org/D110200Removed redundant ops from the standard dialect that were moved to the`arith` or `math` dialects.Renamed
[MLIR] Replace std ops with arith dialect opsPrecursor: https://reviews.llvm.org/D110200Removed redundant ops from the standard dialect that were moved to the`arith` or `math` dialects.Renamed all instances of operations in the codebase and in tests.Reviewed By: rriddle, jpienaarDifferential Revision: https://reviews.llvm.org/D110797
[mlir] Clean up boolean flags usage in LIT tests* Call `llvm_canonicalize_cmake_booleans` for all CMake options, which are propagated to `lit.local.cfg` files.* Use Python native boolean values
[mlir] Clean up boolean flags usage in LIT tests* Call `llvm_canonicalize_cmake_booleans` for all CMake options, which are propagated to `lit.local.cfg` files.* Use Python native boolean values instead of strings for such options.This fixes the cases, when CMake variables have values other than `ON` (like `TRUE`).This might happen due to IDE integration or due to CMake preset usage.Reviewed By: ftynseDifferential Revision: https://reviews.llvm.org/D110073
[mlir][NFC] Don't outline kernel in MMA integration testsThis matches better how other gpu integration tests are done.Differential Revision: https://reviews.llvm.org/D103099
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.In order to allow large matmul operations using the MMA ops we need to chainoperations this is not possible unless "DOp" and
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.In order to allow large matmul operations using the MMA ops we need to chainoperations this is not possible unless "DOp" and "COp" type have matchinglayout so remove the "DOp" layout and force accumulator and result type tomatch.Added a test for the case where the MMA value is accumulated.Differential Revision: https://reviews.llvm.org/D103023
[mlir] Lower sm version for TensorCore intergration testsThose tests only require sm70, this allows to run those integrationtests on more hardware.Differential Revision: https://reviews.llvm.org
[mlir] Lower sm version for TensorCore intergration testsThose tests only require sm70, this allows to run those integrationtests on more hardware.Differential Revision: https://reviews.llvm.org/D103049
[MLIR][GPU] Add CUDA Tensor core WMMA testAdd a test case to test the complete execution of WMMA ops on a NvidiaGPU with tensor cores. These tests are enabled underMLIR_RUN_CUDA_TENSOR_CORE_TESTS
[MLIR][GPU] Add CUDA Tensor core WMMA testAdd a test case to test the complete execution of WMMA ops on a NvidiaGPU with tensor cores. These tests are enabled underMLIR_RUN_CUDA_TENSOR_CORE_TESTS.Reviewed By: bondhugulaDifferential Revision: https://reviews.llvm.org/D95334
[mlir] Convert async dialect passes from function passes to op agnostic passesDifferential Revision: https://reviews.llvm.org/D100401
[mlir] Fix cuda integration test failure
[mlir] Remove mlir-rocm-runnerThis change combines for ROCm what was done for CUDA in D97463, D98203, D98360, and D98396.I did not try to compile SerializeToHsaco.cpp or test mlir/test/Integratio
[mlir] Remove mlir-rocm-runnerThis change combines for ROCm what was done for CUDA in D97463, D98203, D98360, and D98396.I did not try to compile SerializeToHsaco.cpp or test mlir/test/Integration/GPU/ROCM because I don't have an AMD card. I fixed the things that had obvious bit-rot though.Reviewed By: whchungDifferential Revision: https://reviews.llvm.org/D98447
[mlir] Add vector op support to cuda-runner including vector.printDifferential Revision: https://reviews.llvm.org/D97346
[mlir] fix integration tests post e2310704d890ad252aeb1ca28b4b84d29514b1d1The commit in question moved some ops across dialects but did not updatesome of the target-specific integration tests that
[mlir] fix integration tests post e2310704d890ad252aeb1ca28b4b84d29514b1d1The commit in question moved some ops across dialects but did not updatesome of the target-specific integration tests that use these ops,presumably because the corresponding target hardware was not available.Fix these tests.
[mlir] Remove mlir-cuda-runnerChange CUDA integration tests to use mlir-opt + mlir-cpu-runner instead.Depends On D98203Reviewed By: herhutDifferential Revision: https://reviews.llvm.org/D98396
[mlir] Add NVVM to CUBIN conversion to mlir-optIf MLIR_CUDA_RUNNER_ENABLED, register a 'gpu-to-cubin' conversion pass to mlir-opt.The next step is to switch CUDA integration tests from mlir-cuda-
[mlir] Add NVVM to CUBIN conversion to mlir-optIf MLIR_CUDA_RUNNER_ENABLED, register a 'gpu-to-cubin' conversion pass to mlir-opt.The next step is to switch CUDA integration tests from mlir-cuda-runner to mlir-opt + mlir-cpu-runner and remove mlir-cuda-runner.Depends On D98279Reviewed By: herhut, rriddle, mehdi_aminiDifferential Revision: https://reviews.llvm.org/D98203
[mlir] Move cuda testsMove test inputs to test/Integration directory.Move runtime wrappers to ExecutionEngine.Reviewed By: mehdi_aminiDifferential Revision: https://reviews.llvm.org/D97463