sys/dev: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using misidentified many licenses so this was mostly a manual - error
sys/dev: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using misidentified many licenses so this was mostly a manual - errorprone - task.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.
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sys/dev: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 3-Clause license.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier
sys/dev: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 3-Clause license.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.Special thanks to Wind River for providing access to "The Duke ofHighlander" tool: an older (2014) run over FreeBSD tree was useful as astarting point.
spdx: initial adoption of licensing ID tags.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensou
spdx: initial adoption of licensing ID tags.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.Special thanks to Wind River for providing access to "The Duke ofHighlander" tool: an older (2014) run over FreeBSD tree was useful as astarting point.Initially, only tag files that use BSD 4-Clause "Original" license.RelNotes: yesDifferential Revision: https://reviews.freebsd.org/D13133
Renumber copyright clause 4Renumber cluase 4 to 3, per what everybody else did when BSD grantedthem permission to remove clause 3. My insistance on keeping the samenumbering for legal reasons is
Renumber copyright clause 4Renumber cluase 4 to 3, per what everybody else did when BSD grantedthem permission to remove clause 3. My insistance on keeping the samenumbering for legal reasons is too pedantic, so give up on that point.Submitted by: Jan Schaumann <[email protected]>Pull Request: https://github.com/freebsd/freebsd/pull/96
- Remove i8255.h because it's pc98 device.- rsa.h is for both RSA-DV/S ISA and RSA-98III CBUS, but there is no RSA-DV/S support. So it can be removed.
Remove pc98 support completely.I thank all developers and contributors for pc98.Relnotes: yes
Add receiver timeout interrupt enable bit implemented in somesystem on chips.Submitted by: kanSponsored by: DARPA, AFRL
Add support for UART found in the Ingenic XBurst system on chips.These CPUs has non-standard UART enable bit hidden in the UART FIFOControl Register.Sponsored by: DARPA, AFRL
sys/dev: minor spelling fixes.Most affect comments, very few have user-visible effects.
- Add support for Advantech PCI-1602 Rev. B1 and PCI-1603 cards. [1]- Add a description of Advantech PCI-1602 Rev. A boards. [1]- Properly set up REG_ACR also for PCI-1602 Rev. A based on what the
- Add support for Advantech PCI-1602 Rev. B1 and PCI-1603 cards. [1]- Add a description of Advantech PCI-1602 Rev. A boards. [1]- Properly set up REG_ACR also for PCI-1602 Rev. A based on what the Advantech-supplied Linux driver does.- Additionally use the macros of <dev/ic/ns16550.h> to replace existing magic values and get rid of trivial comments.- Fix the style of some comments.PR: 205359 [1]Submitted by: Jan Mikkelsen (original patch) [1]
This should have been GC'd 6 years ago when ar(4) was removed.
Wait for DesignWare UART transfers completion before accessing line controlWhen using DW UART with BUSY detection it is necessary to waituntil all serial transfers are finished before manipulating
Wait for DesignWare UART transfers completion before accessing line controlWhen using DW UART with BUSY detection it is necessary to waituntil all serial transfers are finished before manipulating theline control. LCR will not be affected when UART is busy.In addition, if Divisor Latch Access Bit is being set in order tomodify UART divisors:1. We will get BUSY interrupt if interrupts are enabled.2. Because LCR will not be affected the THR and (even worse) IER contents will be corrupted. This will lead to console hang.Approved by: cognet (mentor)
Add support for A10 uart.A10 uart is derived from Synopsys DesignWare uart and requiresto read Uart Status Register when IIR_BUSY has detected.Also this change includes FDT check, where it checks
Add support for A10 uart.A10 uart is derived from Synopsys DesignWare uart and requiresto read Uart Status Register when IIR_BUSY has detected.Also this change includes FDT check, where it checks devicespecific properties defined in dts and sets the busy_detect variable.broken_txfifo is also needed to be set in order to make it work forA10 uart case.Reviewed by: marcel@Approved by: gonzo@
Merge from projects/mips to head by hand:Defintions for cavium uart (do they belong here?)
add %b formats for various registers
- Cleanup i8251 related defines.- Move i8255 related defines into a separate file.
unifdef PC98
Support for Freescale QUad Integrated Communications Controller.The QUICC engine is found on various Freescale parts including MPC85xx, andprovides multiple generic time-division serial channel re
Support for Freescale QUad Integrated Communications Controller.The QUICC engine is found on various Freescale parts including MPC85xx, andprovides multiple generic time-division serial channel resources, which are inturn muxed/demuxed by the Serial Communications Controller (SCC).Along with core QUICC/SCC functionality a uart(4)-compliant device driver isprovided which allows for serial ports over QUICC/SCC.Approved by: cognet (mentor)Obtained from: JuniperMFp4: e500
Fix style nits. No md5 changes in .o's. ;-)
Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4.Use it to reset controller and to select data rate. According to Intel80277AA datasheet, software reset behaves the same a
Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4.Use it to reset controller and to select data rate. According to Intel80277AA datasheet, software reset behaves the same as DOR reset exceptthat it is self clearing. National Semiconductor PC8477B datasheet saysthe same. As a side effect, we no longer use Configuration ControlRegister (CCR) at 0x3f7 for these controllers, which is often missingin modern hardware.
Allow uart(4)'s ns8250 driver to work with devices whose regshift is > 0.- Rename REG_DL to REG_DLL and REG_DLH.- Always treat DLL and DLH as two separate 8-bit registers instead of one 16-bit r
Allow uart(4)'s ns8250 driver to work with devices whose regshift is > 0.- Rename REG_DL to REG_DLL and REG_DLH.- Always treat DLL and DLH as two separate 8-bit registers instead of one 16-bit register.Additionally, remove the probe for the high 4 bits of IER being 0 and don'tassume we can always read/write 0 to/from those bits.These changes allow uart(4) to drive the UARTs on the Intel XScale PXA255.Reviewed by: marcel
MFp4:Add CHAN_A & CHAN_B for channel register offsets.While here, fix a comment.
Register definitions for the ancient via6522. This 20+ year-old chipstill exists as a cell in the Macio asic on Apples, and is used to communicatethrough the shift register with the external PMU mi
Register definitions for the ancient via6522. This 20+ year-old chipstill exists as a cell in the Macio asic on Apples, and is used to communicatethrough the shift register with the external PMU microcontroller.
Typo.PR: misc/87679Submitted by: Alan Amesbury <amesbury umn.edu>
cosmetic change.
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