| eddfa7b1 | 19-Nov-2008 |
Marius Strobl <[email protected]> |
Given that the buffer dcons_crom(4) exposes is used for both input and output, set BUS_DMA_COHERENT when creating the DMA map used for loading the buffer. As a side-effect this solves locking issues
Given that the buffer dcons_crom(4) exposes is used for both input and output, set BUS_DMA_COHERENT when creating the DMA map used for loading the buffer. As a side-effect this solves locking issues on sparc64 when dcons(4) calls bus_dmamap_sync(9) while in an interrupt filter, which are executed in a critical section, and iommu(4) has to use a sleep lock when taking advantage of the streaming buffer.
Reported and tested by: kensmith Approved by: simokawa
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| 293b8475 | 08-Jun-2007 |
Hidetoshi Shimokawa <[email protected]> |
Add the address of IDT in the configuration ROM. (i386/amd64 only)
A change to dconschat(8) will follow so that it can bomb this address over FireWire to reset a wedged system.
Though this method i
Add the address of IDT in the configuration ROM. (i386/amd64 only)
A change to dconschat(8) will follow so that it can bomb this address over FireWire to reset a wedged system.
Though this method is just a hack and far from perfection, it should be useful if you don't want to go machine room just to reset or to power-cycle a machine without remote-managed power supply. And much better than doing: # fwcontrol -m target-eui64 # dd if=/dev/zero of=/dev/fwmem0.2 bs=1m
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