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Searched refs:Op0 (Results 1 – 25 of 156) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Analysis/
H A DInstructionSimplify.cpp304 if (Op0 && Op0->getOpcode() == Opcode) { in simplifyAssociativeBinOp()
348 if (Op0 && Op0->getOpcode() == Opcode) { in simplifyAssociativeBinOp()
645 return Op0; in simplifyAddInst()
763 return Op0; in simplifySubInst()
811 X = Op0; in simplifySubInst()
833 Z = Op0; in simplifySubInst()
901 return Op0; in simplifyMulInst()
983 return Op0; in simplifyDivRem()
1158 return Op0; in simplifyRem()
1182 return Op0; in simplifyRem()
[all …]
H A DOverflowInstAnalysis.cpp21 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow() argument
28 if (!match(Op0, m_ICmp(Pred, m_Value(X), m_Zero()))) in isCheckForZeroAndMulWithOverflow()
67 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow() argument
70 return isCheckForZeroAndMulWithOverflow(Op0, Op1, IsAnd, Y); in isCheckForZeroAndMulWithOverflow()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsubtract-from-one-hand-of-select.ll5 ; sub %Op0, (select %Cond, %TrueVal, %FalseVal)
7 ; select %Cond, (sub %Op0, %TrueVal), (sub %Op0, %FalseVal)
13 define i8 @t0_sub_from_trueval(i1 %c, i8 %Op0, i8 %FalseVal) {
20 %r = sub i8 %Op0, %o
30 %r = sub i8 %Op0, %o
42 %o = select i1 %c, <2 x i8> %Op0, <2 x i8> %FalseVal
43 %r = sub <2 x i8> %Op0, %o
51 define i8 @n3_extrause(i1 %c, i8 %Op0, i8 %FalseVal) {
58 %o = select i1 %c, i8 %Op0, i8 %FalseVal
60 %r = sub i8 %Op0, %o
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/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp238 if (Op0 == Op1) { in visitMul()
276 Y = Op0; in visitMul()
444 if (Op0 == Op1 && match(Op0, m_FAbs(m_Value(X)))) in foldFPSignBitOps()
585 Op0->hasNUses(2)) { in visitFMul()
648 Op0 != Y) { in visitFMul()
649 Value *XX = Builder.CreateFMulFMF(Op0, Op0, &I); in visitFMul()
665 Y = Op0; in visitFMul()
876 if (match(Op0, m_One())) { in commonIDivTransforms()
1355 if (isa<Constant>(Op0)) in visitFDiv()
1522 if (match(Op0, m_One())) { in visitURem()
[all …]
H A DInstCombineAddSub.cpp874 if (match(Op0, m_ZExt(m_Value(X))) && in foldAddWithConstant()
878 if (match(Op0, m_SExt(m_Value(X))) && in foldAddWithConstant()
883 if (match(Op0, m_Not(m_Value(X)))) in foldAddWithConstant()
952 if (C->isOne() && Op0->hasOneUse()) { in foldAddWithConstant()
1247 if (!Op0 || !Op1 || !(Op0->hasOneUse() || Op1->hasOneUse())) in factorizeMathWithShlOps()
1756 Value *Op0 = I.getOperand(0); in foldSubOfMinMax() local
1837 if (match(Op0, m_ImmConstant(C))) { in visitSub()
1889 if (match(Op0, m_AllOnes())) in visitSub()
1917 if (isFreeToInvert(Op0, Op0->hasOneUse()) && in visitSub()
2131 if (match(Op0, m_Not(m_Value(X))) && in visitSub()
[all …]
H A DInstCombineShifts.cpp375 assert(Op0->getType() == Op1->getType()); in commonShiftTransforms()
390 if (isa<Constant>(Op0)) in commonShiftTransforms()
407 if (match(Op0, m_Constant(C)) && in commonShiftTransforms()
762 if (!Op0->hasOneUse()) in FoldShiftByConstant()
1050 if (match(Op0, m_One()) && in visitShl()
1101 if (Op0->hasOneUse()) { in visitLShr()
1116 if (Op0->hasOneUse()) { in visitLShr()
1134 if (match(Op0, in visitLShr()
1154 if (match(Op0, m_SExt(m_Value(X)))) { in visitLShr()
1164 Op0->hasOneUse()) { in visitLShr()
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H A DInstCombineAndOrXor.cpp1284 std::swap(Op0, Op1); in reassociateFCmps()
1678 if (match(Op0, in foldComplexAndOrPatterns()
1791 And->takeName(Op0); in visitAnd()
1805 And->takeName(Op0); in visitAnd()
2319 std::swap(Op0, Op1); in matchOrConcat()
2885 std::swap(Op0, Op1); in visitOr()
2895 if (Op0 == A || Op0 == B) in visitOr()
2920 if ((Op0 == B->getOperand(0) || Op0 == B->getOperand(1)) && in visitOr()
2930 std::swap(Op0, Op1); in visitOr()
3372 if (Op0->hasNUses(2)) in canonicalizeAbs()
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H A DInstCombineCompares.cpp4172 if ((C == Op0 || D == Op0) && NoOp1WrapProblem) in foldICmpBinOp()
4515 std::swap(Op0, X); in foldICmpWithMinMax()
4626 if (match(Op1, m_Xor(m_Value(A), m_Value(B))) && (A == Op0 || B == Op0)) { in foldICmpEquality()
4678 if ((Op0->hasOneUse() && match(Op0, m_ZExt(m_Value(A))) && in foldICmpEquality()
4762 m_OneUse(m_c_And(m_Neg(m_Specific(Op0)), m_Specific(Op0))))) in foldICmpEquality()
4763 A = Op0; in foldICmpEquality()
5626 LHS = Op0; in foldICmpUsingKnownBits()
6046 Pred == ICmpInst::ICMP_UGT && (Op0 == A || Op0 == B)) in foldICmpOfUAddOv()
6134 std::swap(Op0, Op1); in visitICmpInst()
6768 if (Op0 == Op1) { in visitFCmpInst()
[all …]
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DConstraintElimination.cpp70 Value *Op0; member
74 : Pred(Pred), Op0(Op0), Op1(Op1) {} in PreconditionTy()
202 Value *Op0, *Op1; in decompose() local
237 {1, Op0}}; in decompose()
249 Value *Op0; in decompose() local
250 if (match(V, m_ZExt(m_Value(Op0)))) in decompose()
251 V = Op0; in decompose()
261 CmpInst::ICMP_UGE, Op0, in decompose()
287 std::swap(Op0, Op1); in getConstraint()
302 std::swap(Op0, Op1); in getConstraint()
[all …]
H A DScalarizer.cpp539 Value *Op0 = VOp0[Elem]; in splitBinary() local
643 Value *Op0 = VOp0[I]; in visitSelectInst() local
650 Value *Op0 = SI.getOperand(0); in visitSelectInst() local
689 Value *Op0 = GEPI.getOperand(0); in visitGetElementPtrInst() local
690 if (!Op0->getType()->isVectorTy()) in visitGetElementPtrInst()
691 Op0 = Builder.CreateVectorSplat(NumElems, Op0); in visitGetElementPtrInst()
692 Scatterer Base = scatter(&GEPI, Op0); in visitGetElementPtrInst()
766 Value *V = Op0[Op0I]; in visitBitCastInst()
822 Value *OldElt = Op0[I]; in visitInsertElementInst()
856 Value *Elt = Op0[I]; in visitExtractElementInst()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZTDC.cpp127 Value *Op0 = I.getOperand(0); in convertFCmp() local
134 auto &Sem = Op0->getType()->getFltSemantics(); in convertFCmp()
220 if (CallInst *CI = dyn_cast<CallInst>(Op0)) { in convertFCmp()
226 Op0 = CI->getArgOperand(0); in convertFCmp()
233 converted(&I, Op0, Mask, Worthy); in convertFCmp()
237 Value *Op0 = I.getOperand(0); in convertICmp() local
243 if (auto *Cast = dyn_cast<BitCastInst>(Op0)) { in convertICmp()
263 } else if (auto *CI = dyn_cast<CallInst>(Op0)) { in convertICmp()
292 Value *Op0, *Op1; in convertLogicOp() local
297 if (Op0 != Op1) in convertLogicOp()
[all …]
H A DSystemZISelLowering.cpp41 SDValue Op0, Op1; member
2499 C.Op0 = C.Op0.getOperand(0); in adjustICmpTruncate()
2632 NewC.Op0 = C.Op0.getOperand(0); in adjustForTestUnderMask()
2676 NewC.Op0 = NewC.Op0.getOperand(0); in adjustForTestUnderMask()
2687 NewC.Op0 = NewC.Op0.getOperand(0); in adjustForTestUnderMask()
2698 C.Op0 = NewC.Op0; in adjustForTestUnderMask()
2721 C.Op0 = C.Op0.getOperand(0); in adjustForRedundantAnd()
2861 Op0 = DAG.getNode(Extend, DL, MVT::i64, Op0); in lowerMUL_LOHI32()
4770 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0); in getPermuteNode()
6276 Op0 = Op0.getOperand(0); in combineMERGE()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp142 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
144 Ops[1].getAsInteger(10, Op0); in parseGenericRegister()
149 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in parseGenericRegister()
156 uint32_t Op0 = (Bits >> 14) & 0x3; in genericRegisterString() local
162 return "S" + utostr(Op0) + "_" + utostr(Op1) + "_C" + utostr(CRn) + "_C" + in genericRegisterString()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DFastISel.h357 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
361 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
375 Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm,
396 const TargetRegisterClass *RC, unsigned Op0);
401 const TargetRegisterClass *RC, unsigned Op0,
407 const TargetRegisterClass *RC, unsigned Op0,
413 const TargetRegisterClass *RC, unsigned Op0,
419 const TargetRegisterClass *RC, unsigned Op0,
431 const TargetRegisterClass *RC, unsigned Op0,
441 Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNVOPDUtils.cpp105 const MachineOperand &Op0 = Comp.MI.getOperand(1); in checkVOPDRegConstraints() local
106 if (Op0.isReg()) { in checkVOPDRegConstraints()
107 if (!TRI->isVectorRegister(MRI, Op0.getReg())) { in checkVOPDRegConstraints()
108 if (!is_contained(UniqueScalarRegs, Op0.getReg())) in checkVOPDRegConstraints()
109 UniqueScalarRegs.push_back(Op0.getReg()); in checkVOPDRegConstraints()
111 Comp.Reg0 = Op0.getReg(); in checkVOPDRegConstraints()
114 addLiteral(Op0); in checkVOPDRegConstraints()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1931 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_r()
1952 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rr()
1957 .addReg(Op0) in fastEmitInst_rr()
1961 .addReg(Op0) in fastEmitInst_rr()
1975 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rrr()
1981 .addReg(Op0) in fastEmitInst_rrr()
1986 .addReg(Op0) in fastEmitInst_rrr()
2001 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_ri()
2005 .addReg(Op0) in fastEmitInst_ri()
2023 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rii()
[all …]
H A DTargetLowering.cpp1337 Op0 = DemandedOp0 ? DemandedOp0 : Op0; in SimplifyDemandedBits()
1372 if (isBitwiseNot(Op0) && Op0.hasOneUse() && in SimplifyDemandedBits()
1435 Op0 = DemandedOp0 ? DemandedOp0 : Op0; in SimplifyDemandedBits()
1478 Op0 = DemandedOp0 ? DemandedOp0 : Op0; in SimplifyDemandedBits()
1605 Op0 = DemandedOp0 ? DemandedOp0 : Op0; in SimplifyDemandedBits()
2613 Op0 = DemandedOp0 ? DemandedOp0 : Op0; in SimplifyDemandedBits()
3304 if (Op0 == Op1 && Op->isOnlyUserOf(Op0.getNode())) { in SimplifyDemandedVectorElts()
4486 Op0 = Op0.getOperand(0); in SimplifySetCC()
6306 Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal); in prepareUREMEqFold()
6560 Op0 = DAG.getNode(ISD::ADD, DL, VT, Op0, AVal); in prepareSREMEqFold()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h226 void validateUnaryOp(const LLT Res, const LLT Op0);
227 void validateBinaryOp(const LLT Res, const LLT Op0, const LLT Op1);
228 void validateShiftOp(const LLT Res, const LLT Op0, const LLT Op1);
488 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1}); in buildPtrMask()
585 const SrcOp &Op0, const SrcOp &Op1, in buildUAdde() argument
588 {Op0, Op1, CarryIn}); in buildUAdde()
593 const SrcOp &Op0, const SrcOp &Op1, in buildUSube() argument
596 {Op0, Op1, CarryIn}); in buildUSube()
601 const SrcOp &Op0, const SrcOp &Op1, in buildSAdde() argument
604 {Op0, Op1, CarryIn}); in buildSAdde()
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/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFAdjustOpt.cpp124 Value *Op0 = Icmp->getOperand(0); in adjustICmpToBuiltin() local
125 if (!isa<TruncInst>(Op0)) in adjustICmpToBuiltin()
147 M, Intrinsic::bpf_compare, {Op0->getType(), ConstOp1->getType()}); in adjustICmpToBuiltin()
148 auto *NewInst = CallInst::Create(Fn, {Opcode, Op0, ConstOp1}); in adjustICmpToBuiltin()
180 Value *Op0, *Op1; in serializeICMPInBB() local
182 if (!match(&I, m_LogicalOr(m_Value(Op0), m_Value(Op1)))) in serializeICMPInBB()
184 auto *Icmp1 = dyn_cast<ICmpInst>(Op0); in serializeICMPInBB()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp629 auto *C0 = dyn_cast<Constant>(Op0); in simplifyX86extrq()
677 Builder.CreateBitCast(Op0, ShufTy), in simplifyX86extrq()
762 auto *C0 = dyn_cast<Constant>(Op0); in simplifyX86insertq()
1462 Value *Op0 = II.getArgOperand(0); in instCombineIntrinsic() local
1504 Value *Op0 = II.getArgOperand(0); in instCombineIntrinsic() local
1527 Value *Op0 = II.getArgOperand(0); in instCombineIntrinsic() local
1563 Value *Op0 = II.getArgOperand(0); in instCombineIntrinsic() local
1608 Value *Op0 = II.getArgOperand(0); in instCombineIntrinsic() local
1611 if (Op0 == Op1) { in instCombineIntrinsic()
1612 return IC.replaceInstUsesWith(II, Op0); in instCombineIntrinsic()
[all …]
H A DX86PartialReduction.cpp258 Value *Op0 = getZeroExtendedVal(Sub->getOperand(0)); in trySADReplacement() local
260 if (!Op0 || !Op1) in trySADReplacement()
291 Value *Zero = Constant::getNullValue(Op0->getType()); in trySADReplacement()
292 Op0 = Builder.CreateShuffleVector(Op0, Zero, ConcatMask); in trySADReplacement()
309 Value *ExtractOp0 = Builder.CreateShuffleVector(Op0, Op0, ExtractMask); in trySADReplacement()
310 Value *ExtractOp1 = Builder.CreateShuffleVector(Op1, Op0, ExtractMask); in trySADReplacement()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp165 assert((Res == Op0) && "type mismatch"); in validateUnaryOp()
171 assert((Res == Op0 && Res == Op1) && "type mismatch"); in validateBinaryOp()
177 assert((Res == Op0) && "type mismatch"); in validateShiftOp()
187 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}); in buildPtrAdd()
197 Res = Op0; in materializePtrAdd()
203 return buildPtrAdd(Res, Op0, Cst.getReg(0)); in materializePtrAdd()
213 return buildPtrMask(Res, Op0, MaskReg); in buildMaskLowPtrBits()
220 LLT Op0Ty = Op0.getLLTTy(*getMRI()); in buildPadVectorWithUndefElements()
228 auto Unmerge = buildUnmerge(Op0Ty.getElementType(), Op0); in buildPadVectorWithUndefElements()
243 LLT Op0Ty = Op0.getLLTTy(*getMRI()); in buildDeleteTrailingVectorElements()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DOverflowInstAnalysis.h38 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd,
40 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd);
/llvm-project-15.0.7/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp225 Value *Op0, *Op1; in matchAndOrChain() local
230 if (match(V, m_And(m_Value(Op0), m_One()))) { in matchAndOrChain()
232 return matchAndOrChain(Op0, MOps); in matchAndOrChain()
234 if (match(V, m_And(m_Value(Op0), m_Value(Op1)))) in matchAndOrChain()
235 return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps); in matchAndOrChain()
238 if (match(V, m_Or(m_Value(Op0), m_Value(Op1)))) in matchAndOrChain()
239 return matchAndOrChain(Op0, MOps) && matchAndOrChain(Op1, MOps); in matchAndOrChain()
333 Value *Op0 = I.getOperand(0); in tryToRecognizePopCount() local
337 if ((match(Op0, m_Mul(m_Value(MulOp0), m_SpecificInt(Mask01)))) && in tryToRecognizePopCount()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp296 auto Op0 = N->getOperand(0); in selectAddCarry() local
307 {Op0, Op1, SDValue(CA, 0)}); in selectAddCarry()
313 {Op0, Op1, SDValue(CA, 0)}); in selectAddCarry()
317 Dl, {Type0, Type1}, {Op0, Op1, Op2}); in selectAddCarry()
339 auto Op0 = N->getOperand(0); in selectSubCarry() local
350 {Op0, Op1, SDValue(CA, 0)}); in selectSubCarry()
356 {Op0, Op1, SDValue(CA, 0)}); in selectSubCarry()
361 Dl, {Type0, Type1}, {Op0, Op1, CarryIn}); in selectSubCarry()

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