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/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.h29 const MCSubtargetInfo &STI, raw_ostream &O) override;
35 const MCSubtargetInfo &STI, raw_ostream &O);
40 const MCSubtargetInfo &STI,
48 const MCSubtargetInfo &STI, raw_ostream &O);
97 const MCSubtargetInfo &STI,
119 printAdrLabelOperand<scale>(MI, OpNum, STI, O); in printAdrLabelOperand()
130 const MCSubtargetInfo &STI,
170 const MCSubtargetInfo &STI, raw_ostream &O);
215 const MCSubtargetInfo &STI, raw_ostream &O);
221 printThumbLdrLabelOperand(MI, OpNum, STI, O); in printThumbLdrLabelOperand()
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H A DARMTargetStreamer.cpp133 if (STI.getCPU() == "xscale") in getArchForCPU()
136 if (STI.hasFeature(ARM::HasV9_0aOps)) in getArchForCPU()
147 if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP)) in getArchForCPU()
156 else if (STI.hasFeature(ARM::HasV6Ops)) in getArchForCPU()
212 if (isV8M(STI)) { in emitTargetAttributes()
236 if (STI.hasFeature(ARM::HasV8Ops)) in emitTargetAttributes()
272 if (STI.hasFeature(ARM::FeatureVFP2_SP) && !STI.hasFeature(ARM::FeatureFP64)) in emitTargetAttributes()
276 if (STI.hasFeature(ARM::FeatureFP16)) in emitTargetAttributes()
279 if (STI.hasFeature(ARM::FeatureMP)) in emitTargetAttributes()
293 if (STI.hasFeature(ARM::FeatureHWDivARM) && !STI.hasFeature(ARM::HasV8Ops)) in emitTargetAttributes()
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H A DARMMCCodeEmitter.cpp68 return isThumb(STI) && STI.getFeatureBits()[ARM::FeatureThumb2]; in isThumb2()
483 if (isThumb2(STI)) { in NEONThumb2DataIPostEncoder()
503 if (isThumb2(STI)) { in NEONThumb2LoadStorePostEncoder()
517 if (isThumb2(STI)) { in NEONThumb2DupPostEncoder()
530 if (isThumb2(STI)) { in NEONThumb2V8PostEncoder()
542 if (isThumb2(STI)) { in VFPThumb2PostEncoder()
741 if (isThumb2(STI)) in getBranchTargetOpValue()
989 assert(!isThumb(STI) && !isThumb2(STI) && in getAddrModeImm12OpValue()
1000 if (isThumb2(STI)) in getAddrModeImm12OpValue()
1435 if (isThumb2(STI)) in getAddrMode5OpValue()
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H A DARMInstPrinter.cpp158 printRegisterList(MI, 4, STI, O); in printInst()
187 printRegisterList(MI, 4, STI, O); in printInst()
213 printRegisterList(MI, 4, STI, O); in printInst()
248 printRegisterList(MI, 3, STI, O); in printInst()
492 printOperand(MI, Op, STI, O); in printAddrMode2Operand()
565 printOperand(MI, Op, STI, O); in printAddrMode3Operand()
656 printOperand(MI, OpNum, STI, O); in printAddrMode5Operand()
680 printOperand(MI, OpNum, STI, O); in printAddrMode5FP16Operand()
1093 printOperand(MI, Op, STI, O); in printThumbAddrModeRROperand()
1115 printOperand(MI, Op, STI, O); in printThumbAddrModeImm5SOperand()
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.h74 const MCSubtargetInfo &STI, raw_ostream &O);
92 const MCSubtargetInfo &STI, raw_ostream &O);
94 const MCSubtargetInfo &STI, raw_ostream &O);
98 const MCSubtargetInfo &STI, raw_ostream &O);
100 const MCSubtargetInfo &STI, raw_ostream &O);
125 printOperand(MI, OpNum, STI, O); in printOperand()
142 const MCSubtargetInfo &STI, raw_ostream &O);
155 const MCSubtargetInfo &STI, raw_ostream &O);
157 const MCSubtargetInfo &STI, raw_ostream &O);
159 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DAMDGPUInstPrinter.cpp147 if (AMDGPU::isGFX10(STI)) { in printFlatOffset()
190 printSMEMOffset(MI, OpNo, STI, O); in printSMEMOffsetMod()
208 O << ((AMDGPU::isGFX940(STI) && in printCPol()
310 if (AMDGPU::isGFX10Plus(STI)) { in printSymbolicFormat()
321 if (isValidDfmtNfmt(Val, STI)) { in printSymbolicFormat()
333 O << getNfmtName(Nfmt, STI); in printSymbolicFormat()
419 if (AMDGPU::isSI(STI) || AMDGPU::isCI(STI)) in printVINTRPDst()
477 printImmediate16(Lo16, STI, O); in printImmediateV216()
560 if (AMDGPU::isGFX940(STI)) { in printBLGP()
882 if (!AMDGPU::isGFX10Plus(STI)) in printDPP8()
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H A DSIMCCodeEmitter.cpp39 const MCSubtargetInfo &STI) const;
142 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
178 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
214 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
286 uint32_t Encoding = getLit16Encoding(Lo16, STI); in getLitEncoding()
340 if (AMDGPU::isGFX11Plus(STI) && isVCMPX64(Desc)) { in encodeInstruction()
361 STI); in encodeInstruction()
387 if (getLitEncoding(Op, Desc.OpInfo[i], STI) != 255) in encodeInstruction()
423 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
433 assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset)); in getSMEMOffsetEncoding()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.h42 const MCSubtargetInfo &STI,
53 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
79 const MCSubtargetInfo &STI, raw_ostream &O);
84 const MCSubtargetInfo &STI, raw_ostream &O);
103 const MCSubtargetInfo &STI, raw_ostream &O);
130 const MCSubtargetInfo &STI, raw_ostream &O);
155 const MCSubtargetInfo &STI,
185 const MCSubtargetInfo &STI,
208 const MCSubtargetInfo &STI, raw_ostream &O);
212 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DAArch64MCCodeEmitter.cpp63 const MCSubtargetInfo &STI) const;
166 const MCSubtargetInfo &STI) const;
169 const MCSubtargetInfo &STI) const;
172 const MCSubtargetInfo &STI) const;
179 const MCSubtargetInfo &STI) const;
183 const MCSubtargetInfo &STI) const;
297 const MCSubtargetInfo &STI) const { in getCondBranchTargetOpValue()
367 const MCSubtargetInfo &STI) const { in getTestBranchTargetOpValue()
441 const MCSubtargetInfo &STI) const { in getFixedPointScaleOpValue()
521 const MCSubtargetInfo &STI) const { in EncodeMatrixTileListRegisterClass()
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/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.h35 bool isMicroMips(const MCSubtargetInfo &STI) const;
36 bool isMips32r6(const MCSubtargetInfo &STI) const;
58 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
78 const MCSubtargetInfo &STI) const;
82 const MCSubtargetInfo &STI) const;
182 const MCSubtargetInfo &STI) const;
186 const MCSubtargetInfo &STI) const;
191 const MCSubtargetInfo &STI) const;
245 const MCSubtargetInfo &STI) const;
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H A DMipsInstPrinter.cpp91 printSaveRestore(MI, STI, O); in printInst()
96 printSaveRestore(MI, STI, O); in printInst()
101 printSaveRestore(MI, STI, O); in printInst()
106 printSaveRestore(MI, STI, O); in printInst()
189 printOperand(MI, opNum, STI, O); in printUImm()
214 printOperand(MI, opNum + 1, STI, O); in printMemOperand()
216 printOperand(MI, opNum, STI, O); in printMemOperand()
225 printOperand(MI, opNum, STI, O); in printMemOperandEA()
227 printOperand(MI, opNum + 1, STI, O); in printMemOperandEA()
250 printOperand(&MI, OpNo, STI, OS); in printAlias()
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H A DMipsMCCodeEmitter.cpp123 return STI.getFeatureBits()[Mips::FeatureMips32r6]; in isMips32r6()
138 emitInstruction(Val >> 16, 2, STI, OS); in emitInstruction()
139 emitInstruction(Val, 2, STI, OS); in emitInstruction()
153 const MCSubtargetInfo &STI) const in encodeInstruction()
192 if (isMicroMips(STI)) { in encodeInstruction()
193 if (isMips32r6(STI)) { in encodeInstruction()
227 emitInstruction(Binary, Size, STI, OS); in encodeInstruction()
455 const MCSubtargetInfo &STI) const { in getBranchTarget26OpValueMM()
589 const MCSubtargetInfo &STI) const { in getExprOpValue()
746 return getExprOpValue(MO.getExpr(),Fixups, STI); in getMachineOpValue()
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H A DMipsInstPrinter.h84 const MCSubtargetInfo &STI, raw_ostream &O);
89 const MCSubtargetInfo &STI, raw_ostream &O) override;
92 const MCSubtargetInfo &STI, raw_ostream &OS);
95 const MCSubtargetInfo &STI, raw_ostream &O);
101 const MCSubtargetInfo &STI, raw_ostream &O);
103 const MCSubtargetInfo &STI, raw_ostream &O);
105 void printUImm(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
110 const MCSubtargetInfo &STI, raw_ostream &O);
122 const MCSubtargetInfo &STI, raw_ostream &OS);
123 void printSaveRestore(const MCInst *MI, const MCSubtargetInfo &STI,
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/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp106 if (STI && STI->getTargetTriple().getOS() != Triple::AMDHSA) in getHsaAbiVersion()
149 return isHsaAbiVersion3(STI) || isHsaAbiVersion4(STI) || in isHsaAbiVersion3AndAbove()
455 : STI(STI), XnackSetting(TargetIDSetting::Any), in AMDGPUTargetID()
1435 if (isSI(STI) || isCI(STI)) in getNfmtLookupTable()
1437 if (isVI(STI) || isGFX9(STI)) in getNfmtLookupTable()
1759 return isGFX9(STI) || isGFX10(STI); in isGFX9_GFX10()
1763 return isVI(STI) || isGFX9(STI) || isGFX10(STI); in isGFX8_GFX9_GFX10()
1767 return isVI(STI) || isGFX9Plus(STI); in isGFX8Plus()
1771 return isGFX9(STI) || isGFX10Plus(STI); in isGFX9Plus()
1779 return isGFX10(STI) || isGFX11Plus(STI); in isGFX10Plus()
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H A DAMDGPUBaseInfo.h107 const MCSubtargetInfo &STI;
509 const MCSubtargetInfo *STI);
821 bool hasXNACK(const MCSubtargetInfo &STI);
825 bool hasG16(const MCSubtargetInfo &STI);
828 bool isSI(const MCSubtargetInfo &STI);
829 bool isCI(const MCSubtargetInfo &STI);
830 bool isVI(const MCSubtargetInfo &STI);
831 bool isGFX9(const MCSubtargetInfo &STI);
836 bool isGFX10(const MCSubtargetInfo &STI);
840 bool isGFX11(const MCSubtargetInfo &STI);
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/llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYELFStreamer.cpp180 StringRef CPU = STI.getCPU(); in emitTargetAttributes()
196 if (STI.hasFeature(CSKY::HasE1)) in emitTargetAttributes()
199 if (STI.hasFeature(CSKY::HasE2)) in emitTargetAttributes()
202 if (STI.hasFeature(CSKY::Has2E3)) in emitTargetAttributes()
205 if (STI.hasFeature(CSKY::HasMP)) in emitTargetAttributes()
208 if (STI.hasFeature(CSKY::Has3E3r1)) in emitTargetAttributes()
217 if (STI.hasFeature(CSKY::Has3E7)) in emitTargetAttributes()
220 if (STI.hasFeature(CSKY::HasMP1E2)) in emitTargetAttributes()
223 if (STI.hasFeature(CSKY::Has7E10)) in emitTargetAttributes()
226 if (STI.hasFeature(CSKY::Has10E60)) in emitTargetAttributes()
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H A DCSKYInstPrinter.h33 const MCSubtargetInfo &STI, raw_ostream &O) override;
36 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
44 const MCSubtargetInfo &STI, raw_ostream &O);
46 const MCSubtargetInfo &STI, raw_ostream &O);
49 const MCSubtargetInfo &STI, raw_ostream &O);
52 const MCSubtargetInfo &STI, raw_ostream &O);
54 const MCSubtargetInfo &STI, raw_ostream &O);
58 const MCSubtargetInfo &STI, raw_ostream &O);
60 const MCSubtargetInfo &STI, raw_ostream &O);
62 const MCSubtargetInfo &STI, raw_ostream &O);
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.h36 const MCSubtargetInfo &STI, raw_ostream &O) override;
41 const MCSubtargetInfo &STI, raw_ostream &O);
45 const MCSubtargetInfo &STI, raw_ostream &OS);
56 const MCSubtargetInfo &STI, raw_ostream &O);
59 const MCSubtargetInfo &STI, raw_ostream &O);
61 const MCSubtargetInfo &STI, raw_ostream &O);
63 const MCSubtargetInfo &STI, raw_ostream &O);
65 const MCSubtargetInfo &STI, raw_ostream &O);
67 const MCSubtargetInfo &STI, raw_ostream &O);
99 const MCSubtargetInfo &STI, raw_ostream &O);
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H A DPPCMCCodeEmitter.h40 const MCSubtargetInfo &STI) const;
43 const MCSubtargetInfo &STI) const;
49 const MCSubtargetInfo &STI) const;
52 const MCSubtargetInfo &STI) const;
55 const MCSubtargetInfo &STI,
65 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
83 const MCSubtargetInfo &STI) const;
92 const MCSubtargetInfo &STI) const;
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H A DPPCInstPrinter.cpp74 printOperand(MI, 0, STI, O); in printInst()
76 printOperand(MI, 2, STI, O); in printInst()
78 printOperand(MI, 1, STI, O); in printInst()
127 printOperand(MI, 0, STI, O); in printInst()
129 printOperand(MI, 1, STI, O); in printInst()
144 printOperand(MI, 0, STI, O); in printInst()
146 printOperand(MI, 1, STI, O); in printInst()
177 printOperand(MI, 1, STI, O); in printInst()
179 printOperand(MI, 2, STI, O); in printInst()
204 printOperand(MI, 1, STI, O); in printInst()
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H A DPPCMCCodeEmitter.cpp44 const MCSubtargetInfo &STI) const { in getDirectBrEncoding()
48 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
75 const MCSubtargetInfo &STI) const { in getAbsDirectBrEncoding()
88 const MCSubtargetInfo &STI) const { in getAbsCondBrEncoding()
127 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
138 return getImm34Encoding(MI, OpNo, Fixups, STI, in getImm34EncodingNoPCRel()
146 return getImm34Encoding(MI, OpNo, Fixups, STI, in getImm34EncodingPCRel()
388 const Triple &TT = STI.getTargetTriple(); in getTLSRegEncoding()
402 return getDirectBrEncoding(MI, OpNo, Fixups, STI); in getTLSCallEncoding()
408 const MCSubtargetInfo &STI) const { in get_crbitm_encoding()
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/llvm-project-15.0.7/llvm/lib/Target/VE/MCTargetDesc/
H A DVEInstPrinter.cpp72 printOperand(MI, OpNum, STI, O); in printMemASXOperand()
74 printOperand(MI, OpNum + 1, STI, O); in printMemASXOperand()
82 printOperand(MI, OpNum + 2, STI, O); in printMemASXOperand()
105 printOperand(MI, OpNum, STI, O); in printMemASXOperand()
116 printOperand(MI, OpNum, STI, O); in printMemASOperandASX()
118 printOperand(MI, OpNum + 1, STI, O); in printMemASOperandASX()
137 printOperand(MI, OpNum, STI, O); in printMemASOperandASX()
147 printOperand(MI, OpNum, STI, O); in printMemASOperandRRM()
168 printOperand(MI, OpNum, STI, O); in printMemASOperandRRM()
178 printOperand(MI, OpNum, STI, O); in printMemASOperandHM()
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/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp88 OutStreamer.emitInstruction(SICInst, STI); in emitSIC()
100 OutStreamer.emitInstruction(BSICInst, STI); in emitBSIC()
112 OutStreamer.emitInstruction(LEAInst, STI); in emitLEAzzi()
136 OutStreamer.emitInstruction(LEAInst, STI); in emitLEAzii()
159 OutStreamer.emitInstruction(Inst, STI); in emitBinary()
174 emitLEAzzi(OutStreamer, lo, RD, STI); in emitHiLo()
176 emitANDrm(OutStreamer, RD, M032, RD, STI); in emitHiLo()
177 emitLEASLzzi(OutStreamer, hi, RD, STI); in emitHiLo()
216 emitSIC(*OutStreamer, RegPLT, STI); in lowerGETGOTAndEmitMCInsts()
264 emitSIC(*OutStreamer, RegPLT, STI); in lowerGETFunPLTAndEmitMCInsts()
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/llvm-project-15.0.7/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp64 const MCSubtargetInfo &STI) const;
161 uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
174 const MCSubtargetInfo &STI) const { in getMachineOpValue()
206 const MCSubtargetInfo &STI) const { in getBDAddr12Encoding()
216 const MCSubtargetInfo &STI) const { in getBDAddr20Encoding()
226 const MCSubtargetInfo &STI) const { in getBDXAddr12Encoding()
237 const MCSubtargetInfo &STI) const { in getBDXAddr20Encoding()
249 const MCSubtargetInfo &STI) const { in getBDLAddr12Len4Encoding()
260 const MCSubtargetInfo &STI) const { in getBDLAddr12Len8Encoding()
271 const MCSubtargetInfo &STI) const { in getBDRAddr12Encoding()
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/llvm-project-15.0.7/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcInstPrinter.cpp49 if (!printAliasInstr(MI, Address, STI, O) && in printInst()
50 !printSparcAliasInstr(MI, STI, O)) in printInst()
51 printInstruction(MI, Address, STI, O); in printInst()
77 O << "\tjmp "; printMemOperand(MI, 1, STI, O); in printSparcAliasInstr()
86 if (isV9(STI) in printSparcAliasInstr()
101 printOperand(MI, 1, STI, O); in printSparcAliasInstr()
103 printOperand(MI, 2, STI, O); in printSparcAliasInstr()
146 printOperand(MI, opNum, STI, O); in printMemOperand()
148 printOperand(MI, opNum + 1, STI, O); in printMemOperand()
157 printOperand(MI, opNum, STI, O); in printMemOperand()
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