44                     const MCSubtargetInfo &STI) const {  in getDirectBrEncoding()
48     return getMachineOpValue(MI, MO, Fixups, STI);  in getDirectBrEncoding()
62                                      const MCSubtargetInfo &STI) const {  in getCondBrEncoding()
64   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getCondBrEncoding()
75                        const MCSubtargetInfo &STI) const {  in getAbsDirectBrEncoding()
77   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getAbsDirectBrEncoding()
88                      const MCSubtargetInfo &STI) const {  in getAbsCondBrEncoding()
90   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getAbsCondBrEncoding()
101                                       const MCSubtargetInfo &STI) const {  in getVSRpEvenEncoding()
103   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI)  in getVSRpEvenEncoding()
110                                        const MCSubtargetInfo &STI) const {  in getImm16Encoding()
112   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getImm16Encoding()
122                                             const MCSubtargetInfo &STI,  in getImm34Encoding()  argument
127     return getMachineOpValue(MI, MO, Fixups, STI);  in getImm34Encoding()
137                                           const MCSubtargetInfo &STI) const {  in getImm34EncodingNoPCRel()
138   return getImm34Encoding(MI, OpNo, Fixups, STI,  in getImm34EncodingNoPCRel()
145                                         const MCSubtargetInfo &STI) const {  in getImm34EncodingPCRel()
146   return getImm34Encoding(MI, OpNo, Fixups, STI,  in getImm34EncodingPCRel()
152                                             const MCSubtargetInfo &STI) const {  in getMemRIEncoding()
156   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16;  in getMemRIEncoding()
160     return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits;  in getMemRIEncoding()
170                                        const MCSubtargetInfo &STI) const {  in getMemRIXEncoding()
174   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14;  in getMemRIXEncoding()
178     return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits;  in getMemRIXEncoding()
188                                        const MCSubtargetInfo &STI) const {  in getMemRIX16Encoding()
192   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 12;  in getMemRIX16Encoding()
198     return ((getMachineOpValue(MI, MO, Fixups, STI) >> 4) & 0xFFF) | RegBits;  in getMemRIX16Encoding()
210                                        const MCSubtargetInfo &STI) const {  in getMemRIHashEncoding()
220   unsigned RegBits = getMachineOpValue(MI, RegMO, Fixups, STI) << 6;  in getMemRIHashEncoding()
228                                           const MCSubtargetInfo &STI) const {  in getMemRI34PCRelEncoding()
241     getMachineOpValue(MI, MI.getOperand(OpNo + 1), Fixups, STI) << 34;  in getMemRI34PCRelEncoding()
248     return ((getMachineOpValue(MI, MO, Fixups, STI)) & 0x3FFFFFFFFUL) | RegBits;  in getMemRI34PCRelEncoding()
318                                      const MCSubtargetInfo &STI) const {  in getMemRI34Encoding()
322   uint64_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo + 1), Fixups, STI)  in getMemRI34Encoding()
325   return ((getMachineOpValue(MI, MO, Fixups, STI)) & 0x3FFFFFFFFUL) | RegBits;  in getMemRI34Encoding()
330                                               const MCSubtargetInfo &STI)  in getSPE8DisEncoding()
335   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE8DisEncoding()
339   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 3;  in getSPE8DisEncoding()
345                                               const MCSubtargetInfo &STI)  in getSPE4DisEncoding()
350   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE4DisEncoding()
354   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 2;  in getSPE4DisEncoding()
360                                               const MCSubtargetInfo &STI)  in getSPE2DisEncoding()
365   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE2DisEncoding()
369   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 1;  in getSPE2DisEncoding()
375                                        const MCSubtargetInfo &STI) const {  in getTLSRegEncoding()
377   if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups, STI);  in getTLSRegEncoding()
388   const Triple &TT = STI.getTargetTriple();  in getTLSRegEncoding()
395                                        const MCSubtargetInfo &STI) const {  in getTLSCallEncoding()
402   return getDirectBrEncoding(MI, OpNo, Fixups, STI);  in getTLSCallEncoding()
408                     const MCSubtargetInfo &STI) const {  in get_crbitm_encoding()
433                   const MCSubtargetInfo &STI) const {  in getMachineOpValue()
454                                          const MCSubtargetInfo &STI) const {  in encodeInstruction()
455   uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);  in encodeInstruction()