Lines Matching refs:STI

39                           const MCSubtargetInfo &STI) const;
50 const MCSubtargetInfo &STI) const override;
55 const MCSubtargetInfo &STI) const override;
61 const MCSubtargetInfo &STI) const override;
65 const MCSubtargetInfo &STI) const override;
69 const MCSubtargetInfo &STI) const override;
73 const MCSubtargetInfo &STI) const override;
77 const MCSubtargetInfo &STI) const override;
84 const MCSubtargetInfo &STI) const;
107 static uint32_t getLit16IntEncoding(uint16_t Val, const MCSubtargetInfo &STI) { in getLit16IntEncoding() argument
112 static uint32_t getLit16Encoding(uint16_t Val, const MCSubtargetInfo &STI) { in getLit16Encoding() argument
142 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
148 static uint32_t getLit32Encoding(uint32_t Val, const MCSubtargetInfo &STI) { in getLit32Encoding() argument
178 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
184 static uint32_t getLit64Encoding(uint64_t Val, const MCSubtargetInfo &STI) { in getLit64Encoding() argument
214 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
222 const MCSubtargetInfo &STI) const { in getLitEncoding()
252 return getLit32Encoding(static_cast<uint32_t>(Imm), STI); in getLitEncoding()
259 return getLit64Encoding(static_cast<uint64_t>(Imm), STI); in getLitEncoding()
264 return getLit16IntEncoding(static_cast<uint16_t>(Imm), STI); in getLitEncoding()
271 return getLit16Encoding(static_cast<uint16_t>(Imm), STI); in getLitEncoding()
274 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getLitEncoding()
275 return getLit32Encoding(static_cast<uint32_t>(Imm), STI); in getLitEncoding()
277 return getLit16Encoding(static_cast<uint16_t>(Imm), STI); in getLitEncoding()
282 return getLit16IntEncoding(static_cast<uint16_t>(Imm), STI); in getLitEncoding()
286 uint32_t Encoding = getLit16Encoding(Lo16, STI); in getLitEncoding()
319 const MCSubtargetInfo &STI) const { in encodeInstruction()
322 getBinaryCodeForInstr(MI, Fixups, Encoding, Scratch, STI); in encodeInstruction()
340 if (AMDGPU::isGFX11Plus(STI) && isVCMPX64(Desc)) { in encodeInstruction()
350 if (AMDGPU::isGFX10Plus(STI) && Desc.TSFlags & SIInstrFlags::MIMG) { in encodeInstruction()
361 STI); in encodeInstruction()
368 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) || in encodeInstruction()
369 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])) in encodeInstruction()
387 if (getLitEncoding(Op, Desc.OpInfo[i], STI) != 255) in encodeInstruction()
414 const MCSubtargetInfo &STI) const { in getSOPPBrEncoding()
423 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
430 const MCSubtargetInfo &STI) const { in getSMEMOffsetEncoding()
433 assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset)); in getSMEMOffsetEncoding()
440 const MCSubtargetInfo &STI) const { in getSDWASrcEncoding()
458 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI); in getSDWASrcEncoding()
471 const MCSubtargetInfo &STI) const { in getSDWAVopcDstEncoding()
490 const MCSubtargetInfo &STI) const { in getAVOperandEncoding()
538 const MCSubtargetInfo &STI) const { in getMachineOpValue()
544 getMachineOpValueCommon(MI, MO, OpNo, Op, Fixups, STI); in getMachineOpValue()
549 SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const { in getMachineOpValueCommon()
577 uint32_t Enc = getLitEncoding(MO, Desc.OpInfo[OpNo], STI); in getMachineOpValueCommon()