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Searched refs:InReg (Results 1 – 25 of 43) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTLSDynamicCall.cpp82 Register InReg = PPC::NoRegister; in processBlock() local
86 InReg = MI.getOperand(1).getReg(); in processBlock()
152 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
153 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
/llvm-project-15.0.7/llvm/unittests/DebugInfo/DWARF/
H A DDWARFDebugFrameTest.cpp777 constexpr uint8_t InReg = 14; in TEST() local
816 Reg, dwarf::UnwindLocation::createIsRegisterPlusOffset(InReg, 0)); in TEST()
865 constexpr uint8_t InReg = 14; in TEST() local
891 Reg, dwarf::UnwindLocation::createIsRegisterPlusOffset(InReg, 0)); in TEST()
928 constexpr uint8_t InReg = 14; in TEST() local
954 Reg, dwarf::UnwindLocation::createIsRegisterPlusOffset(InReg, 0)); in TEST()
1336 constexpr uint8_t InReg = 14; in TEST() local
1344 Reg, dwarf::UnwindLocation::createIsRegisterPlusOffset(InReg, 0)); in TEST()
1484 constexpr uint8_t InReg = 14; in TEST() local
1511 Reg, dwarf::UnwindLocation::createIsRegisterPlusOffset(InReg, 0)); in TEST()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DJMCInstrumenter.cpp138 DefaultCheckFunc->addParamAttr(0, Attribute::InReg); in createDefaultCheckFunction()
200 CheckFunc->addParamAttr(0, Attribute::InReg); in runOnModule()
227 CI->addParamAttr(0, Attribute::InReg); in runOnModule()
/llvm-project-15.0.7/clang/include/clang/CodeGen/
H A DCGFunctionInfo.h116 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
139 SRetAfterThis(false), InReg(false), CanBeFlattened(false),
380 return InReg; in getInReg()
385 InReg = IR; in setInReg()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DFastISel.h109 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
133 IsInReg = Call.hasRetAttr(Attribute::InReg);
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-windows-calls.ll73 ; InReg arguments to non-instance methods must be passed in X0 and returns in
86 ; InReg arguments to instance methods must be passed in X1 and returns in X0.
/llvm-project-15.0.7/llvm/lib/Target/DirectX/
H A DDXILPrepare.cpp42 Attribute::InReg, in isValidForDXIL()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp616 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
619 if (!IsGraphics && InReg) in lowerFormalArguments()
627 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
H A DAMDGPUMachineCFGStructurizer.cpp2686 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
2688 MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2689 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2694 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI); in structurizeComplexRegion()
H A DAMDGPUInstructionSelector.cpp2062 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; in selectG_SZA_EXT() local
2063 bool Signed = I.getOpcode() == AMDGPU::G_SEXT || InReg; in selectG_SZA_EXT()
2129 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT()
2147 if (DstSize > 32 && (SrcSize <= 32 || InReg)) { in selectG_SZA_EXT()
2151 unsigned SubReg = InReg ? AMDGPU::sub0 : 0; in selectG_SZA_EXT()
H A DAMDGPUAsmPrinter.cpp783 if (Arg.hasAttribute(Attribute::InReg)) { in getSIProgramInfo()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp438 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
474 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
475 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
485 Tmp0 = InReg; in LowerFPToInt()
487 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
495 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
511 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CallLowering.cpp257 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
H A DX86WinEHState.cpp415 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DStatepointLowering.cpp1266 Register InReg = Record.payload.Reg; in visitGCRelocate() local
1268 DAG.getDataLayout(), InReg, Relocate.getType(), in visitGCRelocate()
H A DSelectionDAGBuilder.cpp1471 Register InReg = It->second; in getCopyFromRegs() local
1474 DAG.getDataLayout(), InReg, Ty, in getCopyFromRegs()
1673 unsigned InReg = FuncInfo.InitializeRegForValue(Inst); in getValueImpl() local
1675 RegsForValue RFV(*DAG.getContext(), TLI, DAG.getDataLayout(), InReg, in getValueImpl()
1977 bool RetInReg = F->getAttributes().hasRetAttr(Attribute::InReg); in visitRet()
2687 if (GuardCheckFn->hasParamAttribute(0, Attribute::AttrKind::InReg)) in visitSPDescriptorParent()
9617 Attrs.push_back(Attribute::InReg); in getReturnAttrs()
10331 if (Arg.hasAttribute(Attribute::InReg)) { in LowerArguments()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DTargetInfo.cpp1751 InReg = !IsMCUABI; in shouldAggregateUseDirect()
1873 bool InReg; in classifyArgumentType() local
1878 if (InReg) in classifyArgumentType()
1938 if (InReg) in classifyArgumentType()
1945 if (InReg) in classifyArgumentType()
1952 if (InReg) in classifyArgumentType()
9041 if (InReg) in classifyArgumentType()
9045 if (InReg) in classifyArgumentType()
9673 bool InReg; member
9711 InReg = true; in addFloat()
[all …]
H A DCGCall.cpp2325 RetAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2373 SRETAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2439 llvm::AttrBuilder(getLLVMContext()).addAttribute(llvm::Attribute::InReg)); in ConstructAttributeList()
2463 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2469 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp1157 Register InReg = PHI->getOperand(PHIOp).getReg(); in needVSETVLIPHI() local
1166 MachineInstr *DefMI = MRI->getVRegDef(InReg); in needVSETVLIPHI()
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DAttributes.td124 def InReg : EnumAttr<"inreg", [ParamAttr, RetAttr]>;
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp42 if (AttrFn(Attribute::InReg)) in addFlagsUsingAttrFn()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2355 if (CI->paramHasAttr(ArgIdx, Attribute::InReg) || in SelectCall()
3032 if (Arg.hasAttribute(Attribute::InReg) || in fastLowerArguments()
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DCodeExtractor.cpp976 case Attribute::InReg: in constructFunction()
/llvm-project-15.0.7/llvm/lib/Transforms/Coroutines/
H A DCoroSplit.cpp1350 Attribute::Preallocated, Attribute::InReg, Attribute::Returned, in shouldBeMustTail()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp2216 return F->getAttributes().hasParamAttr(A->getArgNo(), Attribute::InReg) || in isArgPassedInSGPR()

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