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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6 |
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| #
088f3360 |
| 17-Nov-2022 |
yronglin <[email protected]> |
[CodeGen][ARM] Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Open issue: https://github.com/llvm/llvm-pro
[CodeGen][ARM] Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Open issue: https://github.com/llvm/llvm-project/issues/58794
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D138137
(cherry picked from commit 80f444646c62ccc8b2399d60ac91e62e6e576da6)
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Revision tags: llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3 |
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43fb0d71 |
| 19-Aug-2022 |
Alex Bradbury <[email protected]> |
[clang][RISCV] Fix incorrect ABI lowering for inherited structs under hard-float ABIs
The hard float ABIs have a rule that if a flattened struct contains either a single fp value, or an int+fp, or f
[clang][RISCV] Fix incorrect ABI lowering for inherited structs under hard-float ABIs
The hard float ABIs have a rule that if a flattened struct contains either a single fp value, or an int+fp, or fp+fp then it may be passed in a pair of registers (if sufficient GPRs+FPRs are available). detectFPCCEligibleStruct and the helper it calls, detectFPCCEligibleStructHelper examine the type of the argument/return value to determine if it complies with the requirements for this ABI rule.
As reported in bug #57084, this logic produces incorrect results for C++ structs that inherit from other structs. This is because only the fields of the struct were examined, but enumerating RD->fields misses any fields in inherited C++ structs. This patch corrects that issue by adding appropriate logic to enumerate any included base structs.
Differential Revision: https://reviews.llvm.org/D131677
(cherry picked from commit bc538320809fb52af12ec0366118c82201af4f40)
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fa0ff577 |
| 10-Aug-2022 |
Freddy Ye <[email protected]> |
[X86][BF16] Enable __bf16 for x86 targets.
X86 psABI has updated to support __bf16 type, the ABI of which is the same as FP16. See https://discourse.llvm.org/t/patch-add-optional-bfloat16-support/63
[X86][BF16] Enable __bf16 for x86 targets.
X86 psABI has updated to support __bf16 type, the ABI of which is the same as FP16. See https://discourse.llvm.org/t/patch-add-optional-bfloat16-support/63149
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D130964
(cherry picked from commit e4888a37d36780872d685c68ef8b26b2e14d6d39)
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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aba43035 |
| 23-Jul-2022 |
Dmitri Gribenko <[email protected]> |
Use llvm::sort instead of std::sort where possible
llvm::sort is beneficial even when we use the iterator-based overload, since it can optionally shuffle the elements (to detect non-determinism). Ho
Use llvm::sort instead of std::sort where possible
llvm::sort is beneficial even when we use the iterator-based overload, since it can optionally shuffle the elements (to detect non-determinism). However llvm::sort is not usable everywhere, for example, in compiler-rt.
Reviewed By: nhaehnle
Differential Revision: https://reviews.llvm.org/D130406
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31d8dbd1 |
| 22-Jul-2022 |
Shangwu Yao <[email protected]> |
[CUDA/SPIR-V] Force passing aggregate type byval
This patch forces copying aggregate type in kernel arguments by value when compiling CUDA targeting SPIR-V. The original behavior is not passing by v
[CUDA/SPIR-V] Force passing aggregate type byval
This patch forces copying aggregate type in kernel arguments by value when compiling CUDA targeting SPIR-V. The original behavior is not passing by value when there is any of destructor, copy constructor and move constructor defined by user. This patch makes the behavior of SPIR-V generated from CUDA follow the CUDA spec (https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#global-function-argument-processing), and matches the NVPTX implementation ( https://github.com/llvm/llvm-project/blob/41958f76d8a2c47484fa176cba1de565cfe84de7/clang/lib/CodeGen/TargetInfo.cpp#L7241).
Differential Revision: https://reviews.llvm.org/D130387
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37502e04 |
| 22-Jul-2022 |
Sergei Barannikov <[email protected]> |
[clang][CodeGen] Only include ABIInfo.h where required (NFC)
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D130322
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Revision tags: llvmorg-14.0.6 |
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ca4af13e |
| 21-Jun-2022 |
Kazu Hirata <[email protected]> |
[clang] Don't use Optional::getValue (NFC)
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Revision tags: llvmorg-14.0.5 |
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ceb21fa4 |
| 10-Jun-2022 |
Simon Tatham <[email protected]> |
[ARM] Fix how size-0 bitfields affect homogeneous aggregates.
By both AAPCS32 and AAPCS64, the test for whether an aggregate qualifies as homogeneous (either HFA or HVA) is based on the data layout
[ARM] Fix how size-0 bitfields affect homogeneous aggregates.
By both AAPCS32 and AAPCS64, the test for whether an aggregate qualifies as homogeneous (either HFA or HVA) is based on the data layout alone. So any logical member of the structure that does not affect the data layout also should not affect homogeneity. In particular, an empty bitfield ('int : 0') should make no difference.
In fact, clang considered it to make a difference in C but not in C++, and justified that policy as compatible with gcc. But that's considered a bug in gcc as well (at least for Arm targets), and it's fixed in gcc 12.1.
This fix mimics gcc's: zero-sized bitfields are now ignored in all languages for the Arm (32- and 64-bit) ABIs. But I've left the previous behaviour unchanged in other ABIs, by means of adding an ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate query method which the Arm subclasses override.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D127197
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dc5175ad |
| 02-Jun-2022 |
Paul Robinson <[email protected]> |
[PS5] Make passing unions in registers match PS4 ABI
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cc756f91 |
| 02-Jun-2022 |
Paul Robinson <[email protected]> |
[PS5] Classify __m64 as integer, matching PS4 ABI
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Revision tags: llvmorg-14.0.4 |
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563cc3fd |
| 20-May-2022 |
Zi Xuan Wu (Zeson) <[email protected]> |
[Clang][CSKY] Add support about CSKYABIInfo
According to the CSKY ABIv2 document, https://github.com/c-sky/csky-doc/blob/master/C-SKY_V2_CPU_Applications_Binary_Interface_Standards_Manual.pdf constr
[Clang][CSKY] Add support about CSKYABIInfo
According to the CSKY ABIv2 document, https://github.com/c-sky/csky-doc/blob/master/C-SKY_V2_CPU_Applications_Binary_Interface_Standards_Manual.pdf construct the ABIInfo to handle argument passing and return of clang data type. It also includes how to emit and expand VAArg intrinsic.
Differential Revision: https://reviews.llvm.org/D126451
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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9b38e2ef |
| 24-Mar-2022 |
Jonas Paulsson <[email protected]> |
[SystemZ] Fix C++ ABI for passing args of structs containing zero width bitfield.
A struct like { float a; int :0; } should per the SystemZ ABI be passed in a GPR, but to match a bug in GCC it has b
[SystemZ] Fix C++ ABI for passing args of structs containing zero width bitfield.
A struct like { float a; int :0; } should per the SystemZ ABI be passed in a GPR, but to match a bug in GCC it has been passed in an FPR (see 759449c).
GCC has now corrected the C++ ABI for this case, and this patch for clang follows suit.
Reviewed By: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D122388
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22675492 |
| 31-Mar-2022 |
Aaron Ballman <[email protected]> |
Fix the build after cd26190a10fceb6e1472fabcd9e1736f62f078c4
These variables were being used uninitialized and it caused a significant number of test failures on Windows.
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cd26190a |
| 29-Mar-2022 |
Phoebe Wang <[email protected]> |
[X86][regcall] Support passing / returning structures
Currently, the regcall calling conversion in Clang doesn't match with ICC when passing / returning structures. https://godbolt.org/z/axxKMKrW7
[X86][regcall] Support passing / returning structures
Currently, the regcall calling conversion in Clang doesn't match with ICC when passing / returning structures. https://godbolt.org/z/axxKMKrW7
This patch tries to fix the problem to match with ICC.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D122104
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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51585aa2 |
| 01-Mar-2022 |
Ben Shi <[email protected]> |
[clang][AVR] Implement standard calling convention for AVR and AVRTiny
This patch implements avr-gcc's calling convention: https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention
Reviewed By: aykevl
D
[clang][AVR] Implement standard calling convention for AVR and AVRTiny
This patch implements avr-gcc's calling convention: https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention
Reviewed By: aykevl
Differential Revision: https://reviews.llvm.org/D120720
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818e72d1 |
| 23-Mar-2022 |
Akira Hatanaka <[email protected]> |
[NFC][Clang][OpaquePtr] Remove calls to Address::deprecated in TargetInfo.cpp
Differential Revision: https://reviews.llvm.org/D122199
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5d2ce766 |
| 18-Mar-2022 |
Benjamin Kramer <[email protected]> |
Use llvm::append_range instead of push_back loops where applicable. NFCI.
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6e1e99dc |
| 17-Mar-2022 |
Nikita Popov <[email protected]> |
[CodeGen] Avoid pointer element type access for blocks
Pass the block struct type down to the TargetInfo hooks.
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c2f501f3 |
| 25-Feb-2022 |
Shangwu Yao <[email protected]> |
[CUDA][SPIRV] Assign global address space to CUDA kernel arguments
(resubmit https://reviews.llvm.org/D119207 after fixing the test for some build settings)
This patch converts CUDA pointer kernel
[CUDA][SPIRV] Assign global address space to CUDA kernel arguments
(resubmit https://reviews.llvm.org/D119207 after fixing the test for some build settings)
This patch converts CUDA pointer kernel arguments with default address space to CrossWorkGroup address space (__global in OpenCL). This is because Generic or Function (OpenCL's private) is not supported as storage class for kernel pointer types.
Differential revision: https://reviews.llvm.org/D120366
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0b5fe2c9 |
| 17-Feb-2022 |
Arthur Eubanks <[email protected]> |
[clang] Remove Address::deprecated() in emitVoidPtrDirectVAArg()
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9ce09099 |
| 17-Feb-2022 |
Matthew Voss <[email protected]> |
Revert "[CUDA][SPIRV] Assign global address space to CUDA kernel arguments"
This reverts commit 9de4fc0f2d3b60542956f7e5254951d049edeb1f.
Reverting due to test failure: https://lab.llvm.org/buildbo
Revert "[CUDA][SPIRV] Assign global address space to CUDA kernel arguments"
This reverts commit 9de4fc0f2d3b60542956f7e5254951d049edeb1f.
Reverting due to test failure: https://lab.llvm.org/buildbot/#/builders/139/builds/17199
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9de4fc0f |
| 17-Feb-2022 |
Shangwu Yao <[email protected]> |
[CUDA][SPIRV] Assign global address space to CUDA kernel arguments
This patch converts CUDA pointer kernel arguments with default address space to CrossWorkGroup address space (__global in OpenCL).
[CUDA][SPIRV] Assign global address space to CUDA kernel arguments
This patch converts CUDA pointer kernel arguments with default address space to CrossWorkGroup address space (__global in OpenCL). This is because Generic or Function (OpenCL's private) is not supported as storage class for kernel pointer types.
Differential Revision: https://reviews.llvm.org/D119207
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50650766 |
| 16-Feb-2022 |
Nikita Popov <[email protected]> |
[CodeGen] Rename deprecated Address constructor
To make uses of the deprecated constructor easier to spot, and to ensure that no new uses are introduced, rename it to Address::deprecated().
While d
[CodeGen] Rename deprecated Address constructor
To make uses of the deprecated constructor easier to spot, and to ensure that no new uses are introduced, rename it to Address::deprecated().
While doing the rename, I've filled in element types in cases where it was relatively obvious, but we're still left with 135 calls to the deprecated constructor.
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f208644e |
| 14-Feb-2022 |
Nikita Popov <[email protected]> |
[CGBuilder] Remove CreateBitCast() method
Use CreateElementBitCast() instead, or don't work on Address where not necessary.
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Revision tags: llvmorg-14.0.0-rc1 |
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42afaf7f |
| 03-Feb-2022 |
Jan Svoboda <[email protected]> |
[clang][CodeGen] Use memory type representation in `va_arg`
Some types (e.g. `_Bool`) have different scalar and memory representations. CodeGen for `va_arg` didn't take this into account, leading to
[clang][CodeGen] Use memory type representation in `va_arg`
Some types (e.g. `_Bool`) have different scalar and memory representations. CodeGen for `va_arg` didn't take this into account, leading to an assertion failures with different types.
This patch makes sure we use memory representation for `va_arg`.
Reviewed By: ahatanak
Differential Revision: https://reviews.llvm.org/D118904
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