History log of /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (Results 1 – 25 of 335)
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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init
# 3696a789 25-Jul-2022 Andrew Brown <[email protected]>

[WebAssembly] Use `localexec` as default TLS model for non-Emscripten targets

Only Emscripten supports dynamic linking with threads. To use
thread-local storage for other targets, this change defaul

[WebAssembly] Use `localexec` as default TLS model for non-Emscripten targets

Only Emscripten supports dynamic linking with threads. To use
thread-local storage for other targets, this change defaults to the
`localexec` model.

Differential Revision: https://reviews.llvm.org/D130053

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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5
# e0039b8d 05-Jun-2022 Kazu Hirata <[email protected]>

Use llvm::less_second (NFC)


Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1
# 662b9fa0 28-Mar-2022 Shao-Ce SUN <[email protected]>

[NFC][CodeGen] Add a setTargetDAGCombine use ArrayRef

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D122557


# b8038a91 16-Mar-2022 Heejin Ahn <[email protected]>

[WebAssembly] Disable SimplifyDemandedVectorElts after legalization

This fixes a reported bug that caused an infinite loop during the
SelectionDAG optimization phase in ISel, by creating an overrida

[WebAssembly] Disable SimplifyDemandedVectorElts after legalization

This fixes a reported bug that caused an infinite loop during the
SelectionDAG optimization phase in ISel, by creating an overridable hook
in `TargetLowering` that allows us to bail out from running
`SimplifyDemandedVectorElts`.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D121869

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# 37b37838 16-Mar-2022 Shengchen Kan <[email protected]>

[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments


# 989f1c72 15-Mar-2022 serge-sans-paille <[email protected]>

Cleanup codegen includes

This is a (fixed) recommit of https://reviews.llvm.org/D121169

after: 1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-in

Cleanup codegen includes

This is a (fixed) recommit of https://reviews.llvm.org/D121169

after: 1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681

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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3
# a278250b 10-Mar-2022 Nico Weber <[email protected]>

Revert "Cleanup codegen includes"

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https:/

Revert "Cleanup codegen includes"

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169

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# 7f230fee 07-Mar-2022 serge-sans-paille <[email protected]>

Cleanup codegen includes

after: 1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169


Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3
# d6b07348 19-Jan-2022 Jim Lin <[email protected]>

[NFC] Use Register instead of unsigned


# 97ef15ad 13-Jan-2022 Paulo Matos <[email protected]>

[WebAssembly] Fix reftype load/store match with idx from call

Implement support for matching an index from a WebAssembly CALL
instruction. Add test.

Reviewed By: tlively

Differential Revision: htt

[WebAssembly] Fix reftype load/store match with idx from call

Implement support for matching an index from a WebAssembly CALL
instruction. Add test.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D115327

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Revision tags: llvmorg-13.0.1-rc2
# 2a4a229d 14-Dec-2021 Jing Bao <[email protected]>

[WebAssembly] Custom optimization for truncate

When possible, optimize TRUNCATE to generate Wasm SIMD narrow
instructions (i16x8.narrow_i32x4_u, i8x16.narrow_i16x8_u), rather than generate
lots of e

[WebAssembly] Custom optimization for truncate

When possible, optimize TRUNCATE to generate Wasm SIMD narrow
instructions (i16x8.narrow_i32x4_u, i8x16.narrow_i16x8_u), rather than generate
lots of extract_lane and replace_lane.

Closes #50350.

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# a96d8285 05-Dec-2021 Paulo Matos <[email protected]>

[WebAssembly] Implementation of intrinsic for ref.null and HeapType removal

This patch implements the intrinsic for ref.null.
In the process of implementing int_wasm_ref_null_func() and
int_wasm_ref

[WebAssembly] Implementation of intrinsic for ref.null and HeapType removal

This patch implements the intrinsic for ref.null.
In the process of implementing int_wasm_ref_null_func() and
int_wasm_ref_null_extern() intrinsics, it removes the redundant
HeapType.

This also causes the textual assembler syntax for ref.null to
change. Instead of receiving an argument: `func` or `extern`, the
instruction mnemonic is either ref.null_func or ref.null_extern,
without the need for a further operand.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D114979

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Revision tags: llvmorg-13.0.1-rc1
# fe1f0de0 19-Oct-2021 Craig Topper <[email protected]>

[RISCV][WebAssembly][TargetLowering] Allow expandCTLZ/expandCTTZ to rely on CTPOP expansion for vectors.

Our fallback expansion for CTLZ/CTTZ relies on CTPOP. If CTPOP
isn't legal or custom for a ve

[RISCV][WebAssembly][TargetLowering] Allow expandCTLZ/expandCTTZ to rely on CTPOP expansion for vectors.

Our fallback expansion for CTLZ/CTTZ relies on CTPOP. If CTPOP
isn't legal or custom for a vector type we would scalarize the
CTLZ/CTTZ. This is different than CTPOP itself which would use a
vector expansion.

This patch teaches expandCTLZ/CTTZ to rely on the vector CTPOP
expansion instead of scalarizing. To do this I had to add additional
checks to make sure the operations used by CTPOP expansions are all
supported. Some of the operations were already needed for the CTLZ/CTTZ
expansion.

This is a huge improvement to the RISCV which doesn't have a scalar
ctlz or cttz in the base ISA.

For WebAssembly, I've added Custom lowering to keep the scalarizing
behavior. I've also extended the scalarizing to CTPOP.

Differential Revision: https://reviews.llvm.org/D111919

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# 6d0c7bc1 07-Oct-2021 Paulo Matos <[email protected]>

[WebAssembly] Implementation of table.get/set for reftypes in LLVM IR

This change implements new DAG nodes TABLE_GET/TABLE_SET, and lowering
methods for load and stores of reference types from IR ar

[WebAssembly] Implementation of table.get/set for reftypes in LLVM IR

This change implements new DAG nodes TABLE_GET/TABLE_SET, and lowering
methods for load and stores of reference types from IR arrays. These
global LLVM IR arrays represent tables at the Wasm level.

Differential Revision: https://reviews.llvm.org/D111154

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# 8568ca78 18-Oct-2021 Kazu Hirata <[email protected]>

Use llvm::erase_if (NFC)


# 9261ee32 29-Sep-2021 Heejin Ahn <[email protected]>

[WebAssembly] Make EH work with dynamic linking

This makes Wasm EH work with dynamic linking. So far we were only able
to handle destructors, which do not use any tags or LSDA info.

1. This uses `T

[WebAssembly] Make EH work with dynamic linking

This makes Wasm EH work with dynamic linking. So far we were only able
to handle destructors, which do not use any tags or LSDA info.

1. This uses `TargetExternalSymbol` for `GCC_except_tableN` symbols,
which points to the address of per-function LSDA info. It is more
convenient to use than `MCSymbol` because it can take additional
target flags.

2. When lowering `wasm_lsda` intrinsic, if PIC is enabled, make the
symbol relative to `__memory_base` and generate the `add` node. If
PIC is disabled, continue to use the absolute address.

3. Make tag symbols (`__cpp_exception` and `__c_longjmp`) undefined in
the backend, because it is hard to make it work with dynamic
linking's loading order. Instead, we make all tag symbols undefined
in the LLVM backend and import it from JS.

4. Add support for undefined tags to the linker.

Companion patches:
- https://github.com/WebAssembly/binaryen/pull/4223
- https://github.com/emscripten-core/emscripten/pull/15266

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D111388

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# 0c749584 06-Oct-2021 Paulo Matos <[email protected]>

[WebAssembly] Fix call_indirect on funcrefs

The currently implementation of funcrefs is broken since it is putting
the funcref itself on the stack before the call_indirect. Instead what
should be on

[WebAssembly] Fix call_indirect on funcrefs

The currently implementation of funcrefs is broken since it is putting
the funcref itself on the stack before the call_indirect. Instead what
should be on the stack is the constant 0, which is the index at which
we store the funcref in __funcref_call_table.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D111152

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# 91fe069c 06-Oct-2021 Paulo Matos <[email protected]>

[WebAssembly] De-duplicate WasmAddressSpace and refactor reftype predicates

This is a non-functional change to remove the duplicate
WasmAddressSpace enum and refactor reftype predicates by moving th

[WebAssembly] De-duplicate WasmAddressSpace and refactor reftype predicates

This is a non-functional change to remove the duplicate
WasmAddressSpace enum and refactor reftype predicates by moving them
to the Utilities source file.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D111144

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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3
# ef8c9135 26-Aug-2021 Sam Clegg <[email protected]>

[WebAssembly] Allow import and export of TLS symbols between DSOs

We previously had a limitation that TLS variables could not
be exported (and therefore could also not be imported). This
change rem

[WebAssembly] Allow import and export of TLS symbols between DSOs

We previously had a limitation that TLS variables could not
be exported (and therefore could also not be imported). This
change removed that limitation.

Differential Revision: https://reviews.llvm.org/D108877

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# c32884c4 02-Sep-2021 Sam Clegg <[email protected]>

[WebAssembly] Rename WrapperPIC -> WrapperREL. NFC

This ISD node/wrapper represents am address which is relative to a base
address and therefore lowers to `i32.const` rather than `global.get`.

Use

[WebAssembly] Rename WrapperPIC -> WrapperREL. NFC

This ISD node/wrapper represents am address which is relative to a base
address and therefore lowers to `i32.const` rather than `global.get`.

Use this wrapper type for TLS-relative addresses, paving the way for the
non-REL wrapper to be used to external TLS address once those are
supported.

Differential Revision: https://reviews.llvm.org/D109179

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# fec47492 01-Sep-2021 Thomas Lively <[email protected]>

[WebAssembly] Lower v2f32 to v2f64 extending loads with promote_low

Previously extra wide v4f32 to v4f64 extending loads would be legalized to v2f32
to v2f64 extending loads, which would then be sca

[WebAssembly] Lower v2f32 to v2f64 extending loads with promote_low

Previously extra wide v4f32 to v4f64 extending loads would be legalized to v2f32
to v2f64 extending loads, which would then be scalarized by legalization. (v2f32
to v2f64 extending loads not produced by legalization were already being emitted
correctly.) Instead, mark v2f32 to v2f64 extending loads as legal and explicitly
lower them using promote_low. This regresses the addressing modes supported for
the extloads not produced by legalization, but that's a fine trade off for now.

Differential Revision: https://reviews.llvm.org/D108496

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Revision tags: llvmorg-13.0.0-rc2
# 977eeb0c 25-Aug-2021 Thomas Lively <[email protected]>

[WebAssembly] Fix some UB from ca541aa319cd


# ca541aa3 25-Aug-2021 Thomas Lively <[email protected]>

[WebAssembly] Fix up out-of-range BUILD_VECTOR lane constants

Fixes PR51605 in which a DAG combine and legalization sequence generated
out-of-range constants in BUILD_VECTOR lanes. In the v16i8 case

[WebAssembly] Fix up out-of-range BUILD_VECTOR lane constants

Fixes PR51605 in which a DAG combine and legalization sequence generated
out-of-range constants in BUILD_VECTOR lanes. In the v16i8 case, the constants
were 255, which would be in range if DAG ISel used unsigned constants, but it is
out of range because DAG ISel uses signed constants.

Differential Revision: https://reviews.llvm.org/D108669

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# be6c49e7 19-Aug-2021 Thomas Lively <[email protected]>

[WebAssembly] Add explicit casts to silence -Wc++11-narrowing


# fd0557db 19-Aug-2021 Thomas Lively <[email protected]>

[WebAssembly] More convert_low and promote_low codegen

The convert_low and promote_low instructions can widen the lower two lanes of a
four-lane vector, but we were previously scalarizing patterns t

[WebAssembly] More convert_low and promote_low codegen

The convert_low and promote_low instructions can widen the lower two lanes of a
four-lane vector, but we were previously scalarizing patterns that widened lanes
besides the low two lanes. The commit adds a shuffle to move the widened lanes
into the low lane positions so the convert_low and promote_low instructions can
be used instead of scalarizing.

Depends on D108266.

Differential Revision: https://reviews.llvm.org/D108341

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