| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 99 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const; 167 DAGCombinerInfo &DCI) const; 171 DAGCombinerInfo &DCI) const; 179 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 180 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 181 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const; 202 SDValue tryFoldToMad64_32(SDNode *N, DAGCombinerInfo &DCI) const; 203 SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const; 205 SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const; 208 SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | AMDGPUISelLowering.h | 81 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 82 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 89 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 90 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 91 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 93 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; 95 SDValue performMulhsCombine(SDNode *N, DAGCombinerInfo &DCI) const; 96 SDValue performMulhuCombine(SDNode *N, DAGCombinerInfo &DCI) const; 102 SDValue performFNegCombine(SDNode *N, DAGCombinerInfo &DCI) const; 103 SDValue performFAbsCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | AMDGPUISelLowering.cpp | 1304 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy() 2760 SelectionDAG &DAG = DCI.DAG; in simplifyMul24() 2855 if (!DCI.isBeforeLegalize()) in performLoadCombine() 2863 SelectionDAG &DAG = DCI.DAG; in performLoadCombine() 2908 if (!DCI.isBeforeLegalize()) in performStoreCombine() 2919 SelectionDAG &DAG = DCI.DAG; in performStoreCombine() 2965 SelectionDAG &DAG = DCI.DAG; in performAssertSZExtCombine() 3016 SelectionDAG &DAG = DCI.DAG; in splitBinaryBitConstantOpImpl() 3049 SelectionDAG &DAG = DCI.DAG; in performShlCombine() 3385 DCI.CombineTo(N, Lo, Hi); in performMulLoHiCombine() [all …]
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| H A D | SIISelLowering.cpp | 8541 SelectionDAG &DAG = DCI.DAG; in widenLoad() 9329 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() 9402 SelectionDAG &DAG = DCI.DAG; in performSHLPtrCombine() 9433 SelectionDAG &DAG = DCI.DAG; in performMemSDNodeCombine() 9466 DAGCombinerInfo &DCI, in splitBinaryBitConstantOp() argument 9573 if (DCI.isBeforeLegalize()) in performAndCombine() 9576 SelectionDAG &DAG = DCI.DAG; in performAndCombine() 9759 SelectionDAG &DAG = DCI.DAG; in performOrCombine() 9962 SelectionDAG &DAG = DCI.DAG; in performClassCombine() 10234 SelectionDAG &DAG = DCI.DAG; in performFCanonicalizeCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 694 unsigned Index, DAGCombinerInfo &DCI, 697 DAGCombinerInfo &DCI) const; 701 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 703 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const; 704 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 708 SDValue combineFP_ROUND(SDNode *N, DAGCombinerInfo &DCI) const; 709 SDValue combineFP_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 710 SDValue combineINT_TO_FP(SDNode *N, DAGCombinerInfo &DCI) const; 711 SDValue combineBSWAP(SDNode *N, DAGCombinerInfo &DCI) const; 712 SDValue combineBR_CCMASK(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | SystemZISelLowering.cpp | 6055 SelectionDAG &DAG = DCI.DAG; in combineExtract() 6194 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND() 6223 SelectionDAG &DAG = DCI.DAG; in combineSIGN_EXTEND_INREG() 6244 SelectionDAG &DAG = DCI.DAG; in combineSIGN_EXTEND() 6271 SelectionDAG &DAG = DCI.DAG; in combineMERGE() 6305 SelectionDAG &DAG = DCI.DAG; in combineLOAD() 6387 SelectionDAG &DAG = DCI.DAG; in combineSTORE() 6524 SelectionDAG &DAG = DCI.DAG; in combineVECTOR_SHUFFLE() 6563 SelectionDAG &DAG = DCI.DAG; in combineEXTRACT_VECTOR_ELT() 6604 SelectionDAG &DAG = DCI.DAG; in combineJOIN_DWORDS() [all …]
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| /llvm-project-15.0.7/clang/lib/AST/ |
| H A D | ASTImporterLookupTable.cpp | 150 auto DCI = LookupTable.find(DC->getPrimaryContext()); in lookup() local 151 if (DCI == LookupTable.end()) in lookup() 154 const auto &FoundNameMap = DCI->second; in lookup() 167 auto DCI = LookupTable.find(DC->getPrimaryContext()); in dump() local 168 if (DCI == LookupTable.end()) in dump() 170 const auto &FoundNameMap = DCI->second; in dump()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 1404 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const; 1405 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const; 1406 SDValue combineSRL(SDNode *N, DAGCombinerInfo &DCI) const; 1407 SDValue combineMUL(SDNode *N, DAGCombinerInfo &DCI) const; 1408 SDValue combineADD(SDNode *N, DAGCombinerInfo &DCI) const; 1409 SDValue combineFMALike(SDNode *N, DAGCombinerInfo &DCI) const; 1410 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const; 1411 SDValue combineSetCC(SDNode *N, DAGCombinerInfo &DCI) const; 1412 SDValue combineABS(SDNode *N, DAGCombinerInfo &DCI) const; 1413 SDValue combineVSelect(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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| H A D | PPCISelLowering.cpp | 13374 SelectionDAG &DAG = DCI.DAG; in ConvertSETCCToSubtract() 13412 SelectionDAG &DAG = DCI.DAG; in DAGCombineTruncBoolExt() 13688 SelectionDAG &DAG = DCI.DAG; in DAGCombineExtBoolTrunc() 14014 SelectionDAG &DAG = DCI.DAG; in combineElementTruncationToVectorTruncation() 14363 SelectionDAG &DAG = DCI.DAG; in DAGCombineBuildVector() 14458 SelectionDAG &DAG = DCI.DAG; in combineFPToIntToFP() 14564 SelectionDAG &DAG = DCI.DAG; in expandVSXLoadForLE() 14630 SelectionDAG &DAG = DCI.DAG; in expandVSXStoreForLE() 14689 SelectionDAG &DAG = DCI.DAG; in combineStoreFPToInt() 15051 SelectionDAG &DAG = DCI.DAG; in combineVReverseMemOP() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 12354 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 12415 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD() 12455 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL() 12910 SelectionDAG &DAG(DCI.DAG); in PerformAddcSubcCombine() 13687 if (DCI.isBeforeLegalize()) in PerformSHLSimplify() 13992 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine() 14070 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in CombineANDShift() 16039 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformVLDCombine() 16047 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMVEVLDCombine() 16269 if (CombineVLDDUP(N, DCI)) in PerformVDUPLANECombine() [all …]
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| H A D | ARMISelLowering.h | 428 SDValue PerformIntrinsicCombine(SDNode *N, DAGCombinerInfo &DCI) const; 429 SDValue PerformMVEExtCombine(SDNode *N, DAGCombinerInfo &DCI) const; 430 SDValue PerformMVETruncCombine(SDNode *N, DAGCombinerInfo &DCI) const; 431 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/ |
| H A D | DynamicType.cpp | 218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson() argument 220 return Out << "\"from\": \"" << DCI.from() << "\", \"to\": \"" << DCI.to() in printJson() 221 << "\", \"kind\": \"" << (DCI.succeeds() ? "success" : "fail") in printJson()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 403 TargetLowering::DAGCombinerInfo &DCI, in performANDCombine() argument 405 if (DCI.isBeforeLegalizeOps()) in performANDCombine() 466 TargetLowering::DAGCombinerInfo &DCI, in performSRLCombine() argument 468 if (DCI.isBeforeLegalizeOps()) in performSRLCombine() 507 TargetLowering::DAGCombinerInfo &DCI, in performORCombine() argument 519 if (DCI.isBeforeLegalizeOps()) in performORCombine() 725 DAGCombinerInfo &DCI) const { in PerformDAGCombine() 726 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine() 731 return performANDCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 733 return performORCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() [all …]
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| H A D | LoongArchISelLowering.h | 64 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 599 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits() 615 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedBits() 2724 SelectionDAG &DAG = DCI.DAG; in SimplifyDemandedVectorElts() 3678 SelectionDAG &DAG = DCI.DAG; in foldSetCCWithAnd() 3822 SelectionDAG &DAG = DCI.DAG; in optimizeSetCCOfSignedTruncationCheck() 3853 SelectionDAG &DAG = DCI.DAG; in optimizeSetCCByHoistingAndByConstFromLogicalShift() 3925 SelectionDAG &DAG = DCI.DAG; in foldSetCCWithBinOp() 4137 SelectionDAG &DAG = DCI.DAG; in SimplifySetCC() 6123 DCI.AddToWorklist(N); in buildUREMEqFold() 6143 SelectionDAG &DAG = DCI.DAG; in prepareUREMEqFold() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14620 SelectionDAG &DAG = DCI.DAG; in tryCombineToEXTR() 14661 SelectionDAG &DAG = DCI.DAG; in tryCombineToBSL() 14817 SelectionDAG &DAG = DCI.DAG; in performORCombine() 14868 SelectionDAG &DAG = DCI.DAG; in performSVEAndCombine() 14956 SelectionDAG &DAG = DCI.DAG; in performANDCombine() 15063 SelectionDAG &DAG = DCI.DAG; in performFirstTrueTestVectorCombine() 15100 SelectionDAG &DAG = DCI.DAG; in performLastTrueTestVectorCombine() 16243 if (DCI.isBeforeLegalize()) in tryConvertSVEWideCompare() 17797 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in performNEONPostLDSTCombine() 18429 return DCI.DAG.getMergeValues({Res, DCI.DAG.getConstant(0, DL, MVT::i32)}, in performFlagSettingCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1423 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument 1425 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 1447 combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUseCommutative() argument 1452 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative() 1455 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative() 1462 TargetLowering::DAGCombinerInfo &DCI) { in PerformSUBCombine() argument 1468 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, /*AllOnes=*/false)) in PerformSUBCombine() 1475 DAGCombinerInfo &DCI) const { in PerformDAGCombine() 1482 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/false); in PerformDAGCombine() 1484 return combineSelectAndUseCommutative(N, DCI, /*AllOnes=*/true); in PerformDAGCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 187 SDValue PerformBITCASTCombine(SDNode *N, DAGCombinerInfo &DCI) const; 192 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 4479 SelectionDAG &DAG = DCI.DAG; in PerformADDCombineWithOperands() 4672 DCI.CombineTo(N, Val, AddTo); in PerformANDCombine() 4687 SelectionDAG &DAG = DCI.DAG; in PerformREMCombine() 4811 RHS = DCI.DAG.getConstant(MulVal, DL, MulType); in TryMULWIDECombine() 4853 if (SDValue Ret = TryMULWIDECombine(N, DCI)) in PerformMULCombine() 4866 if (SDValue Ret = TryMULWIDECombine(N, DCI)) in PerformSHLCombine() 4903 return PerformMULCombine(N, DCI, OptLevel); in PerformDAGCombine() 4905 return PerformSHLCombine(N, DCI, OptLevel); in PerformDAGCombine() 4907 return PerformANDCombine(N, DCI); in PerformDAGCombine() 4910 return PerformREMCombine(N, DCI, OptLevel); in PerformDAGCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.h | 201 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 203 SDValue combineTRUNCATE(SDNode *N, DAGCombinerInfo &DCI) const;
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.h | 96 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3626 DAGCombinerInfo &DCI) const; 3632 DAGCombinerInfo &DCI) const; 3677 DAGCombinerInfo &DCI) const; 3850 bool foldBooleans, DAGCombinerInfo &DCI, 4964 const SDLoc &DL, DAGCombinerInfo &DCI) const; 4970 DAGCombinerInfo &DCI, 4976 DAGCombinerInfo &DCI, const SDLoc &DL) const; 4980 DAGCombinerInfo &DCI, const SDLoc &DL, 4983 ISD::CondCode Cond, DAGCombinerInfo &DCI, 4988 DAGCombinerInfo &DCI, const SDLoc &DL, [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 550 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine() 659 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine() 740 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine() 1050 if (DCI.isBeforeLegalizeOps()) { in performSUBCombine() 1065 if (DCI.isBeforeLegalizeOps()) { in performADDCombine() 1147 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine() 1161 return performANDCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1163 return performORCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1165 return performADDCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() 1167 return performSHLCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2436 auto &DAG = DCI.DAG; in performVECTOR_SHUFFLECombine() 2460 performVectorExtendCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) { in performVectorExtendCombine() argument 2461 auto &DAG = DCI.DAG; in performVectorExtendCombine() 2508 auto &DAG = DCI.DAG; in performVectorTruncZeroCombine() 2707 TargetLowering::DAGCombinerInfo &DCI) { in performTruncateCombine() argument 2708 auto &DAG = DCI.DAG; in performTruncateCombine() 2735 DAGCombinerInfo &DCI) const { in PerformDAGCombine() 2740 return performVECTOR_SHUFFLECombine(N, DCI); in PerformDAGCombine() 2743 return performVectorExtendCombine(N, DCI); in PerformDAGCombine() 2748 return performVectorTruncZeroCombine(N, DCI); in PerformDAGCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44451 DCI.AddToWorklist(U); in combineVSelectToBLENDV() 45885 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in combineCMov() 46384 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in combineMul() 48026 DCI.AddToWorklist(N); in combineAnd() 48500 DCI.AddToWorklist(N); in combineOr() 49248 DCI.AddToWorklist(N); in combineMaskedLoad() 49322 DCI.AddToWorklist(N); in combineMaskedStore() 49640 DCI.AddToWorklist(N); in combineVEXTRACT_STORE() 51348 DCI.AddToWorklist(N); in combineBT() 51680 DCI.CombineTo(N, Setcc); in combineSext() [all …]
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