| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 336 SmallVector<CCValAssign, 16> ArgLocs; in lowerReturn() local 339 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn() 350 if (!handleAssignments(RetHandler, RetInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerReturn() 388 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local 389 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments() 405 if (!handleAssignments(Handler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerFormalArguments() 500 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local 509 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall() 524 if (!handleAssignments(ArgHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerCall() 557 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local [all …]
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| H A D | MipsISelLowering.cpp | 3175 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 3177 CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext(), in LowerCall() 3268 for (unsigned i = 0, e = ArgLocs.size(), OutIdx = 0; i != e; ++i, ++OutIdx) { in LowerCall() 3270 CCValAssign &VA = ArgLocs[i]; in LowerCall() 3314 Register LocRegHigh = ArgLocs[++i].getLocReg(); in LowerCall() 3638 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 3639 MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments() 3656 for (unsigned i = 0, e = ArgLocs.size(), InsIdx = 0; i != e; ++i, ++InsIdx) { in LowerFormalArguments() 3657 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments() 3704 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments() [all …]
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| H A D | MipsFastISel.cpp | 1134 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local 1135 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs() 1146 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in processCallArgs() 1147 CCValAssign &VA = ArgLocs[i]; in processCallArgs()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 274 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local 276 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() 503 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArgumentsKernel() local 587 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local 588 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments() 713 if (!handleAssignments(Handler, SplitArgs, CCInfo, ArgLocs, B)) in lowerFormalArguments() 1232 SmallVector<CCValAssign, 16> ArgLocs; in lowerTailCall() local 1233 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall() 1253 if (!handleAssignments(Handler, OutArgs, CCInfo, ArgLocs, MIRBuilder)) in lowerTailCall() 1352 SmallVector<CCValAssign, 16> ArgLocs; in lowerCall() local [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 276 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 277 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall() 300 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall() 301 CCValAssign &VA = ArgLocs[i]; in LowerCall() 494 SmallVector<CCValAssign, 16> ArgLocs; in LowerCallArguments() local 495 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCallArguments() 517 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCallArguments() 518 CCValAssign &VA = ArgLocs[i]; in LowerCallArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 524 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 564 if (!ArgLocs.back().isMemLoc()) in LowerCall() 595 CCValAssign &VA = ArgLocs[i]; in LowerCall() 674 CCValAssign &VA = ArgLocs[i]; in LowerCall() 882 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 893 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments() 1208 SmallVector<CCValAssign, 16> ArgLocs; in IsEligibleForTailCallOptimization() local 1213 if (!ArgLocs[i].isRegLoc()) in IsEligibleForTailCallOptimization() 1238 SmallVector<CCValAssign, 16> ArgLocs; in IsEligibleForTailCallOptimization() local 1251 CCValAssign &VA = ArgLocs[i]; in IsEligibleForTailCallOptimization() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 316 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 317 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments() 320 for (auto &VA : ArgLocs) { in LowerFormalArguments() 394 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 395 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall() 419 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs); in LowerCall() 421 CCValAssign &VA = ArgLocs[i]; in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 545 SmallVector<CCValAssign, 16> ArgLocs; in determineAndHandleAssignments() local 547 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, F.getContext()); in determineAndHandleAssignments() 551 return handleAssignments(Handler, Args, CCInfo, ArgLocs, MIRBuilder, in determineAndHandleAssignments() 627 SmallVectorImpl<CCValAssign> &ArgLocs, in handleAssignments() argument 652 assert(j < ArgLocs.size() && "Skipped too many arg locs"); in handleAssignments() 653 CCValAssign &VA = ArgLocs[j]; in handleAssignments() 659 Args[i], makeArrayRef(ArgLocs).slice(j), &Thunk); in handleAssignments() 697 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments() 712 CCValAssign &VA = ArgLocs[j + Idx]; in handleAssignments()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 456 SmallVectorImpl<CCValAssign> &ArgLocs, in AnalyzeArguments() argument 627 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local 628 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments() 630 AnalyzeArguments(CCInfo, ArgLocs, Ins); in LowerCCCArguments() 638 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments() 639 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() 707 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments() 812 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local 815 AnalyzeArguments(CCInfo, ArgLocs, Outs); in LowerCCCCallTo() 828 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 906 SmallVector<CCValAssign> ArgLocs; in LowerFormalArguments() local 907 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments() 911 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) in LowerFormalArguments() 912 InVals.push_back(unpackFromRegLoc(DAG, Chain, ArgLocs[i], DL, *this)); in LowerFormalArguments() 940 SmallVector<CCValAssign> ArgLocs; in LowerCall() local 941 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall() 958 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall() 959 CCValAssign &VA = ArgLocs[i]; in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 437 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32() local 447 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32() 630 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_64() local 639 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_64() 806 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32() local 866 CCValAssign &VA = ArgLocs[i]; in LowerCall_32() 1142 const CCValAssign &VA = ArgLocs[i]; in fixupVariableFloatArgs() 1180 ArgLocs[i] = NewVA; in fixupVariableFloatArgs() 1197 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_64() local 1231 const CCValAssign &VA = ArgLocs[i]; in LowerCall_64() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 337 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 338 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments() 342 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments() 343 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments() 514 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 515 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall() 562 for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall() 563 CCValAssign &VA = ArgLocs[i]; in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 443 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local 444 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments() 452 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments() 453 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() 608 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local 609 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo() 662 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCCCCallTo() 663 CCValAssign &VA = ArgLocs[I]; in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CallLowering.h | 404 SmallVectorImpl<CCValAssign> &ArgLocs, 413 const SmallVectorImpl<CCValAssign> &ArgLocs,
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| /llvm-project-15.0.7/clang-tools-extra/clangd/ |
| H A D | AST.cpp | 275 llvm::SmallVector<TemplateArgumentLoc> ArgLocs; in printTemplateSpecializationArgs() local 276 ArgLocs.reserve(STL.getNumArgs()); in printTemplateSpecializationArgs() 278 ArgLocs.push_back(STL.getArgLoc(I)); in printTemplateSpecializationArgs() 279 printTemplateArgumentList(OS, ArgLocs, Policy); in printTemplateSpecializationArgs()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1074 SmallVectorImpl<CCValAssign> &ArgLocs, in analyzeArguments() argument 1219 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 1220 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments() 1227 analyzeArguments(nullptr, &MF.getFunction(), &DL, Ins, ArgLocs, CCInfo, in LowerFormalArguments() 1232 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments() 1329 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 1330 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall() 1353 analyzeArguments(&CLI, F, &DAG.getDataLayout(), Outs, ArgLocs, CCInfo, in LowerCall() 1367 for (AI = 0, AE = ArgLocs.size(); AI != AE; ++AI) { in LowerCall() 1368 CCValAssign &VA = ArgLocs[AI]; in LowerCall() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 474 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local 476 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn() 499 SmallVector<CCValAssign, 16> ArgLocs; in handleMustTailForwardedRegisters() local 500 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs, in handleMustTailForwardedRegisters()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1112 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local 1113 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo() 1139 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo() 1140 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo() 1267 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local 1268 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments() 1292 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments() 1294 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 442 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 443 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments() 451 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments() 452 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments() 536 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments() 586 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 587 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall() 675 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall() 676 CCValAssign &VA = ArgLocs[i]; in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 1883 SmallVector<CCValAssign, 16> ArgLocs; in ProcessCallArgs() local 1884 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs() 1890 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs() 1891 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() 1905 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs() 1940 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs() 1941 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() 1989 CCValAssign &NextVA = ArgLocs[++i]; in ProcessCallArgs()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1382 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local 1383 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs() 1392 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs() 1393 CCValAssign &VA = ArgLocs[I]; in processCallArgs() 1430 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in processCallArgs() 1431 CCValAssign &VA = ArgLocs[I]; in processCallArgs()
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| H A D | PPCISelLowering.cpp | 4048 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32SVR4() local 4062 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32SVR4() 5833 CCValAssign &VA = ArgLocs[i]; in LowerCall_32SVR4() 6949 CCValAssign &VA = ArgLocs[I++]; in LowerFormalArguments_AIX() 6994 assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() && in LowerFormalArguments_AIX() 6996 VA = ArgLocs[I++]; in LowerFormalArguments_AIX() 7016 if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) { in LowerFormalArguments_AIX() 7318 if (ArgLocs[I].isMemLoc()) { in LowerCall_AIX() 7375 CCValAssign &VA = ArgLocs[I++]; in LowerCall_AIX() 7413 assert(ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() && in LowerCall_AIX() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 429 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 430 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, *DAG.getContext(), in LowerCall() 445 for (const CCValAssign &VA : ArgLocs) { in LowerCall() 467 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall() 468 CCValAssign &VA = ArgLocs[i]; in LowerCall() 786 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local 787 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, in LowerFormalArguments() 823 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments() 824 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1106 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local 1107 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall() 1122 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(), in LowerCall() 1140 assert(ArgLocs[ValNo].getValNo() == ValNo && in LowerCall() 1142 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset(); in LowerCall()
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| /llvm-project-15.0.7/clang/include/clang/ASTMatchers/ |
| H A D | ASTMatchersInternal.h | 2296 llvm::ArrayRef<TemplateArgumentLoc> ArgLocs = Node.template_arguments(); 2297 return Index < ArgLocs.size() && 2298 InnerMatcher.matches(ArgLocs[Index], Finder, Builder);
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