4048   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_32SVR4()  local
4049   PPCCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,  in LowerFormalArguments_32SVR4()
4061   for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {  in LowerFormalArguments_32SVR4()
4062     CCValAssign &VA = ArgLocs[i];  in LowerFormalArguments_32SVR4()
4113         Register RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);  in LowerFormalArguments_32SVR4()
5746   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_32SVR4()  local
5747   PPCCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());  in LowerCall_32SVR4()
5830   for (unsigned i = 0, RealArgIdx = 0, j = 0, e = ArgLocs.size();  in LowerCall_32SVR4()
5833     CCValAssign &VA = ArgLocs[i];  in LowerCall_32SVR4()
5891         RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),  in LowerCall_32SVR4()
6934   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_AIX()  local
6938   AIXCCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());  in LowerFormalArguments_AIX()
6948   for (size_t I = 0, End = ArgLocs.size(); I != End; /* No increment here */) {  in LowerFormalArguments_AIX()
6949     CCValAssign &VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
6994         assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerFormalArguments_AIX()
6996         VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
7016       if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) {  in LowerFormalArguments_AIX()
7119       for (; Offset != StackSize && ArgLocs[I].isRegLoc();  in LowerFormalArguments_AIX()
7121         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7124         const CCValAssign RL = ArgLocs[I++];  in LowerFormalArguments_AIX()
7130         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7132         assert(ArgLocs[I].isMemLoc() && "Expected MemLoc for remaining bytes.");  in LowerFormalArguments_AIX()
7236   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_AIX()  local
7237   AIXCCState CCInfo(CFlags.CallConv, CFlags.IsVarArg, MF, ArgLocs,  in LowerCall_AIX()
7275   for (unsigned I = 0, E = ArgLocs.size(); I != E;) {  in LowerCall_AIX()
7276     const unsigned ValNo = ArgLocs[I].getValNo();  in LowerCall_AIX()
7301       while (LoadOffset + PtrByteSize <= ByValSize && ArgLocs[I].isRegLoc()) {  in LowerCall_AIX()
7305         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7315       assert(ArgLocs[I].getValNo() == ValNo &&  in LowerCall_AIX()
7318       if (ArgLocs[I].isMemLoc()) {  in LowerCall_AIX()
7320         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7370       const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7375     CCValAssign &VA = ArgLocs[I++];  in LowerCall_AIX()
7413         assert(ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7415         CCValAssign RegVA = ArgLocs[I++];  in LowerCall_AIX()
7432       if (I != E && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7433           ArgLocs[I].getValNo() == OriginalValNo) {  in LowerCall_AIX()
7489         CCValAssign &PeekArg = ArgLocs[I];  in LowerCall_AIX()
7492           CCValAssign &GPR2 = ArgLocs[I++];  in LowerCall_AIX()