| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 1427 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
1428 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i1, 3 }, in getCastInstrCost()
1429 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i1, 8 }, in getCastInstrCost()
1430 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
1431 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i8, 3 }, in getCastInstrCost()
1519 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
1523 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 5 }, in getCastInstrCost()
1529 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
1533 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 8 }, in getCastInstrCost()
1534 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 6 }, in getCastInstrCost()
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| H A D | X86ISelLowering.cpp | 328 for (auto VT : { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
339 for (auto VT : { MVT::f32, MVT::f64, MVT::f80, MVT::f128, in X86TargetLowering()
340 MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
428 for (auto VT : { MVT::f32, MVT::f64, MVT::f80, MVT::f128 }) { in X86TargetLowering()
432 for (auto VT : { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
479 for (auto VT : { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
1025 for (MVT RoundedTy : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { in X86TargetLowering()
1089 for (auto VT : { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) in X86TargetLowering()
1275 for (MVT VT : { MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64, in X86TargetLowering()
1421 MVT::v4f32, MVT::v8f32, MVT::v2f64, MVT::v4f64}) { in X86TargetLowering()
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| /freebsd-12.1/contrib/llvm/include/llvm/Support/ |
| H A D | MachineValueType.h | 30 class MVT {
331 return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 || in is16BitVector()
337 return (SimpleTy == MVT::v32i1 || SimpleTy == MVT::v4i8 || in is32BitVector()
338 SimpleTy == MVT::v2i16 || SimpleTy == MVT::v1i32 || in is32BitVector()
339 SimpleTy == MVT::v2f16 || SimpleTy == MVT::v1f32); in is32BitVector()
347 SimpleTy == MVT::v2f32 || SimpleTy == MVT::v1f64); in is64BitVector()
363 SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64); in is256BitVector()
390 SimpleTy==MVT::iAny || SimpleTy==MVT::fAny || in isOverloaded()
391 SimpleTy==MVT::vAny || SimpleTy==MVT::iPTRAny); in isOverloaded()
827 static MVT getVectorVT(MVT VT, unsigned NumElements) { in getVectorVT()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 249 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
250 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
251 { ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
252 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
253 { ISD::FP_TO_SINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
254 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
255 { ISD::FP_TO_SINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
256 { ISD::FP_TO_UINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
279 { ISD::SINT_TO_FP, MVT::f32, MVT::i1, 2 }, in getCastInstrCost()
280 { ISD::UINT_TO_FP, MVT::f32, MVT::i1, 2 }, in getCastInstrCost()
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| H A D | ARMISelLowering.cpp | 208 VT != MVT::v2i64 && VT != MVT::v1i64) in addTypeForNEON()
724 for (MVT Ty : {MVT::v8i8, MVT::v4i8, MVT::v2i8, MVT::v4i16, MVT::v2i16, in ARMTargetLowering()
776 for (MVT VT : MVT::fp_valuetypes()) { in ARMTargetLowering()
1234 case MVT::f32: case MVT::f64: case MVT::v8i8: case MVT::v4i16: in findRepresentativeClass()
1235 case MVT::v2i32: case MVT::v1i64: case MVT::v2f32: in findRepresentativeClass()
1244 case MVT::v16i8: case MVT::v8i16: case MVT::v4i32: case MVT::v2i64: in findRepresentativeClass()
1245 case MVT::v4f32: case MVT::v2f64: in findRepresentativeClass()
4931 EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64; in LowerFCOPYSIGN()
7931 DAG.getVTList(MVT::Untyped, MVT::i32, MVT::Other), Ops); in ReplaceCMP_SWAP_64Results()
11993 MVT StoreType = MVT::i8; in PerformSTORECombine()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | ValueTypes.cpp | 281 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT()
284 if (HandleUnknown) return MVT(MVT::Other); in getVT()
287 return MVT::isVoid; in getVT()
290 case Type::HalfTyID: return MVT(MVT::f16); in getVT()
291 case Type::FloatTyID: return MVT(MVT::f32); in getVT()
292 case Type::DoubleTyID: return MVT(MVT::f64); in getVT()
293 case Type::X86_FP80TyID: return MVT(MVT::f80); in getVT()
294 case Type::X86_MMXTyID: return MVT(MVT::x86mmx); in getVT()
295 case Type::FP128TyID: return MVT(MVT::f128); in getVT()
296 case Type::PPC_FP128TyID: return MVT(MVT::ppcf128); in getVT()
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| H A D | TargetLoweringBase.cpp | 587 for (MVT VT : MVT::all_valuetypes()) { in initActions()
678 for (MVT VT : {MVT::f32, MVT::f64, MVT::f128}) { in initActions()
893 MVT NewVT = MVT::getVectorVT(EltTy, NumElts); in getVectorTypeBreakdownMVT()
1105 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties()
1135 TransformToType[MVT::f128] = MVT::i128; in computeRegisterProperties()
1144 TransformToType[MVT::f64] = MVT::i64; in computeRegisterProperties()
1153 TransformToType[MVT::f32] = MVT::i32; in computeRegisterProperties()
1163 TransformToType[MVT::f16] = MVT::f32; in computeRegisterProperties()
1170 MVT VT = (MVT::SimpleValueType) i; in computeRegisterProperties()
1183 MVT SVT = (MVT::SimpleValueType) nVT; in computeRegisterProperties()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 294 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 }, in getCastInstrCost()
295 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 }, in getCastInstrCost()
296 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, in getCastInstrCost()
297 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, in getCastInstrCost()
318 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
319 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
320 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
321 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
322 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
323 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, in getCastInstrCost()
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| H A D | AArch64ISelDAGToDAG.cpp | 2145 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOrAndImm()
2234 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOr()
2416 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertInZeroOp()
2740 MVT RegTy = MemTy == MVT::i64 ? MVT::i64 : MVT::i32; in SelectCMP_SWAP()
3807 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
3811 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
3815 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
3826 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
3830 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
3834 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
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| H A D | AArch64FastISel.cpp | 404 if (VT != MVT::f32 && VT != MVT::f64) in materializeFP()
529 if (VT != MVT::f32 && VT != MVT::f64) in fastMaterializeFloatZero()
980 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) in isTypeSupported()
2891 if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) { in selectIntToFP()
3204 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) in fastLowerCall()
3862 if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16) in selectRet()
3904 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16 && in selectTrunc()
3907 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8 && in selectTrunc()
4059 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSL_ri()
4166 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSR_ri()
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| H A D | AArch64ISelLowering.cpp | 117 static const MVT MVT_CC = MVT::i32;
446 for (MVT Ty : {MVT::f32, MVT::f64}) { in AArch64TargetLowering()
739 for (MVT Ty : {MVT::v2f32, MVT::v4f32, MVT::v2f64}) { in AArch64TargetLowering()
764 if (VT == MVT::v2f32 || VT == MVT::v4f32 || VT == MVT::v2f64) { in addTypeForNEON()
2339 MVT NewVT = MVT::getVectorVT(MVT::f32, NumElts); in LowerVectorFP_TO_INT()
4543 if (VT == MVT::f32 || VT == MVT::v2f32 || VT == MVT::v4f32) { in LowerFCOPYSIGN()
4544 VecVT = (VT == MVT::v2f32 ? MVT::v2i32 : MVT::v4i32); in LowerFCOPYSIGN()
4557 VecVT = (VT == MVT::v4f16 ? MVT::v4i16 : MVT::v8i16); in LowerFCOPYSIGN()
6526 MVT IndexVT = MVT::v8i8; in GenerateTBL()
9478 MVT MidVT = (N00VT == MVT::v2i64 ? MVT::v4i32 : MVT::v8i16); in performConcatVectorsCombine()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 50 case MVT::Other: return "UNKNOWN"; in getName()
60 case MVT::i1: return "MVT::i1"; in getEnumName()
61 case MVT::i8: return "MVT::i8"; in getEnumName()
62 case MVT::i16: return "MVT::i16"; in getEnumName()
588 MVT::SimpleValueType VT; in CodeGenIntrinsic()
599 VT == MVT::iAny || VT == MVT::vAny) && in CodeGenIntrinsic()
604 if (MVT(VT).isOverloaded()) { in CodeGenIntrinsic()
610 if (VT == MVT::isVoid) in CodeGenIntrinsic()
622 MVT::SimpleValueType VT; in CodeGenIntrinsic()
638 VT == MVT::iAny || VT == MVT::vAny) && in CodeGenIntrinsic()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 17 static const MVT LegalV64[] = { MVT::v64i8, MVT::v32i16, MVT::v16i32 };
18 static const MVT LegalW64[] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 };
19 static const MVT LegalV128[] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 };
20 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
62 MVT ByteV = Use64b ? MVT::v64i8 : MVT::v128i8; in initializeHVXLowering()
63 MVT ByteW = Use64b ? MVT::v128i8 : MVT::v256i8; in initializeHVXLowering()
498 MVT ByteTy = MVT::getVectorVT(MVT::i8, HwLen); in createHvxPrefixPred()
650 MVT ByteTy = MVT::getVectorVT(MVT::i8, HwLen); in buildHvxVectorPred()
686 MVT ByteTy = MVT::getVectorVT(MVT::i8, HwLen); in extractHvxElementPred()
747 MVT ByteTy = MVT::getVectorVT(MVT::i8, HwLen); in insertHvxElementPred()
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| H A D | HexagonISelLowering.cpp | 555 bool IsLegalType = VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32 || in getPostIndexedAddressParts()
556 VT == MVT::i64 || VT == MVT::f32 || VT == MVT::f64 || in getPostIndexedAddressParts()
1392 for (MVT VT : MVT::fp_valuetypes()) in HexagonTargetLowering()
1452 MVT VT32 = MVT::getVectorVT(MVT::i32, VT.getSizeInBits()/32); in HexagonTargetLowering()
1471 for (MVT NativeVT : {MVT::v8i1, MVT::v4i1, MVT::v2i1, MVT::v4i8, in HexagonTargetLowering()
1472 MVT::v8i8, MVT::v2i16, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1492 for (MVT VT : {MVT::i16, MVT::i32, MVT::v4i8, MVT::i64, MVT::v8i8, in HexagonTargetLowering()
1493 MVT::v2i16, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1498 for (MVT VT : {MVT::v2i16, MVT::v4i8, MVT::v2i32, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1537 for (MVT VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64, MVT::f32, MVT::f64, in HexagonTargetLowering()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 178 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering()
184 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering()
345 const MVT ScalarIntVTs[] = { MVT::i32, MVT::i64 }; in AMDGPUTargetLowering()
397 MVT::v2i32, MVT::v4i32 in AMDGPUTargetLowering()
439 MVT::v2f32, MVT::v4f32 in AMDGPUTargetLowering()
759 return VT == MVT::f32 || VT == MVT::f64 || in isFAbsFree()
765 return VT == MVT::f32 || VT == MVT::f64 || in isFNegFree()
828 return Src == MVT::i32 && Dest == MVT::i64; in isZExtFree()
1472 MVT IntVT = MVT::i32; in LowerDIVREM24()
1473 MVT FltVT = MVT::f32; in LowerDIVREM24()
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| H A D | R600ISelLowering.cpp | 74 for (MVT VT : MVT::integer_valuetypes()) { in R600TargetLowering()
102 setTruncStoreAction(MVT::i32, MVT::i8, Custom); in R600TargetLowering()
103 setTruncStoreAction(MVT::i32, MVT::i16, Custom); in R600TargetLowering()
106 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom); in R600TargetLowering()
107 setTruncStoreAction(MVT::v4i32, MVT::v4i16, Custom); in R600TargetLowering()
111 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); in R600TargetLowering()
112 setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom); in R600TargetLowering()
113 setTruncStoreAction(MVT::v8i32, MVT::v8i8, Custom); in R600TargetLowering()
118 setTruncStoreAction(MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
119 setTruncStoreAction(MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
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| H A D | SIISelLowering.cpp | 251 for (MVT VT : {MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32, in SITargetLowering()
252 MVT::v2i64, MVT::v2f64, MVT::v4i16, MVT::v4f16, MVT::v32i32 }) { in SITargetLowering()
282 for (MVT Vec64 : { MVT::v2i64, MVT::v2f64 }) { in SITargetLowering()
498 for (MVT VT : {MVT::v2i16, MVT::v2f16, MVT::v4i16, MVT::v4f16}) { in SITargetLowering()
654 for (MVT VT : { MVT::v4i16, MVT::v4f16, MVT::v2i8, MVT::v4i8, MVT::v8i8 }) { in SITargetLowering()
2563 MVT PtrVT = MVT::i32; in LowerCall()
3529 return (VT == MVT::i16) ? MVT::i16 : MVT::i32; in getScalarShiftAmountTy()
4356 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT()
4892 const MVT VectorVT = VAddrScalarVT == MVT::f16 ? MVT::v2f16 : MVT::v2i16; in lowerImage()
6454 EVT RealMemVT = (MemVT == MVT::i1) ? MVT::i8 : MVT::i16; in LowerLOAD()
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 109 assert((LocVT == MVT::f32 || LocVT == MVT::f128 in CC_Sparc64_Full()
1469 for (MVT VT : MVT::fp_valuetypes()) { in SparcTargetLowering()
1475 for (MVT VT : MVT::integer_valuetypes()) in SparcTargetLowering()
2335 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_SINT()
2366 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2399 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_UINT()
2413 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
3264 if (VT == MVT::f32 || VT == MVT::i32) in getRegForInlineAsmConstraint()
3266 else if (VT == MVT::f64 || VT == MVT::i64) in getRegForInlineAsmConstraint()
3273 if (VT == MVT::f32 || VT == MVT::i32) in getRegForInlineAsmConstraint()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 157 for (MVT VT : MVT::integer_valuetypes()) { in PPCTargetLowering()
183 const MVT ScalarIntVTs[] = { MVT::i32, MVT::i64 }; in PPCTargetLowering()
2157 if (VT != MVT::v4f64 && VT != MVT::v4f32 && VT != MVT::v4i1) in isQVALIGNIShuffleMask()
7321 MVT IntermediateVT = FourEltRes ? MVT::v4i32 : MVT::v2i64; in LowerINT_TO_FPVector()
7771 MVT::v16i8, MVT::v8i16, MVT::Other, MVT::v4i32 in BuildSplatI()
9580 assert((VT == MVT::v2i64 || VT == MVT::v4i32 || VT == MVT::v8i16 || in LowerABS()
9694 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other); in ReplaceNodeResults()
12047 EVT NewVT = TargetVT == MVT::v2i64 ? MVT::v2f64 : MVT::v4f32; in combineElementTruncationToVectorTruncation()
14146 if ((MemVT == MVT::i1 || MemVT == MVT::i8 || MemVT == MVT::i16 || in isZExtFree()
14659 if (VT != MVT::v4i32 && VT != MVT::v8i16 && VT != MVT::v16i8) in combineABS()
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| H A D | PPCFastISel.cpp | 304 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { in isLoadTypeLegal()
855 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
1515 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1589 if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && in fastLowerCall()
1590 RetVT != MVT::i32 && RetVT != MVT::i64 && RetVT != MVT::f32 && in fastLowerCall()
1816 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1886 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
1889 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectTrunc()
2217 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && in PPCMaterializeInt()
2351 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 123 MVT::SimpleValueType getLegalType(MVT::SimpleValueType VT) { in getLegalType()
125 case MVT::i1: in getLegalType()
126 case MVT::i8: in getLegalType()
127 case MVT::i16: in getLegalType()
129 case MVT::i32: in getLegalType()
445 case MVT::i1: in zeroExtendToI32()
452 case MVT::i8: in zeroExtendToI32()
481 case MVT::i1: in signExtendToI32()
482 case MVT::i8: in signExtendToI32()
894 case MVT::i1: in selectSelect()
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| H A D | WebAssemblyISelLowering.cpp | 88 for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { in WebAssemblyTargetLowering()
116 for (auto T : {MVT::v16i8, MVT::v8i16}) in WebAssemblyTargetLowering()
125 for (auto T : {MVT::i32, MVT::i64}) { in WebAssemblyTargetLowering()
129 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) { in WebAssemblyTargetLowering()
143 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) { in WebAssemblyTargetLowering()
154 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) in WebAssemblyTargetLowering()
165 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) in WebAssemblyTargetLowering()
178 for (auto T : {MVT::i8, MVT::i16, MVT::i32}) in WebAssemblyTargetLowering()
193 for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) in WebAssemblyTargetLowering()
211 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, in WebAssemblyTargetLowering()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 36 MVT V = MVT::INVALID_SIMPLE_VALUE_TYPE;
42 constexpr EVT(MVT S) : V(S) {} in EVT()
59 return MVT::getFloatingPointVT(BitWidth); in getFloatingPointVT()
65 MVT M = MVT::getIntegerVT(BitWidth); in getIntegerVT()
75 MVT M = MVT::getVectorVT(VT.V, NumElements, IsScalable);
86 MVT M = MVT::getVectorVT(VT.V, EC); in getVectorVT()
104 MVT IntTy = MVT::getIntegerVT(BitWidth); in changeVectorElementTypeToInteger()
105 MVT VecTy = MVT::getVectorVT(IntTy, getVectorNumElements(), in changeVectorElementTypeToInteger()
208 return (V==MVT::iAny || V==MVT::fAny || V==MVT::vAny || V==MVT::iPTRAny); in isOverloaded()
253 MVT getSimpleVT() const { in getSimpleVT()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 358 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1) in materializeInt()
618 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) in isTypeSupported()
630 if (VT == MVT::i8 || VT == MVT::i16) in isLoadTypeLegal()
1177 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) || in processCallArgs()
1292 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) in finishCall()
1527 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) in fastLowerCall()
1751 if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16) in selectRet()
1784 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in selectTrunc()
1786 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in selectTrunc()
1898 if (((DestVT != MVT::i8) && (DestVT != MVT::i16) && (DestVT != MVT::i32)) || in emitIntExt()
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| /freebsd-12.1/contrib/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 123 for (MVT VT : MVT::integer_valuetypes()) { in XCoreTargetLowering()
190 case MVT::i8: in isZExtFree()
563 DAG.getVTList(MVT::i32, MVT::i32), Zero, Zero, in LowerSMUL_LOHI()
580 DAG.getVTList(MVT::i32, MVT::i32), LHS, RHS, in LowerUMUL_LOHI()
677 DAG.getVTList(MVT::i32, MVT::i32), AddendH, in TryExpandADDWithMul()
685 DAG.getVTList(MVT::i32, MVT::i32), AddendH, in TryExpandADDWithMul()
696 DAG.getVTList(MVT::i32, MVT::i32), AddendH, in TryExpandADDWithMul()
737 SDValue Lo = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in ExpandADDSUB()
1081 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other); in LowerCallResult()
1198 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); in LowerCCCCallTo()
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