Lines Matching refs:MVT
41 static bool CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_SRet()
42 MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_Sparc_Assign_SRet()
54 static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Split_64()
55 MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_Sparc_Assign_Split_64()
82 static bool CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Ret_Split_64()
83 MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_Sparc_Assign_Ret_Split_64()
106 static bool CC_Sparc64_Full(unsigned &ValNo, MVT &ValVT, in CC_Sparc64_Full()
107 MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_Sparc64_Full()
109 assert((LocVT == MVT::f32 || LocVT == MVT::f128 in CC_Sparc64_Full()
114 unsigned size = (LocVT == MVT::f128) ? 16 : 8; in CC_Sparc64_Full()
115 unsigned alignment = (LocVT == MVT::f128) ? 16 : 8; in CC_Sparc64_Full()
119 if (LocVT == MVT::i64 && Offset < 6*8) in CC_Sparc64_Full()
122 else if (LocVT == MVT::f64 && Offset < 16*8) in CC_Sparc64_Full()
125 else if (LocVT == MVT::f32 && Offset < 16*8) in CC_Sparc64_Full()
128 else if (LocVT == MVT::f128 && Offset < 16*8) in CC_Sparc64_Full()
141 if (LocVT == MVT::f32) in CC_Sparc64_Full()
151 static bool CC_Sparc64_Half(unsigned &ValNo, MVT &ValVT, in CC_Sparc64_Half()
152 MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_Sparc64_Half()
157 if (LocVT == MVT::f32 && Offset < 16*8) { in CC_Sparc64_Half()
164 if (LocVT == MVT::i32 && Offset < 6*8) { in CC_Sparc64_Half()
167 LocVT = MVT::i64; in CC_Sparc64_Half()
240 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
244 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
247 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, in LowerReturn_32()
281 RetOps[1] = DAG.getConstant(RetAddrOffset, DL, MVT::i32); in LowerReturn_32()
287 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn_32()
313 RetOps.push_back(DAG.getConstant(8, DL, MVT::i32)); in LowerReturn_64()
339 if (VA.getValVT() == MVT::i32 && VA.needsCustom()) { in LowerReturn_64()
340 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
341 DAG.getConstant(32, DL, MVT::i32)); in LowerReturn_64()
346 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]); in LowerReturn_64()
347 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
366 return DAG.getNode(SPISD::RET_FLAG, DL, MVT::Other, RetOps); in LowerReturn_64()
409 SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); in LowerFormalArguments_32()
411 DAG.getLoad(MVT::i32, dl, Chain, FIPtr, MachinePointerInfo()); in LowerFormalArguments_32()
418 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
422 SDValue HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32); in LowerFormalArguments_32()
431 SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); in LowerFormalArguments_32()
432 LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, MachinePointerInfo()); in LowerFormalArguments_32()
436 LoVal = DAG.getCopyFromReg(Chain, dl, loReg, MVT::i32); in LowerFormalArguments_32()
443 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments_32()
450 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); in LowerFormalArguments_32()
451 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
452 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg); in LowerFormalArguments_32()
453 else if (VA.getLocVT() != MVT::i32) { in LowerFormalArguments_32()
454 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments_32()
468 assert(VA.getValVT() == MVT::f64 || VA.getValVT() == MVT::v2i32); in LowerFormalArguments_32()
486 DAG.getLoad(MVT::i32, dl, Chain, FIPtr, MachinePointerInfo()); in LowerFormalArguments_32()
493 DAG.getLoad(MVT::i32, dl, Chain, FIPtr2, MachinePointerInfo()); in LowerFormalArguments_32()
499 DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, LoVal, HiVal); in LowerFormalArguments_32()
510 if (VA.getValVT() == MVT::i32 || VA.getValVT() == MVT::f32) { in LowerFormalArguments_32()
512 } else if (VA.getValVT() == MVT::f128) { in LowerFormalArguments_32()
531 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); in LowerFormalArguments_32()
557 SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32); in LowerFormalArguments_32()
561 SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); in LowerFormalArguments_32()
570 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains); in LowerFormalArguments_32()
605 if (VA.getValVT() == MVT::i32 && VA.needsCustom()) in LowerFormalArguments_64()
607 DAG.getConstant(32, DL, MVT::i32)); in LowerFormalArguments_64()
672 SDValue VArg = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64); in LowerFormalArguments_64()
681 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains); in LowerFormalArguments_64()
761 SDValue SizeNode = DAG.getConstant(Size, dl, MVT::i32); in LowerCall_32()
822 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
824 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
837 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerCall_32()
843 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
845 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
852 if (VA.getLocVT() == MVT::f64) { in LowerCall_32()
858 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, Arg); in LowerCall_32()
861 SDValue Part0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, in LowerCall_32()
864 SDValue Part1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, in LowerCall_32()
877 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
879 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
886 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
888 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
893 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
903 if (VA.getLocVT() != MVT::f32) { in LowerCall_32()
907 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Arg); in LowerCall_32()
915 SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32); in LowerCall_32()
918 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall_32()
926 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall_32()
946 Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, MVT::i32, 0, TF); in LowerCall_32()
948 Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32, TF); in LowerCall_32()
951 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); in LowerCall_32()
956 Ops.push_back(DAG.getTargetConstant(SRetArgSize, dl, MVT::i32)); in LowerCall_32()
989 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
990 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2i32); in LowerCall_32()
992 Chain, dl, toCallerWindow(RVLocs[i++].getLocReg()), MVT::i32, InFlag); in LowerCall_32()
995 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Lo, in LowerCall_32()
996 DAG.getConstant(0, dl, MVT::i32)); in LowerCall_32()
998 Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), MVT::i32, InFlag); in LowerCall_32()
1001 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Hi, in LowerCall_32()
1002 DAG.getConstant(1, dl, MVT::i32)); in LowerCall_32()
1050 MVT ValTy = VA.getLocVT(); in fixupVariableFloatArgs()
1053 if (!VA.isRegLoc() || (ValTy != MVT::f64 && ValTy != MVT::f128)) in fixupVariableFloatArgs()
1063 unsigned firstReg = (ValTy == MVT::f64) ? SP::D0 : SP::Q0; in fixupVariableFloatArgs()
1064 unsigned argSize = (ValTy == MVT::f64) ? 8 : 16; in fixupVariableFloatArgs()
1071 if (ValTy == MVT::f64) in fixupVariableFloatArgs()
1074 IReg, MVT::i64, CCValAssign::BCvt); in fixupVariableFloatArgs()
1076 assert(ValTy == MVT::f128 && "Unexpected type!"); in fixupVariableFloatArgs()
1080 IReg, MVT::i128, CCValAssign::BCvt); in fixupVariableFloatArgs()
1159 if (!VA.needsCustom() || VA.getValVT() != MVT::f128 in LowerCall_64()
1160 || VA.getLocVT() != MVT::i128) in LowerCall_64()
1166 if (VA.needsCustom() && VA.getValVT() == MVT::f128 in LowerCall_64()
1167 && VA.getLocVT() == MVT::i128) { in LowerCall_64()
1182 DAG.getLoad(MVT::i64, DL, Store, HiPtrOff, MachinePointerInfo()); in LowerCall_64()
1184 DAG.getLoad(MVT::i64, DL, Store, LoPtrOff, MachinePointerInfo()); in LowerCall_64()
1194 if (VA.getValVT() == MVT::i32 && VA.needsCustom()) { in LowerCall_64()
1195 Arg = DAG.getNode(ISD::SHL, DL, MVT::i64, Arg, in LowerCall_64()
1196 DAG.getConstant(32, DL, MVT::i32)); in LowerCall_64()
1202 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, in LowerCall_64()
1204 Arg = DAG.getNode(ISD::OR, DL, MVT::i64, Arg, NV); in LowerCall_64()
1229 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); in LowerCall_64()
1276 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); in LowerCall_64()
1295 if (CLI.Ins.size() == 1 && CLI.Ins[0].VT == MVT::f32 && !CLI.CS) in LowerCall_64()
1321 if (VA.getValVT() == MVT::i32 && VA.needsCustom()) in LowerCall_64()
1323 DAG.getConstant(32, DL, MVT::i32)); in LowerCall_64()
1411 MVT PtrVT = MVT::getIntegerVT(8 * TM.getPointerSize(0)); in SparcTargetLowering()
1422 addRegisterClass(MVT::i32, &SP::IntRegsRegClass); in SparcTargetLowering()
1424 addRegisterClass(MVT::f32, &SP::FPRegsRegClass); in SparcTargetLowering()
1425 addRegisterClass(MVT::f64, &SP::DFPRegsRegClass); in SparcTargetLowering()
1426 addRegisterClass(MVT::f128, &SP::QFPRegsRegClass); in SparcTargetLowering()
1429 addRegisterClass(MVT::i64, &SP::I64RegsRegClass); in SparcTargetLowering()
1433 addRegisterClass(MVT::v2i32, &SP::IntPairRegClass); in SparcTargetLowering()
1438 setOperationAction(Op, MVT::v2i32, Expand); in SparcTargetLowering()
1441 for (MVT VT : MVT::integer_vector_valuetypes()) { in SparcTargetLowering()
1442 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1443 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1444 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1446 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1447 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1448 setLoadExtAction(ISD::EXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1450 setTruncStoreAction(VT, MVT::v2i32, Expand); in SparcTargetLowering()
1451 setTruncStoreAction(MVT::v2i32, VT, Expand); in SparcTargetLowering()
1454 setOperationAction(ISD::LOAD, MVT::v2i32, Legal); in SparcTargetLowering()
1455 setOperationAction(ISD::STORE, MVT::v2i32, Legal); in SparcTargetLowering()
1456 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i32, Legal); in SparcTargetLowering()
1457 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Legal); in SparcTargetLowering()
1460 setOperationAction(ISD::LOAD, MVT::i64, Custom); in SparcTargetLowering()
1461 setOperationAction(ISD::STORE, MVT::i64, Custom); in SparcTargetLowering()
1469 for (MVT VT : MVT::fp_valuetypes()) { in SparcTargetLowering()
1470 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in SparcTargetLowering()
1471 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand); in SparcTargetLowering()
1475 for (MVT VT : MVT::integer_valuetypes()) in SparcTargetLowering()
1476 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SparcTargetLowering()
1479 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in SparcTargetLowering()
1480 setTruncStoreAction(MVT::f128, MVT::f32, Expand); in SparcTargetLowering()
1481 setTruncStoreAction(MVT::f128, MVT::f64, Expand); in SparcTargetLowering()
1490 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand); in SparcTargetLowering()
1491 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); in SparcTargetLowering()
1492 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); in SparcTargetLowering()
1495 setOperationAction(ISD::UREM, MVT::i32, Expand); in SparcTargetLowering()
1496 setOperationAction(ISD::SREM, MVT::i32, Expand); in SparcTargetLowering()
1497 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in SparcTargetLowering()
1498 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in SparcTargetLowering()
1502 setOperationAction(ISD::UREM, MVT::i64, Expand); in SparcTargetLowering()
1503 setOperationAction(ISD::SREM, MVT::i64, Expand); in SparcTargetLowering()
1504 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in SparcTargetLowering()
1505 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in SparcTargetLowering()
1509 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in SparcTargetLowering()
1510 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
1511 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in SparcTargetLowering()
1512 setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering()
1515 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); in SparcTargetLowering()
1516 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in SparcTargetLowering()
1517 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); in SparcTargetLowering()
1518 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in SparcTargetLowering()
1520 setOperationAction(ISD::BITCAST, MVT::f32, Expand); in SparcTargetLowering()
1521 setOperationAction(ISD::BITCAST, MVT::i32, Expand); in SparcTargetLowering()
1524 setOperationAction(ISD::SELECT, MVT::i32, Expand); in SparcTargetLowering()
1525 setOperationAction(ISD::SELECT, MVT::f32, Expand); in SparcTargetLowering()
1526 setOperationAction(ISD::SELECT, MVT::f64, Expand); in SparcTargetLowering()
1527 setOperationAction(ISD::SELECT, MVT::f128, Expand); in SparcTargetLowering()
1529 setOperationAction(ISD::SETCC, MVT::i32, Expand); in SparcTargetLowering()
1530 setOperationAction(ISD::SETCC, MVT::f32, Expand); in SparcTargetLowering()
1531 setOperationAction(ISD::SETCC, MVT::f64, Expand); in SparcTargetLowering()
1532 setOperationAction(ISD::SETCC, MVT::f128, Expand); in SparcTargetLowering()
1535 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in SparcTargetLowering()
1536 setOperationAction(ISD::BRIND, MVT::Other, Expand); in SparcTargetLowering()
1537 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in SparcTargetLowering()
1538 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in SparcTargetLowering()
1539 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in SparcTargetLowering()
1540 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in SparcTargetLowering()
1541 setOperationAction(ISD::BR_CC, MVT::f128, Custom); in SparcTargetLowering()
1543 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); in SparcTargetLowering()
1544 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); in SparcTargetLowering()
1545 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); in SparcTargetLowering()
1546 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); in SparcTargetLowering()
1548 setOperationAction(ISD::ADDC, MVT::i32, Custom); in SparcTargetLowering()
1549 setOperationAction(ISD::ADDE, MVT::i32, Custom); in SparcTargetLowering()
1550 setOperationAction(ISD::SUBC, MVT::i32, Custom); in SparcTargetLowering()
1551 setOperationAction(ISD::SUBE, MVT::i32, Custom); in SparcTargetLowering()
1554 setOperationAction(ISD::ADDC, MVT::i64, Custom); in SparcTargetLowering()
1555 setOperationAction(ISD::ADDE, MVT::i64, Custom); in SparcTargetLowering()
1556 setOperationAction(ISD::SUBC, MVT::i64, Custom); in SparcTargetLowering()
1557 setOperationAction(ISD::SUBE, MVT::i64, Custom); in SparcTargetLowering()
1558 setOperationAction(ISD::BITCAST, MVT::f64, Expand); in SparcTargetLowering()
1559 setOperationAction(ISD::BITCAST, MVT::i64, Expand); in SparcTargetLowering()
1560 setOperationAction(ISD::SELECT, MVT::i64, Expand); in SparcTargetLowering()
1561 setOperationAction(ISD::SETCC, MVT::i64, Expand); in SparcTargetLowering()
1562 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in SparcTargetLowering()
1563 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); in SparcTargetLowering()
1565 setOperationAction(ISD::CTPOP, MVT::i64, in SparcTargetLowering()
1567 setOperationAction(ISD::CTTZ , MVT::i64, Expand); in SparcTargetLowering()
1568 setOperationAction(ISD::CTLZ , MVT::i64, Expand); in SparcTargetLowering()
1569 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in SparcTargetLowering()
1570 setOperationAction(ISD::ROTL , MVT::i64, Expand); in SparcTargetLowering()
1571 setOperationAction(ISD::ROTR , MVT::i64, Expand); in SparcTargetLowering()
1572 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Custom); in SparcTargetLowering()
1588 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal); in SparcTargetLowering()
1590 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Legal); in SparcTargetLowering()
1593 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); in SparcTargetLowering()
1594 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Custom); in SparcTargetLowering()
1597 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i64, Legal); in SparcTargetLowering()
1598 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal); in SparcTargetLowering()
1599 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom); in SparcTargetLowering()
1600 setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Custom); in SparcTargetLowering()
1612 setOperationAction(ISD::FNEG, MVT::f64, Custom); in SparcTargetLowering()
1613 setOperationAction(ISD::FABS, MVT::f64, Custom); in SparcTargetLowering()
1616 setOperationAction(ISD::FSIN , MVT::f128, Expand); in SparcTargetLowering()
1617 setOperationAction(ISD::FCOS , MVT::f128, Expand); in SparcTargetLowering()
1618 setOperationAction(ISD::FSINCOS, MVT::f128, Expand); in SparcTargetLowering()
1619 setOperationAction(ISD::FREM , MVT::f128, Expand); in SparcTargetLowering()
1620 setOperationAction(ISD::FMA , MVT::f128, Expand); in SparcTargetLowering()
1621 setOperationAction(ISD::FSIN , MVT::f64, Expand); in SparcTargetLowering()
1622 setOperationAction(ISD::FCOS , MVT::f64, Expand); in SparcTargetLowering()
1623 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in SparcTargetLowering()
1624 setOperationAction(ISD::FREM , MVT::f64, Expand); in SparcTargetLowering()
1625 setOperationAction(ISD::FMA , MVT::f64, Expand); in SparcTargetLowering()
1626 setOperationAction(ISD::FSIN , MVT::f32, Expand); in SparcTargetLowering()
1627 setOperationAction(ISD::FCOS , MVT::f32, Expand); in SparcTargetLowering()
1628 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in SparcTargetLowering()
1629 setOperationAction(ISD::FREM , MVT::f32, Expand); in SparcTargetLowering()
1630 setOperationAction(ISD::FMA , MVT::f32, Expand); in SparcTargetLowering()
1631 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in SparcTargetLowering()
1632 setOperationAction(ISD::CTLZ , MVT::i32, Expand); in SparcTargetLowering()
1633 setOperationAction(ISD::ROTL , MVT::i32, Expand); in SparcTargetLowering()
1634 setOperationAction(ISD::ROTR , MVT::i32, Expand); in SparcTargetLowering()
1635 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in SparcTargetLowering()
1636 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in SparcTargetLowering()
1637 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SparcTargetLowering()
1638 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SparcTargetLowering()
1639 setOperationAction(ISD::FPOW , MVT::f128, Expand); in SparcTargetLowering()
1640 setOperationAction(ISD::FPOW , MVT::f64, Expand); in SparcTargetLowering()
1641 setOperationAction(ISD::FPOW , MVT::f32, Expand); in SparcTargetLowering()
1643 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1644 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1645 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in SparcTargetLowering()
1648 setOperationAction(ISD::MULHU, MVT::i32, Expand); in SparcTargetLowering()
1649 setOperationAction(ISD::MULHS, MVT::i32, Expand); in SparcTargetLowering()
1650 setOperationAction(ISD::MUL, MVT::i32, Expand); in SparcTargetLowering()
1654 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
1655 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
1658 setOperationAction(ISD::SDIV, MVT::i32, Expand); in SparcTargetLowering()
1661 setOperationAction(ISD::UDIV, MVT::i32, Expand); in SparcTargetLowering()
1669 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); in SparcTargetLowering()
1670 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in SparcTargetLowering()
1671 setOperationAction(ISD::MULHU, MVT::i64, Expand); in SparcTargetLowering()
1672 setOperationAction(ISD::MULHS, MVT::i64, Expand); in SparcTargetLowering()
1674 setOperationAction(ISD::UMULO, MVT::i64, Custom); in SparcTargetLowering()
1675 setOperationAction(ISD::SMULO, MVT::i64, Custom); in SparcTargetLowering()
1677 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
1678 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in SparcTargetLowering()
1679 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in SparcTargetLowering()
1683 setOperationAction(ISD::VASTART , MVT::Other, Custom); in SparcTargetLowering()
1685 setOperationAction(ISD::VAARG , MVT::Other, Custom); in SparcTargetLowering()
1687 setOperationAction(ISD::TRAP , MVT::Other, Legal); in SparcTargetLowering()
1688 setOperationAction(ISD::DEBUGTRAP , MVT::Other, Legal); in SparcTargetLowering()
1691 setOperationAction(ISD::VACOPY , MVT::Other, Expand); in SparcTargetLowering()
1692 setOperationAction(ISD::VAEND , MVT::Other, Expand); in SparcTargetLowering()
1693 setOperationAction(ISD::STACKSAVE , MVT::Other, Expand); in SparcTargetLowering()
1694 setOperationAction(ISD::STACKRESTORE , MVT::Other, Expand); in SparcTargetLowering()
1695 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom); in SparcTargetLowering()
1699 setOperationAction(ISD::CTPOP, MVT::i32, in SparcTargetLowering()
1703 setOperationAction(ISD::LOAD, MVT::f128, Legal); in SparcTargetLowering()
1704 setOperationAction(ISD::STORE, MVT::f128, Legal); in SparcTargetLowering()
1706 setOperationAction(ISD::LOAD, MVT::f128, Custom); in SparcTargetLowering()
1707 setOperationAction(ISD::STORE, MVT::f128, Custom); in SparcTargetLowering()
1711 setOperationAction(ISD::FADD, MVT::f128, Legal); in SparcTargetLowering()
1712 setOperationAction(ISD::FSUB, MVT::f128, Legal); in SparcTargetLowering()
1713 setOperationAction(ISD::FMUL, MVT::f128, Legal); in SparcTargetLowering()
1714 setOperationAction(ISD::FDIV, MVT::f128, Legal); in SparcTargetLowering()
1715 setOperationAction(ISD::FSQRT, MVT::f128, Legal); in SparcTargetLowering()
1716 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal); in SparcTargetLowering()
1717 setOperationAction(ISD::FP_ROUND, MVT::f64, Legal); in SparcTargetLowering()
1719 setOperationAction(ISD::FNEG, MVT::f128, Legal); in SparcTargetLowering()
1720 setOperationAction(ISD::FABS, MVT::f128, Legal); in SparcTargetLowering()
1722 setOperationAction(ISD::FNEG, MVT::f128, Custom); in SparcTargetLowering()
1723 setOperationAction(ISD::FABS, MVT::f128, Custom); in SparcTargetLowering()
1736 setOperationAction(ISD::FADD, MVT::f128, Custom); in SparcTargetLowering()
1737 setOperationAction(ISD::FSUB, MVT::f128, Custom); in SparcTargetLowering()
1738 setOperationAction(ISD::FMUL, MVT::f128, Custom); in SparcTargetLowering()
1739 setOperationAction(ISD::FDIV, MVT::f128, Custom); in SparcTargetLowering()
1740 setOperationAction(ISD::FSQRT, MVT::f128, Custom); in SparcTargetLowering()
1741 setOperationAction(ISD::FNEG, MVT::f128, Custom); in SparcTargetLowering()
1742 setOperationAction(ISD::FABS, MVT::f128, Custom); in SparcTargetLowering()
1744 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom); in SparcTargetLowering()
1745 setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); in SparcTargetLowering()
1746 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); in SparcTargetLowering()
1791 setOperationAction(ISD::FDIV, MVT::f32, Promote); in SparcTargetLowering()
1792 setOperationAction(ISD::FSQRT, MVT::f32, Promote); in SparcTargetLowering()
1796 setOperationAction(ISD::FMUL, MVT::f32, Promote); in SparcTargetLowering()
1804 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in SparcTargetLowering()
1806 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in SparcTargetLowering()
1848 return MVT::i32; in getSetCCResultType()
1983 H44 = DAG.getNode(ISD::SHL, DL, VT, H44, DAG.getConstant(12, DL, MVT::i32)); in makeAddress()
1992 Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, DAG.getConstant(32, DL, MVT::i32)); in makeAddress()
2056 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); in LowerGlobalTLSAddress()
2086 unsigned ldTF = ((PtrVT == MVT::i64)? SparcMCExpr::VK_Sparc_TLS_IE_LDX in LowerGlobalTLSAddress()
2244 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2251 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2256 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2261 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2266 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2272 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2277 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2284 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2291 return DAG.getNode(SPISD::CMPICC, DL, MVT::Glue, Result, RHS); in LowerF128Compare()
2300 if (Op.getOperand(0).getValueType() == MVT::f64) in LowerF128_FPEXTEND()
2304 if (Op.getOperand(0).getValueType() == MVT::f32) in LowerF128_FPEXTEND()
2316 if (Op.getOperand(0).getValueType() != MVT::f128) in LowerF128_FPROUND()
2319 if (Op.getValueType() == MVT::f64) in LowerF128_FPROUND()
2322 if (Op.getValueType() == MVT::f32) in LowerF128_FPROUND()
2335 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_SINT()
2338 if (Op.getOperand(0).getValueType() == MVT::f128 in LowerFP_TO_SINT()
2340 const char *libName = TLI.getLibcallName(VT == MVT::i32 in LowerFP_TO_SINT()
2351 if (VT == MVT::i32) in LowerFP_TO_SINT()
2352 Op = DAG.getNode(SPISD::FTOI, dl, MVT::f32, Op.getOperand(0)); in LowerFP_TO_SINT()
2354 Op = DAG.getNode(SPISD::FTOX, dl, MVT::f64, Op.getOperand(0)); in LowerFP_TO_SINT()
2364 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP()
2366 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2369 if (Op.getValueType() == MVT::f128 in LowerSINT_TO_FP()
2371 const char *libName = TLI.getLibcallName(OpVT == MVT::i32 in LowerSINT_TO_FP()
2383 unsigned opcode = (OpVT == MVT::i32)? SPISD::ITOF : SPISD::XTOF; in LowerSINT_TO_FP()
2395 if (Op.getOperand(0).getValueType() != MVT::f128 || in LowerFP_TO_UINT()
2399 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_UINT()
2402 TLI.getLibcallName(VT == MVT::i32 in LowerFP_TO_UINT()
2413 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
2417 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
2421 TLI.getLibcallName(OpVT == MVT::i32 in LowerUINT_TO_FP()
2445 CompareFlag = DAG.getNode(SPISD::CMPICC, dl, MVT::Glue, LHS, RHS); in LowerBR_CC()
2448 Opc = LHS.getValueType() == MVT::i32 ? SPISD::BRICC : SPISD::BRXCC; in LowerBR_CC()
2450 if (!hasHardQuad && LHS.getValueType() == MVT::f128) { in LowerBR_CC()
2455 CompareFlag = DAG.getNode(SPISD::CMPFCC, dl, MVT::Glue, LHS, RHS); in LowerBR_CC()
2460 return DAG.getNode(Opc, dl, MVT::Other, Chain, Dest, in LowerBR_CC()
2461 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag); in LowerBR_CC()
2481 CompareFlag = DAG.getNode(SPISD::CMPICC, dl, MVT::Glue, LHS, RHS); in LowerSELECT_CC()
2482 Opc = LHS.getValueType() == MVT::i32 ? in LowerSELECT_CC()
2486 if (!hasHardQuad && LHS.getValueType() == MVT::f128) { in LowerSELECT_CC()
2491 CompareFlag = DAG.getNode(SPISD::CMPFCC, dl, MVT::Glue, LHS, RHS); in LowerSELECT_CC()
2497 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag); in LowerSELECT_CC()
2610 dl, MVT::Other, DAG.getEntryNode()); in getFLUSHW()
2693 assert(SrcReg64.getValueType() == MVT::f64 && "LowerF64Op called on non-double!"); in LowerF64Op()
2705 SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32, in LowerF64Op()
2707 SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32, in LowerF64Op()
2711 Lo32 = DAG.getNode(opcode, dl, MVT::f32, Lo32); in LowerF64Op()
2713 Hi32 = DAG.getNode(opcode, dl, MVT::f32, Hi32); in LowerF64Op()
2716 dl, MVT::f64), 0); in LowerF64Op()
2717 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2719 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2737 DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(), in LowerF128Load()
2743 SDValue Lo64 = DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LoPtr, in LowerF128Load()
2746 SDValue SubRegEven = DAG.getTargetConstant(SP::sub_even64, dl, MVT::i32); in LowerF128Load()
2747 SDValue SubRegOdd = DAG.getTargetConstant(SP::sub_odd64, dl, MVT::i32); in LowerF128Load()
2750 dl, MVT::f128); in LowerF128Load()
2752 MVT::f128, in LowerF128Load()
2757 MVT::f128, in LowerF128Load()
2763 SDValue OutChain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains); in LowerF128Load()
2773 if (MemVT == MVT::f128) in LowerLOAD()
2785 SDValue SubRegEven = DAG.getTargetConstant(SP::sub_even64, dl, MVT::i32); in LowerF128Store()
2786 SDValue SubRegOdd = DAG.getTargetConstant(SP::sub_odd64, dl, MVT::i32); in LowerF128Store()
2790 MVT::f64, in LowerF128Store()
2795 MVT::f64, in LowerF128Store()
2813 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains); in LowerF128Store()
2822 if (MemVT == MVT::f128) in LowerSTORE()
2825 if (MemVT == MVT::i64) { in LowerSTORE()
2828 SDValue Val = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, St->getValue()); in LowerSTORE()
2844 if (Op.getValueType() == MVT::f64) in LowerFNEGorFABS()
2846 if (Op.getValueType() != MVT::f128) in LowerFNEGorFABS()
2855 SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64, in LowerFNEGorFABS()
2857 SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64, in LowerFNEGorFABS()
2862 Lo64 = DAG.getNode(Op.getOpcode(), dl, MVT::f64, Lo64); in LowerFNEGorFABS()
2867 Hi64 = DAG.getNode(Op.getOpcode(), dl, MVT::f64, Hi64); in LowerFNEGorFABS()
2873 dl, MVT::f128), 0); in LowerFNEGorFABS()
2874 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_even64, dl, MVT::f128, in LowerFNEGorFABS()
2876 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_odd64, dl, MVT::f128, in LowerFNEGorFABS()
2883 if (Op.getValueType() != MVT::i64) in LowerADDC_ADDE_SUBC_SUBE()
2888 SDValue Src1Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src1); in LowerADDC_ADDE_SUBC_SUBE()
2889 SDValue Src1Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Src1, in LowerADDC_ADDE_SUBC_SUBE()
2890 DAG.getConstant(32, dl, MVT::i64)); in LowerADDC_ADDE_SUBC_SUBE()
2891 Src1Hi = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src1Hi); in LowerADDC_ADDE_SUBC_SUBE()
2894 SDValue Src2Lo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src2); in LowerADDC_ADDE_SUBC_SUBE()
2895 SDValue Src2Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Src2, in LowerADDC_ADDE_SUBC_SUBE()
2896 DAG.getConstant(32, dl, MVT::i64)); in LowerADDC_ADDE_SUBC_SUBE()
2897 Src2Hi = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src2Hi); in LowerADDC_ADDE_SUBC_SUBE()
2910 SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Glue); in LowerADDC_ADDE_SUBC_SUBE()
2920 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, Lo); in LowerADDC_ADDE_SUBC_SUBE()
2921 Hi = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, Hi); in LowerADDC_ADDE_SUBC_SUBE()
2922 Hi = DAG.getNode(ISD::SHL, dl, MVT::i64, Hi, in LowerADDC_ADDE_SUBC_SUBE()
2923 DAG.getConstant(32, dl, MVT::i64)); in LowerADDC_ADDE_SUBC_SUBE()
2925 SDValue Dst = DAG.getNode(ISD::OR, dl, MVT::i64, Hi, Lo); in LowerADDC_ADDE_SUBC_SUBE()
2939 EVT VT = MVT::i64; in LowerUMULO_SMULO()
2940 EVT WideVT = MVT::i128; in LowerUMULO_SMULO()
2951 SDValue HiRHS = DAG.getNode(ISD::SRA, dl, MVT::i64, RHS, ShiftAmt); in LowerUMULO_SMULO()
2963 TopHalf = DAG.getSetCC(dl, MVT::i32, TopHalf, Tmp1, ISD::SETNE); in LowerUMULO_SMULO()
2965 TopHalf = DAG.getSetCC(dl, MVT::i32, TopHalf, DAG.getConstant(0, dl, VT), in LowerUMULO_SMULO()
3066 SDValue Lo = DAG.getConstant(V.zextOrTrunc(32), DL, MVT::i32); in bitcastConstantFPToInt()
3067 SDValue Hi = DAG.getConstant(V.lshr(32).zextOrTrunc(32), DL, MVT::i32); in bitcastConstantFPToInt()
3070 return DAG.getBuildVector(MVT::v2i32, DL, {Hi, Lo}); in bitcastConstantFPToInt()
3078 if (isa<ConstantFPSDNode>(Src) && N->getSimpleValueType(0) == MVT::v2i32 && in PerformBITCASTCombine()
3079 Src.getSimpleValueType() == MVT::f64) in PerformBITCASTCombine()
3255 MVT VT) const { in getRegForInlineAsmConstraint()
3259 if (VT == MVT::v2i32) in getRegForInlineAsmConstraint()
3264 if (VT == MVT::f32 || VT == MVT::i32) in getRegForInlineAsmConstraint()
3266 else if (VT == MVT::f64 || VT == MVT::i64) in getRegForInlineAsmConstraint()
3268 else if (VT == MVT::f128) in getRegForInlineAsmConstraint()
3273 if (VT == MVT::f32 || VT == MVT::i32) in getRegForInlineAsmConstraint()
3275 else if (VT == MVT::f64 || VT == MVT::i64 ) in getRegForInlineAsmConstraint()
3277 else if (VT == MVT::f128) in getRegForInlineAsmConstraint()
3307 if (VT == MVT::f32 || VT == MVT::Other) { in getRegForInlineAsmConstraint()
3309 } else if (VT == MVT::f64 && (intVal % 2 == 0)) { in getRegForInlineAsmConstraint()
3311 } else if (VT == MVT::f128 && (intVal % 4 == 0)) { in getRegForInlineAsmConstraint()
3345 if (N->getOperand(0).getValueType() != MVT::f128 in ReplaceNodeResults()
3346 || N->getValueType(0) != MVT::i64) in ReplaceNodeResults()
3359 SDValue Lo = DAG.getCopyFromReg(N->getOperand(0), dl, SP::ASR23, MVT::i32); in ReplaceNodeResults()
3360 SDValue Hi = DAG.getCopyFromReg(Lo, dl, SP::G0, MVT::i32); in ReplaceNodeResults()
3362 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Ops); in ReplaceNodeResults()
3370 if (N->getValueType(0) != MVT::f128 in ReplaceNodeResults()
3371 || N->getOperand(0).getValueType() != MVT::i64) in ReplaceNodeResults()
3387 if (Ld->getValueType(0) != MVT::i64 || Ld->getMemoryVT() != MVT::i64) in ReplaceNodeResults()
3392 Ld->getExtensionType(), dl, MVT::v2i32, Ld->getChain(), in ReplaceNodeResults()
3393 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, Ld->getAlignment(), in ReplaceNodeResults()
3396 SDValue Res = DAG.getNode(ISD::BITCAST, dl, MVT::i64, LoadRes); in ReplaceNodeResults()