Lines Matching refs:MVT
43 auto MVTPtr = Subtarget->hasAddr64() ? MVT::i64 : MVT::i32; in WebAssemblyTargetLowering()
58 addRegisterClass(MVT::i32, &WebAssembly::I32RegClass); in WebAssemblyTargetLowering()
59 addRegisterClass(MVT::i64, &WebAssembly::I64RegClass); in WebAssemblyTargetLowering()
60 addRegisterClass(MVT::f32, &WebAssembly::F32RegClass); in WebAssemblyTargetLowering()
61 addRegisterClass(MVT::f64, &WebAssembly::F64RegClass); in WebAssemblyTargetLowering()
63 addRegisterClass(MVT::v16i8, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
64 addRegisterClass(MVT::v8i16, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
65 addRegisterClass(MVT::v4i32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
66 addRegisterClass(MVT::v4f32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
68 addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
69 addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
79 setOperationAction(ISD::BRIND, MVT::Other, Custom); in WebAssemblyTargetLowering()
83 setOperationAction(ISD::VASTART, MVT::Other, Custom); in WebAssemblyTargetLowering()
84 setOperationAction(ISD::VAARG, MVT::Other, Expand); in WebAssemblyTargetLowering()
85 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in WebAssemblyTargetLowering()
86 setOperationAction(ISD::VAEND, MVT::Other, Expand); in WebAssemblyTargetLowering()
88 for (auto T : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { in WebAssemblyTargetLowering()
110 setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); in WebAssemblyTargetLowering()
111 setTruncStoreAction(T, MVT::f16, Expand); in WebAssemblyTargetLowering()
116 for (auto T : {MVT::v16i8, MVT::v8i16}) in WebAssemblyTargetLowering()
125 for (auto T : {MVT::i32, MVT::i64}) { in WebAssemblyTargetLowering()
129 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) { in WebAssemblyTargetLowering()
133 setOperationAction(Op, MVT::v2i64, Expand); in WebAssemblyTargetLowering()
139 setOperationAction(ISD::MUL, MVT::v2i64, Expand); in WebAssemblyTargetLowering()
143 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) { in WebAssemblyTargetLowering()
147 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); in WebAssemblyTargetLowering()
148 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); in WebAssemblyTargetLowering()
154 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) in WebAssemblyTargetLowering()
159 setOperationAction(Op, MVT::v2i64, Custom); in WebAssemblyTargetLowering()
165 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) in WebAssemblyTargetLowering()
168 for (auto T : {MVT::v2i64, MVT::v2f64}) in WebAssemblyTargetLowering()
174 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in WebAssemblyTargetLowering()
178 for (auto T : {MVT::i8, MVT::i16, MVT::i32}) in WebAssemblyTargetLowering()
181 for (auto T : MVT::integer_vector_valuetypes()) in WebAssemblyTargetLowering()
185 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in WebAssemblyTargetLowering()
186 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in WebAssemblyTargetLowering()
189 setOperationAction(ISD::FrameIndex, MVT::i32, Custom); in WebAssemblyTargetLowering()
190 setOperationAction(ISD::CopyToReg, MVT::Other, Custom); in WebAssemblyTargetLowering()
193 for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) in WebAssemblyTargetLowering()
198 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in WebAssemblyTargetLowering()
205 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
206 setTruncStoreAction(MVT::f64, MVT::f32, Expand); in WebAssemblyTargetLowering()
207 for (auto T : MVT::integer_valuetypes()) in WebAssemblyTargetLowering()
209 setLoadExtAction(Ext, T, MVT::i1, Promote); in WebAssemblyTargetLowering()
211 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, in WebAssemblyTargetLowering()
212 MVT::v2f64}) { in WebAssemblyTargetLowering()
213 for (auto MemT : MVT::vector_valuetypes()) { in WebAssemblyTargetLowering()
214 if (MVT(T) != MemT) { in WebAssemblyTargetLowering()
225 setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); in WebAssemblyTargetLowering()
226 setOperationAction(ISD::FDIV, MVT::v4f32, Expand); in WebAssemblyTargetLowering()
231 for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32}) { in WebAssemblyTargetLowering()
236 for (auto T : {MVT::v2i64, MVT::v2f64}) { in WebAssemblyTargetLowering()
244 setOperationAction(ISD::TRAP, MVT::Other, Legal); in WebAssemblyTargetLowering()
247 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in WebAssemblyTargetLowering()
248 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in WebAssemblyTargetLowering()
281 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout & /*DL*/, in getScalarShiftAmountTy()
295 MVT Result = MVT::getIntegerVT(BitWidth); in getScalarShiftAmountTy()
296 assert(Result != MVT::INVALID_SIMPLE_VALUE_TYPE && in getScalarShiftAmountTy()
450 const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const { in getRegForInlineAsmConstraint()
456 assert(VT != MVT::iPTR && "Pointer MVT not expected here"); in getRegForInlineAsmConstraint()
540 Info.memVT = MVT::i32; in getTgtMemIntrinsic()
554 Info.memVT = MVT::i32; in getTgtMemIntrinsic()
562 Info.memVT = MVT::i64; in getTgtMemIntrinsic()
650 DAG.getConstant(Out.Flags.getByValSize(), DL, MVT::i32); in LowerCall()
676 assert(VT != MVT::iPTR && "Legalized args should be concrete"); in LowerCall()
712 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in LowerCall()
745 InTys.push_back(MVT::Other); in LowerCall()
779 Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps); in LowerReturn()
824 DL, MVT::i32)) in LowerFormalArguments()
834 MVT PtrVT = getPointerTy(MF.getDataLayout()); in LowerFormalArguments()
841 DAG.getTargetConstant(Ins.size(), DL, MVT::i32))); in LowerFormalArguments()
846 SmallVector<MVT, 4> Params; in LowerFormalArguments()
847 SmallVector<MVT, 4> Results; in LowerFormalArguments()
850 for (MVT VT : Results) in LowerFormalArguments()
926 SDValue Copy(DAG.getMachineNode(VT == MVT::i32 ? WebAssembly::COPY_I32 in LowerCopyToReg()
1027 return DAG.getNode(WebAssemblyISD::BR_TABLE, DL, MVT::Other, Ops); in LowerBR_JT()
1057 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout()); in LowerINTRINSIC_WO_CHAIN()
1083 MVT PtrVT = TLI.getPointerTy(DAG.getDataLayout()); in LowerINTRINSIC_VOID()
1090 MVT::Other, // outchain type in LowerINTRINSIC_VOID()
1126 MVT VecType = Op.getOperand(0).getSimpleValueType(); in LowerVECTOR_SHUFFLE()
1142 Ops[OpIdx++] = DAG.getConstant(ByteIndex, DL, MVT::i32); in LowerVECTOR_SHUFFLE()
1164 if (LaneT.bitsGE(MVT::i32)) in UnrollVectorShift()
1207 if (!SplatConst || Op.getSimpleValueType() != MVT::v2i64) in LowerShift()
1227 DAG.getConstant(Shift, DL, MVT::i32)); in LowerShift()