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Searched refs:m_ZeroInt (Results 1 – 23 of 23) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DMIPatternMatch.h234 inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); } in m_ZeroInt() function
689 return m_GSub(m_ZeroInt(), Src);
/llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/
H A DPatternMatchTest.cpp621 EXPECT_TRUE(mi_match(Zero.getReg(0), *MRI, m_ZeroInt())); in TEST_F()
624 EXPECT_FALSE(mi_match(FortyTwo.getReg(0), *MRI, m_ZeroInt())); in TEST_F()
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DPatternMatch.h524 inline cst_pred_ty<is_zero_int> m_ZeroInt() { in m_ZeroInt() function
1997 if (AddExpr.match(ICmpLHS) && m_ZeroInt().match(ICmpRHS) && in match()
2002 if (m_ZeroInt().match(ICmpLHS) && AddExpr.match(ICmpRHS) && in match()
2274 return m_Sub(m_ZeroInt(), V);
2283 return m_NSWSub(m_ZeroInt(), V);
/llvm-project-15.0.7/llvm/lib/Transforms/AggressiveInstCombine/
H A DAggressiveInstCombine.cpp160 if (!match(TermI, m_Br(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()), in foldGuardedFunnelShift()
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp891 !match(Cmp1, m_ICmp(Pred1, m_Specific(X), m_ZeroInt()))) in foldIsPowerOf2OrZero()
916 if (JoinedByAnd && match(Cmp0, m_ICmp(Pred0, m_Value(X), m_ZeroInt())) && in foldIsPowerOf2()
924 if (!JoinedByAnd && match(Cmp0, m_ICmp(Pred0, m_Value(X), m_ZeroInt())) && in foldIsPowerOf2()
2614 PredL == PredR && match(LHS1, m_ZeroInt()) && match(RHS1, m_ZeroInt()) && in foldAndOrOfICmps()
3061 m_ZeroInt()), in visitOr()
H A DInstCombineCalls.cpp1571 if (match(Op1, m_ZeroInt()) || match(Op1, m_Undef())) in visitCallInst()
1576 if (match(Op0, m_ZeroInt()) || match(Op0, m_Undef())) in visitCallInst()
2036 if (match(KeyArg, m_ZeroInt()) && in visitCallInst()
H A DInstCombineAddSub.cpp1790 if (MinMax->isSigned() && match(Y, m_ZeroInt()) && in foldSubOfMinMax()
1866 bool IsNegation = match(Op0, m_ZeroInt()); in visitSub()
H A DInstCombineVectorOps.cpp1263 if (!match(Op0, m_InsertElt(m_Undef(), m_Specific(X), m_ZeroInt()))) in foldInsEltIntoSplat()
1951 if (match(BO0, m_ZeroInt())) in getAlternateBinop()
H A DInstCombineCasts.cpp1067 if (Cmp->hasOneUse() && match(Cmp->getOperand(1), m_ZeroInt()) && in transformZExtICmp()
1371 if ((Pred == ICmpInst::ICMP_SLT && match(Op1, m_ZeroInt())) || in transformSExtICmp()
H A DInstCombineSelect.cpp2245 if (!match(Cond, m_OneUse(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()))) || in foldSelectFunnelShift()
2592 if (!match(Cond, m_ICmp(Pred, m_Value(XLowBits), m_ZeroInt())) || in foldRoundUpIntegerWithPow2Alignment()
H A DInstCombineCompares.cpp4754 !match(Op1, m_ZeroInt())) in foldICmpEquality()
6037 (Pred == ICmpInst::ICMP_EQ && match(Op1, m_ZeroInt()) && in foldICmpOfUAddOv()
/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp133 if (!Ty || !match(&I, m_InsertElt(m_Undef(), m_Value(Scalar), m_ZeroInt())) || in vectorizeLoadInsert()
139 bool HasExtract = match(Scalar, m_ExtractElt(m_Value(X), m_ZeroInt())); in vectorizeLoadInsert()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp331 if (!mi_match(InsMI->getOperand(3).getReg(), MRI, m_ZeroInt())) in matchDupFromInsertVectorElt()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DValueTracking.cpp6038 if ((!NeedNSW && match(X, m_Sub(m_ZeroInt(), m_Specific(Y)))) || in isKnownNegation()
6039 (NeedNSW && match(X, m_NSWSub(m_ZeroInt(), m_Specific(Y))))) in isKnownNegation()
6043 if ((!NeedNSW && match(Y, m_Sub(m_ZeroInt(), m_Specific(X)))) || in isKnownNegation()
6044 (NeedNSW && match(Y, m_NSWSub(m_ZeroInt(), m_Specific(X))))) in isKnownNegation()
6180 auto ZeroOrAllOnes = m_CombineOr(m_ZeroInt(), m_AllOnes()); in matchSelectPattern()
6181 auto ZeroOrOne = m_CombineOr(m_ZeroInt(), m_One()); in matchSelectPattern()
H A DVectorUtils.cpp379 m_Shuffle(m_InsertElt(m_Value(), m_Value(Splat), m_ZeroInt()), in getSplatValue()
H A DInstructionSimplify.cpp1816 !match(Cmp1, m_ICmp(Pred1, m_Specific(X), m_ZeroInt())) || C->isZero()) in simplifyAndOrOfICmpsWithCtpop()
4431 if (match(TrueVal, m_One()) && match(FalseVal, m_ZeroInt())) in simplifySelectInst()
4436 if (match(FalseVal, m_ZeroInt())) { in simplifySelectInst()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstCombineIntrinsic.cpp1009 if (isa<UndefValue>(Op1) || match(Op1, PatternMatch::m_ZeroInt())) { in instCombineIntrinsic()
H A DAMDGPURegisterBankInfo.cpp1583 if (mi_match(Src2, MRI, m_ZeroInt())) in applyMappingMAD_64_32()
H A DAMDGPUInstructionSelector.cpp3250 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ZeroInt())) { in matchZeroExtendFromS32()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1468 else if (Pred == ICmpInst::ICMP_NE && match(B, m_ZeroInt())) in matchUAddWithOverflowConstantEdgeCases()
1532 if (Pred == ICmpInst::ICMP_EQ && match(B, m_ZeroInt())) { in combineToUSubWithOverflow()
1537 if (Pred == ICmpInst::ICMP_NE && match(B, m_ZeroInt())) { in combineToUSubWithOverflow()
6916 if (!match(SVI, m_Shuffle(m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in optimizeShuffleVectorInst()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp544 if (match(CarryIn, PatternMatch::m_ZeroInt())) { in simplifyX86addcarry()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1298 if (!match(Op, m_Shuffle(m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in shouldSinkOperands()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19072 m_InsertElt(m_Undef(), m_Value(), m_ZeroInt()), in shouldSinkOperands()