| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 521 APInt SplatValue, SplatUndef; in selectVSplat() local 529 Imm = SplatValue; in selectVSplat() 1090 APInt SplatValue, SplatUndef; in trySelect() local 1132 if (SplatValue.isSignedIntN(10)) { in trySelect() 1133 SDValue Imm = CurDAG->getTargetConstant(SplatValue, DL, in trySelect() 1137 } else if (SplatValue.isSignedIntN(16) && in trySelect() 1161 const unsigned Lo = SplatValue.getLoBits(16).getZExtValue(); in trySelect() 1170 const unsigned Lo = SplatValue.getLoBits(16).getZExtValue(); in trySelect() 1193 const unsigned Lo = SplatValue.getLoBits(16).getZExtValue(); in trySelect() 1216 } else if (SplatValue.isSignedIntN(64)) { in trySelect() [all …]
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| H A D | MipsISelDAGToDAG.cpp | 236 APInt SplatValue, SplatUndef; in selectVecAddAsVecSubIfProfitable() local 240 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVecAddAsVecSubIfProfitable() 246 if (IsInlineConstant(SplatValue)) in selectVecAddAsVecSubIfProfitable() 249 APInt NegSplatValue = 0 - SplatValue; in selectVecAddAsVecSubIfProfitable()
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| H A D | MipsSEISelLowering.cpp | 533 APInt SplatValue, SplatUndef; in isVSplat() local 541 Imm = SplatValue; in isVSplat() 558 APInt SplatValue, SplatUndef; in isVectorAllOnes() local 565 return SplatValue.isAllOnes(); in isVectorAllOnes() 842 APInt SplatValue, SplatUndef; in performDSPShiftCombine() local 855 (SplatValue.getZExtValue() >= EltSize)) in performDSPShiftCombine() 1422 SDValue SplatValueA = SplatValue; in getBuildVectorSplat() 1423 SDValue SplatValueB = SplatValue; in getBuildVectorSplat() 1424 SDLoc DL(SplatValue); in getBuildVectorSplat() 2456 APInt SplatValue, SplatUndef; in lowerBUILD_VECTOR() local [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1006 int SplatValue = *FirstDefinedIdx; in getSplatIndex() local 1008 [&SplatValue](int Elt) { return Elt >= 0 && Elt != SplatValue; })) in getSplatIndex() 1011 return SplatValue; in getSplatIndex() 1060 int64_t SplatValue, bool AllowUndef) { in isBuildVectorConstantSplat() argument 1062 return mi_match(SplatValAndReg->VReg, MRI, m_SpecificICst(SplatValue)); in isBuildVectorConstantSplat() 1068 int64_t SplatValue, bool AllowUndef) { in isBuildVectorConstantSplat() argument 1069 return isBuildVectorConstantSplat(MI.getOperand(0).getReg(), MRI, SplatValue, in isBuildVectorConstantSplat()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | LoopIdiomRecognize.cpp | 521 Value *SplatValue = isBytewiseValue(StoredVal, *DL); in isLegalStore() local 528 if (!UnorderedAtomic && HasMemset && SplatValue && !DisableLIRP::Memset && in isLegalStore() 531 CurLoop->isLoopInvariant(SplatValue)) { in isLegalStore() 990 Value *SplatValue = MSI->getValue(); in processLoopMemSet() local 991 if (!SplatValue || !CurLoop->isLoopInvariant(SplatValue)) in processLoopMemSet() 997 MSI->getDestAlign(), SplatValue, MSI, MSIs, Ev, in processLoopMemSet() 1103 Value *SplatValue = isBytewiseValue(StoredVal, *DL); in processLoopStridedStore() local 1106 if (!SplatValue) in processLoopStridedStore() 1109 assert((SplatValue || PatternValue) && in processLoopStridedStore() 1173 if (SplatValue) { in processLoopStridedStore() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 403 int64_t SplatValue, bool AllowUndef); 409 int64_t SplatValue, bool AllowUndef);
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 708 auto *SplatValue = in instCombineSVECmpNE() local 710 if (!SplatValue || !SplatValue->isZero()) in instCombineSVECmpNE() 1116 auto *SplatValue = getSplatValue(I); in instCombineSVEVectorMul() local 1117 if (!SplatValue) in instCombineSVEVectorMul() 1119 return match(SplatValue, m_FPOne()) || match(SplatValue, m_One()); in instCombineSVEVectorMul() 1129 auto *SplatValue = IntrI->getOperand(2); in instCombineSVEVectorMul() local 1130 return match(SplatValue, m_FPOne()) || match(SplatValue, m_One()); in instCombineSVEVectorMul() 1183 if (!SplatValue || in instCombineSVETBL() 1184 SplatValue->getValue().uge(VTy->getElementCount().getKnownMinValue())) in instCombineSVETBL() 1191 auto *Extract = Builder.CreateExtractElement(OpVal, SplatValue); in instCombineSVETBL() [all …]
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| H A D | AArch64ISelLowering.cpp | 16096 APInt SplatValue, SplatUndef; in tryCombineShiftImm() local 16099 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in tryCombineShiftImm() 16104 ShiftAmount = SplatValue.getSExtValue(); in tryCombineShiftImm()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2152 SDValue SplatValue; in LowerBUILD_VECTOR() local 2154 std::tie(SplatValue, NumSplatLanes) = GetMostCommon(SplatValueCounts); in LowerBUILD_VECTOR() 2268 if ((SplattedLoad = dyn_cast<LoadSDNode>(SplatValue)) && in LowerBUILD_VECTOR() 2276 Result = DAG.getSplatBuildVector(VecT, DL, SplatValue); in LowerBUILD_VECTOR() 2278 IsLaneConstructed = [&SplatValue](size_t _, const SDValue &Lane) { in LowerBUILD_VECTOR() 2279 return Lane == SplatValue; in LowerBUILD_VECTOR() 2524 APInt SplatValue, SplatUndef; in performVectorTruncZeroCombine() local 2528 Splat->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in performVectorTruncZeroCombine() 2530 SplatValue == 0; in performVectorTruncZeroCombine()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 91 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue); 1982 bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2275 uint64_t SplatValue = 0; in lowerBUILD_VECTOR() local 2280 SplatValue |= ((cast<ConstantSDNode>(SeqV)->getZExtValue() & EltMask) in lowerBUILD_VECTOR() 2288 SplatValue = SignExtend64<32>(SplatValue); in lowerBUILD_VECTOR() 2296 if (ViaIntVT.bitsLE(XLenVT) || isInt<32>(SplatValue)) { in lowerBUILD_VECTOR() 2304 DAG.getConstant(SplatValue, DL, XLenVT), ViaVL); in lowerBUILD_VECTOR() 2884 if (SDValue SplatValue = DAG.getSplatValue(V1, /*LegalTypes*/ true)) { in lowerVECTOR_SHUFFLE() local 2885 Gather = lowerScalarSplat(SDValue(), SplatValue, VL, ContainerVT, DL, DAG, in lowerVECTOR_SHUFFLE() 6233 SDValue SplatValue = DAG.getConstant( in lowerVPExtMaskOp() local 6236 DAG.getUNDEF(ContainerVT), SplatValue, VL); in lowerVPExtMaskOp()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 422 if (auto *SplatValue = getSplatValue(II.getArgOperand(0))) { in simplifyMaskedScatter() local 425 new StoreInst(SplatValue, SplatPtr, /*IsVolatile=*/false, Alignment); in simplifyMaskedScatter()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 11394 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, APInt &SplatUndef, in isConstantSplat() argument 11407 SplatValue = APInt(VecWidth, 0); in isConstantSplat() 11426 SplatValue.insertBits(CN->getAPIntValue().zextOrTrunc(EltWidth), BitPos); in isConstantSplat() 11428 SplatValue.insertBits(CN->getValueAPF().bitcastToAPInt(), BitPos); in isConstantSplat() 11440 APInt HighValue = SplatValue.extractBits(HalfSize, HalfSize); in isConstantSplat() 11441 APInt LowValue = SplatValue.extractBits(HalfSize, 0); in isConstantSplat() 11450 SplatValue = HighValue | LowValue; in isConstantSplat()
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| H A D | DAGCombiner.cpp | 6273 APInt SplatValue, SplatUndef; in visitAND() local 6276 bool IsSplat = Vector->isConstantSplat(SplatValue, SplatUndef, in visitAND() 6281 SplatValue |= SplatUndef; in visitAND() 6293 for (SplatValue = SplatValue.zextOrTrunc(EltBitWidth); in visitAND() 6295 SplatValue |= SplatValue.shl(SplatBitSize); in visitAND() 6302 Constant &= SplatValue.extractBits(EltBitWidth, i * EltBitWidth); in visitAND() 11050 APInt SplatValue; in visitVSELECT() local 11052 ISD::isConstantSplatVector(OpRHS.getNode(), SplatValue) && in visitVSELECT() 11054 SplatValue.isSignMask()) { in visitVSELECT() 11057 OpRHS = DAG.getConstant(SplatValue, DL, VT); in visitVSELECT()
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| H A D | TargetLowering.cpp | 6091 auto SplatValue = llvm::find_if_not(Values, Predicate); in turnVectorIntoSplatVector() local 6092 if (SplatValue != Values.end()) { in turnVectorIntoSplatVector() 6094 if (llvm::all_of(Values, [Predicate, SplatValue](SDValue Value) { in turnVectorIntoSplatVector() 6095 return Value == *SplatValue || Predicate(Value); in turnVectorIntoSplatVector() 6097 Replacement = *SplatValue; in turnVectorIntoSplatVector()
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| H A D | LegalizeVectorTypes.cpp | 2258 APInt SplatValue; in SplitVecRes_VECTOR_SHUFFLE() local 2260 (ISD::isConstantSplatVector(N.getNode(), SplatValue) || in SplitVecRes_VECTOR_SHUFFLE()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6681 APInt SplatValue, SplatUndef; in getAVX512Node() local 6684 if (BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in getAVX512Node() 6686 !HasAnyUndefs && SplatValue.getBitWidth() == OpEltSizeInBits) in getAVX512Node() 6687 return DAG.getConstant(SplatValue, DL, DstVT); in getAVX512Node() 9496 static Constant *getConstantVector(MVT VT, const APInt &SplatValue, in getConstantVector() argument 9503 APInt Val = SplatValue.extractBits(ScalarSize, ScalarSize * i); in getConstantVector() 9617 APInt SplatValue, Undef; in lowerBuildVectorAsBroadcast() local 9621 if (BVOp->isConstantSplat(SplatValue, Undef, SplatBitSize, HasUndef) && in lowerBuildVectorAsBroadcast() 9639 Constant *C = Constant::getIntegerValue(ScalarTy, SplatValue); in lowerBuildVectorAsBroadcast() 9656 Constant *VecC = getConstantVector(VT, SplatValue, SplatBitSize, in lowerBuildVectorAsBroadcast()
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