| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 432 Value *NewAnd = Builder.CreateAnd(A, NewMask); in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed() local 573 Value *NewAnd = Builder.CreateAnd(A, NewOr); in foldLogOpOfMaskedICmps() local 578 return Builder.CreateICmp(NewCC, NewAnd, Zero); in foldLogOpOfMaskedICmps() 586 Value *NewAnd = Builder.CreateAnd(A, NewOr); in foldLogOpOfMaskedICmps() local 587 return Builder.CreateICmp(NewCC, NewAnd, NewOr); in foldLogOpOfMaskedICmps() 655 Value *NewAnd = Builder.CreateAnd(A, NewOr1); in foldLogOpOfMaskedICmps() local 657 return Builder.CreateICmp(NewCC, NewAnd, NewOr2); in foldLogOpOfMaskedICmps() 1843 Value *NewAnd = Builder.CreateAnd(X, Op1); in visitAnd() local 1844 return BinaryOperator::CreateXor(NewAnd, Op1); in visitAnd() 2653 Value *NewAnd = Builder.CreateAnd(V, Low | *AndC); in foldAndOrOfICmps() local [all …]
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| H A D | InstCombineSimplifyDemanded.cpp | 324 Instruction *NewAnd = BinaryOperator::CreateAnd(I->getOperand(0), AndC); in SimplifyDemandedUseBits() local 325 InsertNewInstWith(NewAnd, *I); in SimplifyDemandedUseBits() 328 Instruction *NewXor = BinaryOperator::CreateXor(NewAnd, XorC); in SimplifyDemandedUseBits()
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| H A D | InstCombineCompares.cpp | 1724 Value *NewAnd = Builder.CreateAnd( in foldICmpAndShift() local 1727 NewAnd, ConstantInt::get(And->getType(), NewCmpCst)); in foldICmpAndShift() 1742 Value *NewAnd = Builder.CreateAnd(Shift->getOperand(0), NewShift); in foldICmpAndShift() local 1743 return replaceOperand(Cmp, 0, NewAnd); in foldICmpAndShift() 1814 Value *NewAnd = Builder.CreateAnd(W, ZextC2, And->getName()); in foldICmpAndConstConst() local 1815 return new ICmpInst(Cmp.getPredicate(), NewAnd, ZextC1); in foldICmpAndConstConst() 1853 Value *NewAnd = Builder.CreateAnd(A, NewOr, And->getName()); in foldICmpAndConstConst() local 1854 return replaceOperand(Cmp, 0, NewAnd); in foldICmpAndConstConst()
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| H A D | InstCombineAddSub.cpp | 778 Value *NewAnd = Builder.CreateAnd(Z, *C1); in checkForNegativeOperand() local 779 return Builder.CreateSub(RHS, NewAnd, "sub"); in checkForNegativeOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1995 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, NewMask); in foldMaskedShiftToScaledMask() local 1996 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); in foldMaskedShiftToScaledMask() 2004 insertDAGNode(DAG, N, NewAnd); in foldMaskedShiftToScaledMask() 2010 AM.IndexReg = NewAnd; in foldMaskedShiftToScaledMask() 2161 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, NewSRL, NewMask); in foldMaskedShiftToBEXTR() local 2163 SDValue NewSHL = DAG.getNode(ISD::SHL, DL, VT, NewAnd, NewSHLAmt); in foldMaskedShiftToBEXTR() 2173 insertDAGNode(DAG, N, NewAnd); in foldMaskedShiftToBEXTR() 2180 AM.IndexReg = NewAnd; in foldMaskedShiftToBEXTR() 4468 SDValue NewAnd = CurDAG->getNode(ISD::AND, SDLoc(And), VT, And0, NewMask); in shrinkAndImmediate() local 4469 ReplaceNode(And, NewAnd.getNode()); in shrinkAndImmediate() [all …]
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| H A D | X86ISelLowering.cpp | 52566 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT, Op0->getOperand(0), in combineVectorCompareAndMaskUnaryOp() local 52568 SDValue Res = DAG.getBitcast(VT, NewAnd); in combineVectorCompareAndMaskUnaryOp()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6571 auto *NewAnd = cast<Instruction>( in optimizeLoadExt() local 6575 InsertedInsts.insert(NewAnd); in optimizeLoadExt() 6579 Load->replaceAllUsesWith(NewAnd); in optimizeLoadExt() 6580 NewAnd->setOperand(0, Load); in optimizeLoadExt() 6587 And->replaceAllUsesWith(NewAnd); in optimizeLoadExt()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1393 SDValue NewAnd = in SimplifyDemandedBits() local 1396 TLO.DAG.getNode(ISD::INSERT_SUBVECTOR, dl, VT, NewAnd, in SimplifyDemandedBits() 3735 SDValue NewAnd = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, NotX, Y); in foldSetCCWithAnd() local 3736 return DAG.getSetCC(DL, VT, NewAnd, Zero, Cond); in foldSetCCWithAnd()
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| H A D | DAGCombiner.cpp | 6056 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, Mask); in combineShiftAnd1ToBitTest() local 6058 SDValue Setcc = DAG.getSetCC(DL, CCVT, NewAnd, Zero, ISD::SETEQ); in combineShiftAnd1ToBitTest()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14406 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT, in performVectorCompareAndMaskUnaryOpCombine() local 14408 SDValue Res = DAG.getNode(ISD::BITCAST, DL, VT, NewAnd); in performVectorCompareAndMaskUnaryOpCombine()
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