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Searched refs:SrcVT (Results 1 – 25 of 41) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp855 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
856 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
1085 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && in SelectIToFP()
1086 SrcVT != MVT::i32 && SrcVT != MVT::i64) in SelectIToFP()
1123 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { in SelectIToFP()
1127 SrcVT = MVT::i64; in SelectIToFP()
1195 MVT DstVT, SrcVT; in SelectFPToI() local
1213 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in SelectFPToI()
1816 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1822 if (SrcVT == MVT::i8) in PPCEmitIntExt()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1103 MVT DstVT, SrcVT; in selectFPToInt() local
1116 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt()
1119 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in selectFPToInt()
1208 MVT SrcVT = ArgVT; in processCallArgs() local
1216 MVT SrcVT = ArgVT; in processCallArgs() local
1780 EVT SrcVT, DestVT; in selectTrunc() local
1784 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in selectTrunc()
1830 switch (SrcVT.SimpleTy) { in emitIntSExt32r1()
1848 switch (SrcVT.SimpleTy) { in emitIntSExt32r2()
1874 switch (SrcVT.SimpleTy) { in emitIntZExt()
[all …]
H A DMipsMSAInstrInfo.td3585 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3587 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3588 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3645 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3653 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3658 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3662 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3666 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3668 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3672 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2849 if (SrcVT == MVT::f128 || SrcVT == MVT::f16) in selectFPToInt()
2891 if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) { in selectIntToFP()
3904 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16 && in selectTrunc()
4059 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSL_ri()
4060 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitLSL_ri()
4166 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSR_ri()
4167 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitLSR_ri()
4287 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitASR_ri()
4288 SrcVT == MVT::i32 || SrcVT == MVT::i64) && in emitASR_ri()
4374 ((SrcVT != MVT::i1) && (SrcVT != MVT::i8) && in emitIntExt()
[all …]
H A DAArch64TargetTransformInfo.cpp419 auto SrcVT = TLI->getValueType(DL, Src); in getExtractWithExtendCost() local
429 if (DstVT.getSizeInBits() < SrcVT.getSizeInBits()) in getExtractWithExtendCost()
444 if (DstVT.getSizeInBits() != 64u || SrcVT.getSizeInBits() == 32u) in getExtractWithExtendCost()
H A DAArch64ISelDAGToDAG.cpp420 EVT SrcVT; in getExtendTypeForNode() local
422 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT(); in getExtendTypeForNode()
424 SrcVT = N.getOperand(0).getValueType(); in getExtendTypeForNode()
426 if (!IsLoadStore && SrcVT == MVT::i8) in getExtendTypeForNode()
428 else if (!IsLoadStore && SrcVT == MVT::i16) in getExtendTypeForNode()
430 else if (SrcVT == MVT::i32) in getExtendTypeForNode()
432 assert(SrcVT != MVT::i64 && "extend from 64-bits?"); in getExtendTypeForNode()
437 EVT SrcVT = N.getOperand(0).getValueType(); in getExtendTypeForNode() local
438 if (!IsLoadStore && SrcVT == MVT::i8) in getExtendTypeForNode()
440 else if (!IsLoadStore && SrcVT == MVT::i16) in getExtendTypeForNode()
[all …]
H A DAArch64ISelLowering.cpp4520 EVT SrcVT = In2.getValueType(); in LowerFCOPYSIGN() local
4522 if (SrcVT.bitsLT(VT)) in LowerFCOPYSIGN()
4524 else if (SrcVT.bitsGT(VT)) in LowerFCOPYSIGN()
6003 EVT SrcVT = Src.ShuffleVec.getValueType(); in ReconstructShuffle() local
6010 EVT EltVT = SrcVT.getVectorElementType(); in ReconstructShuffle()
7717 EVT SrcVT = LHS.getValueType(); in EmitVectorComparison() local
10056 EVT SrcVT = Src->getValueType(0); in performExtendCombine() local
10057 if (!ResVT.isSimple() || !SrcVT.isSimple()) in performExtendCombine()
10062 if (SrcVT.getSizeInBits() != 64) in performExtendCombine()
11080 if (SrcVT == MVT::i1) in performSelectCombine()
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp587 EVT SrcVT = LD->getMemoryVT(); in ExpandLoad() local
588 EVT SrcEltVT = SrcVT.getScalarType(); in ExpandLoad()
589 unsigned NumElem = SrcVT.getVectorNumElements(); in ExpandLoad()
619 unsigned RemainingBytes = SrcVT.getStoreSize(); in ExpandLoad()
898 EVT SrcVT = Src.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
899 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandANY_EXTEND_VECTOR_INREG()
913 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG()
920 EVT SrcVT = Src.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
945 EVT SrcVT = Src.getValueType(); in ExpandZERO_EXTEND_VECTOR_INREG() local
946 int NumSrcElements = SrcVT.getVectorNumElements(); in ExpandZERO_EXTEND_VECTOR_INREG()
[all …]
H A DTargetLowering.cpp1274 EVT SrcVT = Src.getValueType(); in SimplifyDemandedBits() local
1281 SrcVT.isFloatingPoint()) { in SimplifyDemandedBits()
1285 SrcVT != MVT::f128) { in SimplifyDemandedBits()
1484 EVT SrcVT = Src.getValueType(); in SimplifyDemandedVectorElts() local
1488 if (!SrcVT.isVector()) in SimplifyDemandedVectorElts()
4313 EVT SrcVT = Src.getValueType(); in expandFP_TO_SINT() local
4378 EVT SrcVT = Src.getValueType(); in expandFP_TO_UINT() local
4439 EVT SrcVT = Src.getValueType(); in expandUINT_TO_FP() local
4451 if (SrcVT.isVector() && in expandUINT_TO_FP()
4488 if (SrcVT.isVector() && in expandUINT_TO_FP()
[all …]
H A DFastISel.cpp1495 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectCast() local
1498 if (SrcVT == MVT::Other || !SrcVT.isSimple() || DstVT == MVT::Other || in selectCast()
1508 if (!TLI.isTypeLegal(SrcVT)) in selectCast()
1518 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast()
1545 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast() local
1554 if (SrcVT == DstVT) { in selectBitCast()
1555 const TargetRegisterClass *SrcClass = TLI.getRegClassFor(SrcVT); in selectBitCast()
1567 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1890 EVT SrcVT = TLI.getValueType(DL, I->getOperand(0)->getType()); in selectOperator() local
1892 if (DstVT.bitsGT(SrcVT)) in selectOperator()
[all …]
H A DLegalizeDAG.cpp708 EVT SrcVT = LD->getMemoryVT(); in LegalizeLoadOps() local
709 unsigned SrcWidth = SrcVT.getSizeInBits(); in LegalizeLoadOps()
714 if (SrcWidth != SrcVT.getStoreSizeInBits() && in LegalizeLoadOps()
722 (SrcVT != MVT::i1 || in LegalizeLoadOps()
727 unsigned NewWidth = SrcVT.getStoreSizeInBits(); in LegalizeLoadOps()
752 DAG.getValueType(SrcVT)); in LegalizeLoadOps()
891 if (SrcVT.getScalarType() == MVT::f16) { in LegalizeLoadOps()
892 EVT ISrcVT = SrcVT.changeTypeToInteger(); in LegalizeLoadOps()
905 assert(!SrcVT.isVector() && in LegalizeLoadOps()
2333 EVT SrcVT = Op0.getValueType(); in ExpandLegalINT_TO_FP() local
[all …]
H A DLegalizeFloatTypes.cpp1464 EVT SrcVT = Src.getValueType(); in ExpandFloatRes_XINT_TO_FP() local
1471 if (SrcVT.bitsLE(MVT::i32)) { in ExpandFloatRes_XINT_TO_FP()
1480 if (SrcVT.bitsLE(MVT::i64)) { in ExpandFloatRes_XINT_TO_FP()
1484 } else if (SrcVT.bitsLE(MVT::i128)) { in ExpandFloatRes_XINT_TO_FP()
1499 SrcVT = Src.getValueType(); in ExpandFloatRes_XINT_TO_FP()
1507 switch (SrcVT.getSimpleVT().SimpleTy) { in ExpandFloatRes_XINT_TO_FP()
1526 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT), in ExpandFloatRes_XINT_TO_FP()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1357 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() local
1373 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || in ARMEmitCmp()
1374 SrcVT == MVT::i1) { in ARMEmitCmp()
1388 if (SrcVT == MVT::f32 || SrcVT == MVT::f64) in ARMEmitCmp()
1396 switch (SrcVT.SimpleTy) { in ARMEmitCmp()
1561 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() local
1562 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectIToFP()
1569 if (SrcVT == MVT::i16 || SrcVT == MVT::i8) { in SelectIToFP()
2592 EVT SrcVT, DestVT; in SelectTrunc() local
2596 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) in SelectTrunc()
[all …]
H A DARMISelLowering.h334 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
496 bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86FastISel.cpp1236 if (SrcVT != DstVT) { in X86SelectRet()
1237 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) in X86SelectRet()
1245 if (SrcVT == MVT::i1) { in X86SelectRet()
1249 SrcVT = MVT::i8; in X86SelectRet()
1542 if (SrcVT == MVT::i1) { in X86SelectZExt()
1545 SrcVT = MVT::i8; in X86SelectZExt()
1601 if (SrcVT == MVT::i1) { in X86SelectSExt()
1613 SrcVT = MVT::i8; in X86SelectSExt()
2431 if (SrcVT != MVT::i32 && SrcVT != MVT::i64) in X86SelectIntToFP()
2559 if (SrcVT == MVT::i8) { in X86SelectTrunc()
[all …]
H A DX86SelectionDAGInfo.cpp281 EVT SrcVT = Src.getValueType(); in EmitTargetCodeForMemcpy() local
287 DAG.getNode(ISD::ADD, dl, SrcVT, Src, in EmitTargetCodeForMemcpy()
289 SrcVT)), in EmitTargetCodeForMemcpy()
H A DX86ISelLowering.cpp6847 if (!SrcVT.isVector() || SrcVT.getVectorNumElements() != NumElems) in getShuffleScalarElt()
10148 SrcVT = PackVT; in matchVectorShuffleWithPACK()
17339 assert(SrcVT <= MVT::i64 && SrcVT >= MVT::i16 && in LowerSINT_TO_FP()
25368 if (SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8 || in LowerBITCAST()
26728 (SrcVT == MVT::f32 || SrcVT == MVT::f64)) { in ReplaceNodeResults()
26951 SrcVT.isVector() && isTypeLegal(SrcVT)) { in ReplaceNodeResults()
33038 if (!(SrcVT.isVector() && SrcVT.getVectorElementType() == MVT::i1 && in combineCastedMaskArithmetic()
33204 (SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || SrcVT == MVT::v8i8) && in combineBitcast()
33225 (SrcVT == MVT::v2f32 || SrcVT == MVT::v2i32 || SrcVT == MVT::v4i16 || in combineBitcast()
33252 SrcVT.isVector() && SrcVT.getVectorElementType() == MVT::i1 && in combineBitcast()
[all …]
H A DX86ISelLowering.h755 ArrayRef<int> ShuffleMask, EVT SrcVT, EVT TruncVT) const override;
1056 bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
1116 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h55 bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;
57 bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;
H A DRISCVISelLowering.cpp252 bool RISCVTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const { in isTruncateFree() argument
253 if (Subtarget.is64Bit() || SrcVT.isVector() || DstVT.isVector() || in isTruncateFree()
254 !SrcVT.isInteger() || !DstVT.isInteger()) in isTruncateFree()
256 unsigned SrcBits = SrcVT.getSizeInBits(); in isTruncateFree()
275 bool RISCVTargetLowering::isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const { in isSExtCheaperThanZExt() argument
276 return Subtarget.is64Bit() && SrcVT == MVT::i32 && DstVT == MVT::i64; in isSExtCheaperThanZExt()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.td203 class isFloatType<ValueType SrcVT> {
205 !if(!eq(SrcVT.Value, f16.Value), 1,
206 !if(!eq(SrcVT.Value, f32.Value), 1,
207 !if(!eq(SrcVT.Value, f64.Value), 1,
208 !if(!eq(SrcVT.Value, v2f16.Value), 1,
212 class isIntType<ValueType SrcVT> {
214 !if(!eq(SrcVT.Value, i16.Value), 1,
215 !if(!eq(SrcVT.Value, i32.Value), 1,
216 !if(!eq(SrcVT.Value, i64.Value), 1,
220 class isPackedType<ValueType SrcVT> {
[all …]
H A DAMDGPUISelLowering.cpp2642 EVT SrcVT = Src.getValueType(); in LowerFP_TO_SINT() local
2643 if (Subtarget->has16BitInsts() && SrcVT == MVT::f16) { in LowerFP_TO_SINT()
2665 EVT SrcVT = Src.getValueType(); in LowerFP_TO_UINT() local
2913 EVT SrcVT = Src.getValueType(); in performAssertSZExtCombine() local
2914 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
3136 EVT SrcVT = Src.getValueType(); in performTruncateCombine() local
3137 if (SrcVT.getScalarSizeInBits() > 32 && in performTruncateCombine()
3733 EVT SrcVT = Src.getValueType(); in performFNegCombine() local
3758 EVT SrcVT = Src.getValueType(); in performFAbsCombine() local
3801 EVT SrcVT = Src.getValueType(); in PerformDAGCombine() local
[all …]
H A DSIISelLowering.h202 bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const override;
/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp627 VectorType *SrcVT = dyn_cast<VectorType>(BCI.getSrcTy()); in visitBitCastInst() local
628 if (!DstVT || !SrcVT) in visitBitCastInst()
632 unsigned SrcNumElems = SrcVT->getNumElements(); in visitBitCastInst()
664 Type *MidTy = VectorType::get(SrcVT->getElementType(), FanIn); in visitBitCastInst()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2341 virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() argument
2342 assert(SrcVT.isFloatingPoint() && DestVT.isFloatingPoint() && in isFPExtFree()
2350 virtual bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() argument
2351 assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() && in isFPExtFoldable()
2353 return isFPExtFree(DestVT, SrcVT); in isFPExtFoldable()
2407 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() argument
3110 ArrayRef<int> ShuffleMask, EVT SrcVT, EVT TruncVT) const { in isDesirableToCombineBuildVectorToShuffleTruncate() argument

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