1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
19 //
20 //===----------------------------------------------------------------------===//
21
22 #include "LegalizeTypes.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
25 using namespace llvm;
26
27 #define DEBUG_TYPE "legalize-types"
28
29 /// GetFPLibCall - Return the right libcall for the given floating point type.
GetFPLibCall(EVT VT,RTLIB::Libcall Call_F32,RTLIB::Libcall Call_F64,RTLIB::Libcall Call_F80,RTLIB::Libcall Call_F128,RTLIB::Libcall Call_PPCF128)30 static RTLIB::Libcall GetFPLibCall(EVT VT,
31 RTLIB::Libcall Call_F32,
32 RTLIB::Libcall Call_F64,
33 RTLIB::Libcall Call_F80,
34 RTLIB::Libcall Call_F128,
35 RTLIB::Libcall Call_PPCF128) {
36 return
37 VT == MVT::f32 ? Call_F32 :
38 VT == MVT::f64 ? Call_F64 :
39 VT == MVT::f80 ? Call_F80 :
40 VT == MVT::f128 ? Call_F128 :
41 VT == MVT::ppcf128 ? Call_PPCF128 :
42 RTLIB::UNKNOWN_LIBCALL;
43 }
44
45 //===----------------------------------------------------------------------===//
46 // Convert Float Results to Integer for Non-HW-supported Operations.
47 //===----------------------------------------------------------------------===//
48
SoftenFloatResult(SDNode * N,unsigned ResNo)49 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
50 LLVM_DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
51 dbgs() << "\n");
52 SDValue R = SDValue();
53
54 switch (N->getOpcode()) {
55 default:
56 #ifndef NDEBUG
57 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
58 N->dump(&DAG); dbgs() << "\n";
59 #endif
60 llvm_unreachable("Do not know how to soften the result of this operator!");
61
62 case ISD::Register:
63 case ISD::CopyFromReg:
64 case ISD::CopyToReg:
65 assert(isLegalInHWReg(N->getValueType(ResNo)) &&
66 "Unsupported SoftenFloatRes opcode!");
67 // Only when isLegalInHWReg, we can skip check of the operands.
68 R = SDValue(N, ResNo);
69 break;
70 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
72 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
73 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
74 case ISD::EXTRACT_VECTOR_ELT:
75 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N, ResNo); break;
76 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
77 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
79 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
83 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
84 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
87 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
90 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
91 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
93 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
95 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
97 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
102 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
103 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
104 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
106 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 case ISD::SINT_TO_FP:
110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
113 }
114
115 if (R.getNode() && R.getNode() != N) {
116 SetSoftenedFloat(SDValue(N, ResNo), R);
117 // Return true only if the node is changed, assuming that the operands
118 // are also converted when necessary.
119 return true;
120 }
121
122 // Otherwise, return false to tell caller to scan operands.
123 return false;
124 }
125
SoftenFloatRes_BITCAST(SDNode * N,unsigned ResNo)126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 if (isLegalInHWReg(N->getValueType(ResNo)))
128 return SDValue(N, ResNo);
129 return BitConvertToInteger(N->getOperand(0));
130 }
131
SoftenFloatRes_MERGE_VALUES(SDNode * N,unsigned ResNo)132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
133 unsigned ResNo) {
134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 return BitConvertToInteger(Op);
136 }
137
SoftenFloatRes_BUILD_PAIR(SDNode * N)138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 // Convert the inputs to integers, and build a new pair out of them.
140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 TLI.getTypeToTransformTo(*DAG.getContext(),
142 N->getValueType(0)),
143 BitConvertToInteger(N->getOperand(0)),
144 BitConvertToInteger(N->getOperand(1)));
145 }
146
SoftenFloatRes_ConstantFP(SDNode * N,unsigned ResNo)147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 // When LegalInHWReg, we can load better from the constant pool.
149 if (isLegalInHWReg(N->getValueType(ResNo)))
150 return SDValue(N, ResNo);
151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 // In ppcf128, the high 64 bits are always first in memory regardless
153 // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154 // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155 // way. However, APInt's are serialized in an Endian-sensitive fashion,
156 // so on big-Endian targets, the two doubles are output in the wrong
157 // order. Fix this by manually flipping the order of the high 64 bits
158 // and the low 64 bits here.
159 if (DAG.getDataLayout().isBigEndian() &&
160 CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) {
161 uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162 CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163 APInt Val(128, words);
164 return DAG.getConstant(Val, SDLoc(CN),
165 TLI.getTypeToTransformTo(*DAG.getContext(),
166 CN->getValueType(0)));
167 } else {
168 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169 TLI.getTypeToTransformTo(*DAG.getContext(),
170 CN->getValueType(0)));
171 }
172 }
173
SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode * N,unsigned ResNo)174 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo) {
175 // When LegalInHWReg, keep the extracted value in register.
176 if (isLegalInHWReg(N->getValueType(ResNo)))
177 return SDValue(N, ResNo);
178 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 NewOp.getValueType().getVectorElementType(),
181 NewOp, N->getOperand(1));
182 }
183
SoftenFloatRes_FABS(SDNode * N,unsigned ResNo)184 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
185 // When LegalInHWReg, FABS can be implemented as native bitwise operations.
186 if (isLegalInHWReg(N->getValueType(ResNo)))
187 return SDValue(N, ResNo);
188 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
189 unsigned Size = NVT.getSizeInBits();
190
191 // Mask = ~(1 << (Size-1))
192 APInt API = APInt::getAllOnesValue(Size);
193 API.clearBit(Size - 1);
194 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
195 SDValue Op = GetSoftenedFloat(N->getOperand(0));
196 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
197 }
198
SoftenFloatRes_FMINNUM(SDNode * N)199 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
200 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
201 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
202 GetSoftenedFloat(N->getOperand(1)) };
203 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
204 RTLIB::FMIN_F32,
205 RTLIB::FMIN_F64,
206 RTLIB::FMIN_F80,
207 RTLIB::FMIN_F128,
208 RTLIB::FMIN_PPCF128),
209 NVT, Ops, false, SDLoc(N)).first;
210 }
211
SoftenFloatRes_FMAXNUM(SDNode * N)212 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
213 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
214 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215 GetSoftenedFloat(N->getOperand(1)) };
216 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
217 RTLIB::FMAX_F32,
218 RTLIB::FMAX_F64,
219 RTLIB::FMAX_F80,
220 RTLIB::FMAX_F128,
221 RTLIB::FMAX_PPCF128),
222 NVT, Ops, false, SDLoc(N)).first;
223 }
224
SoftenFloatRes_FADD(SDNode * N)225 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
226 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
227 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
228 GetSoftenedFloat(N->getOperand(1)) };
229 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
230 RTLIB::ADD_F32,
231 RTLIB::ADD_F64,
232 RTLIB::ADD_F80,
233 RTLIB::ADD_F128,
234 RTLIB::ADD_PPCF128),
235 NVT, Ops, false, SDLoc(N)).first;
236 }
237
SoftenFloatRes_FCEIL(SDNode * N)238 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
239 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
240 SDValue Op = GetSoftenedFloat(N->getOperand(0));
241 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
242 RTLIB::CEIL_F32,
243 RTLIB::CEIL_F64,
244 RTLIB::CEIL_F80,
245 RTLIB::CEIL_F128,
246 RTLIB::CEIL_PPCF128),
247 NVT, Op, false, SDLoc(N)).first;
248 }
249
SoftenFloatRes_FCOPYSIGN(SDNode * N,unsigned ResNo)250 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
251 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
252 if (isLegalInHWReg(N->getValueType(ResNo)))
253 return SDValue(N, ResNo);
254 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
255 SDValue RHS = BitConvertToInteger(N->getOperand(1));
256 SDLoc dl(N);
257
258 EVT LVT = LHS.getValueType();
259 EVT RVT = RHS.getValueType();
260
261 unsigned LSize = LVT.getSizeInBits();
262 unsigned RSize = RVT.getSizeInBits();
263
264 // First get the sign bit of second operand.
265 SDValue SignBit = DAG.getNode(
266 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
267 DAG.getConstant(RSize - 1, dl,
268 TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
269 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
270
271 // Shift right or sign-extend it if the two operands have different types.
272 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
273 if (SizeDiff > 0) {
274 SignBit =
275 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
276 DAG.getConstant(SizeDiff, dl,
277 TLI.getShiftAmountTy(SignBit.getValueType(),
278 DAG.getDataLayout())));
279 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
280 } else if (SizeDiff < 0) {
281 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
282 SignBit =
283 DAG.getNode(ISD::SHL, dl, LVT, SignBit,
284 DAG.getConstant(-SizeDiff, dl,
285 TLI.getShiftAmountTy(SignBit.getValueType(),
286 DAG.getDataLayout())));
287 }
288
289 // Clear the sign bit of the first operand.
290 SDValue Mask = DAG.getNode(
291 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
292 DAG.getConstant(LSize - 1, dl,
293 TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
294 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
295 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
296
297 // Or the value with the sign bit.
298 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
299 }
300
SoftenFloatRes_FCOS(SDNode * N)301 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
302 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
303 SDValue Op = GetSoftenedFloat(N->getOperand(0));
304 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
305 RTLIB::COS_F32,
306 RTLIB::COS_F64,
307 RTLIB::COS_F80,
308 RTLIB::COS_F128,
309 RTLIB::COS_PPCF128),
310 NVT, Op, false, SDLoc(N)).first;
311 }
312
SoftenFloatRes_FDIV(SDNode * N)313 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
314 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
315 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
316 GetSoftenedFloat(N->getOperand(1)) };
317 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
318 RTLIB::DIV_F32,
319 RTLIB::DIV_F64,
320 RTLIB::DIV_F80,
321 RTLIB::DIV_F128,
322 RTLIB::DIV_PPCF128),
323 NVT, Ops, false, SDLoc(N)).first;
324 }
325
SoftenFloatRes_FEXP(SDNode * N)326 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
327 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
328 SDValue Op = GetSoftenedFloat(N->getOperand(0));
329 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
330 RTLIB::EXP_F32,
331 RTLIB::EXP_F64,
332 RTLIB::EXP_F80,
333 RTLIB::EXP_F128,
334 RTLIB::EXP_PPCF128),
335 NVT, Op, false, SDLoc(N)).first;
336 }
337
SoftenFloatRes_FEXP2(SDNode * N)338 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
339 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
340 SDValue Op = GetSoftenedFloat(N->getOperand(0));
341 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
342 RTLIB::EXP2_F32,
343 RTLIB::EXP2_F64,
344 RTLIB::EXP2_F80,
345 RTLIB::EXP2_F128,
346 RTLIB::EXP2_PPCF128),
347 NVT, Op, false, SDLoc(N)).first;
348 }
349
SoftenFloatRes_FFLOOR(SDNode * N)350 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
351 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
352 SDValue Op = GetSoftenedFloat(N->getOperand(0));
353 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
354 RTLIB::FLOOR_F32,
355 RTLIB::FLOOR_F64,
356 RTLIB::FLOOR_F80,
357 RTLIB::FLOOR_F128,
358 RTLIB::FLOOR_PPCF128),
359 NVT, Op, false, SDLoc(N)).first;
360 }
361
SoftenFloatRes_FLOG(SDNode * N)362 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
363 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
364 SDValue Op = GetSoftenedFloat(N->getOperand(0));
365 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
366 RTLIB::LOG_F32,
367 RTLIB::LOG_F64,
368 RTLIB::LOG_F80,
369 RTLIB::LOG_F128,
370 RTLIB::LOG_PPCF128),
371 NVT, Op, false, SDLoc(N)).first;
372 }
373
SoftenFloatRes_FLOG2(SDNode * N)374 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
375 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
376 SDValue Op = GetSoftenedFloat(N->getOperand(0));
377 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
378 RTLIB::LOG2_F32,
379 RTLIB::LOG2_F64,
380 RTLIB::LOG2_F80,
381 RTLIB::LOG2_F128,
382 RTLIB::LOG2_PPCF128),
383 NVT, Op, false, SDLoc(N)).first;
384 }
385
SoftenFloatRes_FLOG10(SDNode * N)386 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
387 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
388 SDValue Op = GetSoftenedFloat(N->getOperand(0));
389 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
390 RTLIB::LOG10_F32,
391 RTLIB::LOG10_F64,
392 RTLIB::LOG10_F80,
393 RTLIB::LOG10_F128,
394 RTLIB::LOG10_PPCF128),
395 NVT, Op, false, SDLoc(N)).first;
396 }
397
SoftenFloatRes_FMA(SDNode * N)398 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
399 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
400 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
401 GetSoftenedFloat(N->getOperand(1)),
402 GetSoftenedFloat(N->getOperand(2)) };
403 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
404 RTLIB::FMA_F32,
405 RTLIB::FMA_F64,
406 RTLIB::FMA_F80,
407 RTLIB::FMA_F128,
408 RTLIB::FMA_PPCF128),
409 NVT, Ops, false, SDLoc(N)).first;
410 }
411
SoftenFloatRes_FMUL(SDNode * N)412 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
413 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
414 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
415 GetSoftenedFloat(N->getOperand(1)) };
416 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
417 RTLIB::MUL_F32,
418 RTLIB::MUL_F64,
419 RTLIB::MUL_F80,
420 RTLIB::MUL_F128,
421 RTLIB::MUL_PPCF128),
422 NVT, Ops, false, SDLoc(N)).first;
423 }
424
SoftenFloatRes_FNEARBYINT(SDNode * N)425 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
426 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
427 SDValue Op = GetSoftenedFloat(N->getOperand(0));
428 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
429 RTLIB::NEARBYINT_F32,
430 RTLIB::NEARBYINT_F64,
431 RTLIB::NEARBYINT_F80,
432 RTLIB::NEARBYINT_F128,
433 RTLIB::NEARBYINT_PPCF128),
434 NVT, Op, false, SDLoc(N)).first;
435 }
436
SoftenFloatRes_FNEG(SDNode * N,unsigned ResNo)437 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
438 // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
439 if (isLegalInHWReg(N->getValueType(ResNo)))
440 return SDValue(N, ResNo);
441 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
442 SDLoc dl(N);
443 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
444 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
445 GetSoftenedFloat(N->getOperand(0)) };
446 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
447 RTLIB::SUB_F32,
448 RTLIB::SUB_F64,
449 RTLIB::SUB_F80,
450 RTLIB::SUB_F128,
451 RTLIB::SUB_PPCF128),
452 NVT, Ops, false, dl).first;
453 }
454
SoftenFloatRes_FP_EXTEND(SDNode * N)455 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
456 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
457 SDValue Op = N->getOperand(0);
458
459 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
460 // entirely possible for both f16 and f32 to be legal, so use the fully
461 // hard-float FP_EXTEND rather than FP16_TO_FP.
462 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
463 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
464 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
465 AddToWorklist(Op.getNode());
466 }
467
468 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
469 Op = GetPromotedFloat(Op);
470 // If the promotion did the FP_EXTEND to the destination type for us,
471 // there's nothing left to do here.
472 if (Op.getValueType() == N->getValueType(0)) {
473 return BitConvertToInteger(Op);
474 }
475 }
476
477 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
478 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
479 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
480 }
481
482 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
483 // nodes?
SoftenFloatRes_FP16_TO_FP(SDNode * N)484 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
485 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
486 SDValue Op = N->getOperand(0);
487 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
488 false, SDLoc(N)).first;
489 if (N->getValueType(0) == MVT::f32)
490 return Res32;
491
492 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
493 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
494 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
495 return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
496 }
497
SoftenFloatRes_FP_ROUND(SDNode * N)498 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
499 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
500 SDValue Op = N->getOperand(0);
501 if (N->getValueType(0) == MVT::f16) {
502 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
503 // storage-only type get a chance to select things.
504 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
505 }
506
507 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
508 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
509 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
510 }
511
SoftenFloatRes_FPOW(SDNode * N)512 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
513 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
514 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
515 GetSoftenedFloat(N->getOperand(1)) };
516 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
517 RTLIB::POW_F32,
518 RTLIB::POW_F64,
519 RTLIB::POW_F80,
520 RTLIB::POW_F128,
521 RTLIB::POW_PPCF128),
522 NVT, Ops, false, SDLoc(N)).first;
523 }
524
SoftenFloatRes_FPOWI(SDNode * N)525 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
526 assert(N->getOperand(1).getValueType() == MVT::i32 &&
527 "Unsupported power type!");
528 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
529 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
530 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
531 RTLIB::POWI_F32,
532 RTLIB::POWI_F64,
533 RTLIB::POWI_F80,
534 RTLIB::POWI_F128,
535 RTLIB::POWI_PPCF128),
536 NVT, Ops, false, SDLoc(N)).first;
537 }
538
SoftenFloatRes_FREM(SDNode * N)539 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
540 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
541 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
542 GetSoftenedFloat(N->getOperand(1)) };
543 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
544 RTLIB::REM_F32,
545 RTLIB::REM_F64,
546 RTLIB::REM_F80,
547 RTLIB::REM_F128,
548 RTLIB::REM_PPCF128),
549 NVT, Ops, false, SDLoc(N)).first;
550 }
551
SoftenFloatRes_FRINT(SDNode * N)552 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
553 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
554 SDValue Op = GetSoftenedFloat(N->getOperand(0));
555 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
556 RTLIB::RINT_F32,
557 RTLIB::RINT_F64,
558 RTLIB::RINT_F80,
559 RTLIB::RINT_F128,
560 RTLIB::RINT_PPCF128),
561 NVT, Op, false, SDLoc(N)).first;
562 }
563
SoftenFloatRes_FROUND(SDNode * N)564 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
565 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
566 SDValue Op = GetSoftenedFloat(N->getOperand(0));
567 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
568 RTLIB::ROUND_F32,
569 RTLIB::ROUND_F64,
570 RTLIB::ROUND_F80,
571 RTLIB::ROUND_F128,
572 RTLIB::ROUND_PPCF128),
573 NVT, Op, false, SDLoc(N)).first;
574 }
575
SoftenFloatRes_FSIN(SDNode * N)576 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
577 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
578 SDValue Op = GetSoftenedFloat(N->getOperand(0));
579 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
580 RTLIB::SIN_F32,
581 RTLIB::SIN_F64,
582 RTLIB::SIN_F80,
583 RTLIB::SIN_F128,
584 RTLIB::SIN_PPCF128),
585 NVT, Op, false, SDLoc(N)).first;
586 }
587
SoftenFloatRes_FSQRT(SDNode * N)588 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
589 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
590 SDValue Op = GetSoftenedFloat(N->getOperand(0));
591 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
592 RTLIB::SQRT_F32,
593 RTLIB::SQRT_F64,
594 RTLIB::SQRT_F80,
595 RTLIB::SQRT_F128,
596 RTLIB::SQRT_PPCF128),
597 NVT, Op, false, SDLoc(N)).first;
598 }
599
SoftenFloatRes_FSUB(SDNode * N)600 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
601 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
602 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
603 GetSoftenedFloat(N->getOperand(1)) };
604 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
605 RTLIB::SUB_F32,
606 RTLIB::SUB_F64,
607 RTLIB::SUB_F80,
608 RTLIB::SUB_F128,
609 RTLIB::SUB_PPCF128),
610 NVT, Ops, false, SDLoc(N)).first;
611 }
612
SoftenFloatRes_FTRUNC(SDNode * N)613 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
614 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
615 if (N->getValueType(0) == MVT::f16)
616 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
617
618 SDValue Op = GetSoftenedFloat(N->getOperand(0));
619 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
620 RTLIB::TRUNC_F32,
621 RTLIB::TRUNC_F64,
622 RTLIB::TRUNC_F80,
623 RTLIB::TRUNC_F128,
624 RTLIB::TRUNC_PPCF128),
625 NVT, Op, false, SDLoc(N)).first;
626 }
627
SoftenFloatRes_LOAD(SDNode * N,unsigned ResNo)628 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
629 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
630 LoadSDNode *L = cast<LoadSDNode>(N);
631 EVT VT = N->getValueType(0);
632 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
633 SDLoc dl(N);
634
635 auto MMOFlags =
636 L->getMemOperand()->getFlags() &
637 ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
638 SDValue NewL;
639 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
640 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
641 L->getChain(), L->getBasePtr(), L->getOffset(),
642 L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
643 L->getAAInfo());
644 // Legalized the chain result - switch anything that used the old chain to
645 // use the new one.
646 if (N != NewL.getValue(1).getNode())
647 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
648 return NewL;
649 }
650
651 // Do a non-extending load followed by FP_EXTEND.
652 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
653 dl, L->getChain(), L->getBasePtr(), L->getOffset(),
654 L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
655 MMOFlags, L->getAAInfo());
656 // Legalized the chain result - switch anything that used the old chain to
657 // use the new one.
658 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
659 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
660 if (LegalInHWReg)
661 return ExtendNode;
662 return BitConvertToInteger(ExtendNode);
663 }
664
SoftenFloatRes_SELECT(SDNode * N,unsigned ResNo)665 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
666 if (isLegalInHWReg(N->getValueType(ResNo)))
667 return SDValue(N, ResNo);
668 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
669 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
670 return DAG.getSelect(SDLoc(N),
671 LHS.getValueType(), N->getOperand(0), LHS, RHS);
672 }
673
SoftenFloatRes_SELECT_CC(SDNode * N,unsigned ResNo)674 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
675 if (isLegalInHWReg(N->getValueType(ResNo)))
676 return SDValue(N, ResNo);
677 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
678 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
679 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
680 LHS.getValueType(), N->getOperand(0),
681 N->getOperand(1), LHS, RHS, N->getOperand(4));
682 }
683
SoftenFloatRes_UNDEF(SDNode * N)684 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
685 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
686 N->getValueType(0)));
687 }
688
SoftenFloatRes_VAARG(SDNode * N)689 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
690 SDValue Chain = N->getOperand(0); // Get the chain.
691 SDValue Ptr = N->getOperand(1); // Get the pointer.
692 EVT VT = N->getValueType(0);
693 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
694 SDLoc dl(N);
695
696 SDValue NewVAARG;
697 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
698 N->getConstantOperandVal(3));
699
700 // Legalized the chain result - switch anything that used the old chain to
701 // use the new one.
702 if (N != NewVAARG.getValue(1).getNode())
703 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
704 return NewVAARG;
705 }
706
SoftenFloatRes_XINT_TO_FP(SDNode * N)707 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
708 bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
709 EVT SVT = N->getOperand(0).getValueType();
710 EVT RVT = N->getValueType(0);
711 EVT NVT = EVT();
712 SDLoc dl(N);
713
714 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
715 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
716 // match. Look for an appropriate libcall.
717 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
718 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
719 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
720 NVT = (MVT::SimpleValueType)t;
721 // The source needs to big enough to hold the operand.
722 if (NVT.bitsGE(SVT))
723 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
724 }
725 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
726
727 // Sign/zero extend the argument if the libcall takes a larger type.
728 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
729 NVT, N->getOperand(0));
730 return TLI.makeLibCall(DAG, LC,
731 TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
732 Op, Signed, dl).first;
733 }
734
735
736 //===----------------------------------------------------------------------===//
737 // Convert Float Operand to Integer for Non-HW-supported Operations.
738 //===----------------------------------------------------------------------===//
739
SoftenFloatOperand(SDNode * N,unsigned OpNo)740 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
741 LLVM_DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
742 dbgs() << "\n");
743 SDValue Res = SDValue();
744
745 switch (N->getOpcode()) {
746 default:
747 if (CanSkipSoftenFloatOperand(N, OpNo))
748 return false;
749 #ifndef NDEBUG
750 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
751 N->dump(&DAG); dbgs() << "\n";
752 #endif
753 llvm_unreachable("Do not know how to soften this operator's operand!");
754
755 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
756 case ISD::CopyToReg: Res = SoftenFloatOp_COPY_TO_REG(N); break;
757 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
758 case ISD::FABS: Res = SoftenFloatOp_FABS(N); break;
759 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break;
760 case ISD::FNEG: Res = SoftenFloatOp_FNEG(N); break;
761 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
762 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
763 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
764 case ISD::FP_TO_SINT:
765 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
766 case ISD::SELECT: Res = SoftenFloatOp_SELECT(N); break;
767 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
768 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
769 case ISD::STORE:
770 Res = SoftenFloatOp_STORE(N, OpNo);
771 // Do not try to analyze or soften this node again if the value is
772 // or can be held in a register. In that case, Res.getNode() should
773 // be equal to N.
774 if (Res.getNode() == N &&
775 isLegalInHWReg(N->getOperand(OpNo).getValueType()))
776 return false;
777 // Otherwise, we need to reanalyze and lower the new Res nodes.
778 break;
779 }
780
781 // If the result is null, the sub-method took care of registering results etc.
782 if (!Res.getNode()) return false;
783
784 // If the result is N, the sub-method updated N in place. Tell the legalizer
785 // core about this to re-analyze.
786 if (Res.getNode() == N)
787 return true;
788
789 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
790 "Invalid operand expansion");
791
792 ReplaceValueWith(SDValue(N, 0), Res);
793 return false;
794 }
795
CanSkipSoftenFloatOperand(SDNode * N,unsigned OpNo)796 bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
797 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
798 return false;
799
800 // When the operand type can be kept in registers there is nothing to do for
801 // the following opcodes.
802 switch (N->getOperand(OpNo).getOpcode()) {
803 case ISD::BITCAST:
804 case ISD::ConstantFP:
805 case ISD::CopyFromReg:
806 case ISD::CopyToReg:
807 case ISD::FABS:
808 case ISD::FCOPYSIGN:
809 case ISD::FNEG:
810 case ISD::Register:
811 case ISD::SELECT:
812 case ISD::SELECT_CC:
813 return true;
814 }
815
816 switch (N->getOpcode()) {
817 case ISD::ConstantFP: // Leaf node.
818 case ISD::CopyFromReg: // Operand is a register that we know to be left
819 // unchanged by SoftenFloatResult().
820 case ISD::Register: // Leaf node.
821 return true;
822 }
823 return false;
824 }
825
SoftenFloatOp_BITCAST(SDNode * N)826 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
827 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
828 GetSoftenedFloat(N->getOperand(0)));
829 }
830
SoftenFloatOp_COPY_TO_REG(SDNode * N)831 SDValue DAGTypeLegalizer::SoftenFloatOp_COPY_TO_REG(SDNode *N) {
832 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
833 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
834
835 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
836 return SDValue();
837
838 if (N->getNumOperands() == 3)
839 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2), 0);
840
841 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2,
842 N->getOperand(3)),
843 0);
844 }
845
SoftenFloatOp_FP_EXTEND(SDNode * N)846 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
847 // If we get here, the result must be legal but the source illegal.
848 EVT SVT = N->getOperand(0).getValueType();
849 EVT RVT = N->getValueType(0);
850 SDValue Op = GetSoftenedFloat(N->getOperand(0));
851
852 if (SVT == MVT::f16)
853 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
854
855 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
856 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
857
858 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
859 }
860
861
SoftenFloatOp_FP_ROUND(SDNode * N)862 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
863 // We actually deal with the partially-softened FP_TO_FP16 node too, which
864 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
865 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
866
867 EVT SVT = N->getOperand(0).getValueType();
868 EVT RVT = N->getValueType(0);
869 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
870
871 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
872 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
873
874 SDValue Op = GetSoftenedFloat(N->getOperand(0));
875 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
876 }
877
SoftenFloatOp_BR_CC(SDNode * N)878 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
879 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
880 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
881
882 EVT VT = NewLHS.getValueType();
883 NewLHS = GetSoftenedFloat(NewLHS);
884 NewRHS = GetSoftenedFloat(NewRHS);
885 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
886
887 // If softenSetCCOperands returned a scalar, we need to compare the result
888 // against zero to select between true and false values.
889 if (!NewRHS.getNode()) {
890 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
891 CCCode = ISD::SETNE;
892 }
893
894 // Update N to have the operands specified.
895 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
896 DAG.getCondCode(CCCode), NewLHS, NewRHS,
897 N->getOperand(4)),
898 0);
899 }
900
SoftenFloatOp_FABS(SDNode * N)901 SDValue DAGTypeLegalizer::SoftenFloatOp_FABS(SDNode *N) {
902 SDValue Op = GetSoftenedFloat(N->getOperand(0));
903
904 if (Op == N->getOperand(0))
905 return SDValue();
906
907 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
908 }
909
SoftenFloatOp_FCOPYSIGN(SDNode * N)910 SDValue DAGTypeLegalizer::SoftenFloatOp_FCOPYSIGN(SDNode *N) {
911 SDValue Op0 = GetSoftenedFloat(N->getOperand(0));
912 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
913
914 if (Op0 == N->getOperand(0) && Op1 == N->getOperand(1))
915 return SDValue();
916
917 return SDValue(DAG.UpdateNodeOperands(N, Op0, Op1), 0);
918 }
919
SoftenFloatOp_FNEG(SDNode * N)920 SDValue DAGTypeLegalizer::SoftenFloatOp_FNEG(SDNode *N) {
921 SDValue Op = GetSoftenedFloat(N->getOperand(0));
922
923 if (Op == N->getOperand(0))
924 return SDValue();
925
926 return SDValue(DAG.UpdateNodeOperands(N, Op), 0);
927 }
928
SoftenFloatOp_FP_TO_XINT(SDNode * N)929 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
930 bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
931 EVT SVT = N->getOperand(0).getValueType();
932 EVT RVT = N->getValueType(0);
933 EVT NVT = EVT();
934 SDLoc dl(N);
935
936 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
937 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
938 // match, eg. we don't have fp -> i8 conversions.
939 // Look for an appropriate libcall.
940 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
941 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
942 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
943 ++IntVT) {
944 NVT = (MVT::SimpleValueType)IntVT;
945 // The type needs to big enough to hold the result.
946 if (NVT.bitsGE(RVT))
947 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
948 }
949 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
950
951 SDValue Op = GetSoftenedFloat(N->getOperand(0));
952 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
953
954 // Truncate the result if the libcall returns a larger type.
955 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
956 }
957
SoftenFloatOp_SELECT(SDNode * N)958 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT(SDNode *N) {
959 SDValue Op1 = GetSoftenedFloat(N->getOperand(1));
960 SDValue Op2 = GetSoftenedFloat(N->getOperand(2));
961
962 if (Op1 == N->getOperand(1) && Op2 == N->getOperand(2))
963 return SDValue();
964
965 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0), Op1, Op2),
966 0);
967 }
968
SoftenFloatOp_SELECT_CC(SDNode * N)969 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
970 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
971 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
972
973 EVT VT = NewLHS.getValueType();
974 NewLHS = GetSoftenedFloat(NewLHS);
975 NewRHS = GetSoftenedFloat(NewRHS);
976 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
977
978 // If softenSetCCOperands returned a scalar, we need to compare the result
979 // against zero to select between true and false values.
980 if (!NewRHS.getNode()) {
981 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
982 CCCode = ISD::SETNE;
983 }
984
985 // Update N to have the operands specified.
986 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
987 N->getOperand(2), N->getOperand(3),
988 DAG.getCondCode(CCCode)),
989 0);
990 }
991
SoftenFloatOp_SETCC(SDNode * N)992 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
993 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
994 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
995
996 EVT VT = NewLHS.getValueType();
997 NewLHS = GetSoftenedFloat(NewLHS);
998 NewRHS = GetSoftenedFloat(NewRHS);
999 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
1000
1001 // If softenSetCCOperands returned a scalar, use it.
1002 if (!NewRHS.getNode()) {
1003 assert(NewLHS.getValueType() == N->getValueType(0) &&
1004 "Unexpected setcc expansion!");
1005 return NewLHS;
1006 }
1007
1008 // Otherwise, update N to have the operands specified.
1009 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1010 DAG.getCondCode(CCCode)),
1011 0);
1012 }
1013
SoftenFloatOp_STORE(SDNode * N,unsigned OpNo)1014 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
1015 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1016 assert(OpNo == 1 && "Can only soften the stored value!");
1017 StoreSDNode *ST = cast<StoreSDNode>(N);
1018 SDValue Val = ST->getValue();
1019 SDLoc dl(N);
1020
1021 if (ST->isTruncatingStore())
1022 // Do an FP_ROUND followed by a non-truncating store.
1023 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
1024 Val, DAG.getIntPtrConstant(0, dl)));
1025 else
1026 Val = GetSoftenedFloat(Val);
1027
1028 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
1029 ST->getMemOperand());
1030 }
1031
1032
1033 //===----------------------------------------------------------------------===//
1034 // Float Result Expansion
1035 //===----------------------------------------------------------------------===//
1036
1037 /// ExpandFloatResult - This method is called when the specified result of the
1038 /// specified node is found to need expansion. At this point, the node may also
1039 /// have invalid operands or may have other results that need promotion, we just
1040 /// know that (at least) one result needs expansion.
ExpandFloatResult(SDNode * N,unsigned ResNo)1041 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
1042 LLVM_DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
1043 SDValue Lo, Hi;
1044 Lo = Hi = SDValue();
1045
1046 // See if the target wants to custom expand this node.
1047 if (CustomLowerNode(N, N->getValueType(ResNo), true))
1048 return;
1049
1050 switch (N->getOpcode()) {
1051 default:
1052 #ifndef NDEBUG
1053 dbgs() << "ExpandFloatResult #" << ResNo << ": ";
1054 N->dump(&DAG); dbgs() << "\n";
1055 #endif
1056 llvm_unreachable("Do not know how to expand the result of this operator!");
1057
1058 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
1059 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
1060 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1061
1062 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
1063 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
1064 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
1065 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
1066 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
1067 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
1068
1069 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
1070 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
1071 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1072 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1073 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1074 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1075 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1076 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1077 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1078 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1079 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1080 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1081 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1082 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1083 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1084 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1085 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1086 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1087 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1088 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1089 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1090 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1091 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1092 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1093 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1094 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1095 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1096 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1097 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1098 case ISD::SINT_TO_FP:
1099 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1100 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1101 }
1102
1103 // If Lo/Hi is null, the sub-method took care of registering results etc.
1104 if (Lo.getNode())
1105 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1106 }
1107
ExpandFloatRes_ConstantFP(SDNode * N,SDValue & Lo,SDValue & Hi)1108 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1109 SDValue &Hi) {
1110 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1111 assert(NVT.getSizeInBits() == 64 &&
1112 "Do not know how to expand this float constant!");
1113 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1114 SDLoc dl(N);
1115 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1116 APInt(64, C.getRawData()[1])),
1117 dl, NVT);
1118 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1119 APInt(64, C.getRawData()[0])),
1120 dl, NVT);
1121 }
1122
ExpandFloatRes_FABS(SDNode * N,SDValue & Lo,SDValue & Hi)1123 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1124 SDValue &Hi) {
1125 assert(N->getValueType(0) == MVT::ppcf128 &&
1126 "Logic only correct for ppcf128!");
1127 SDLoc dl(N);
1128 SDValue Tmp;
1129 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1130 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1131 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1132 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1133 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1134 ISD::SETEQ);
1135 }
1136
ExpandFloatRes_FMINNUM(SDNode * N,SDValue & Lo,SDValue & Hi)1137 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1138 SDValue &Hi) {
1139 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1140 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1141 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1142 RTLIB::FMIN_PPCF128),
1143 N, false);
1144 GetPairElements(Call, Lo, Hi);
1145 }
1146
ExpandFloatRes_FMAXNUM(SDNode * N,SDValue & Lo,SDValue & Hi)1147 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1148 SDValue &Hi) {
1149 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1150 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1151 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1152 RTLIB::FMAX_PPCF128),
1153 N, false);
1154 GetPairElements(Call, Lo, Hi);
1155 }
1156
ExpandFloatRes_FADD(SDNode * N,SDValue & Lo,SDValue & Hi)1157 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1158 SDValue &Hi) {
1159 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1160 RTLIB::ADD_F32, RTLIB::ADD_F64,
1161 RTLIB::ADD_F80, RTLIB::ADD_F128,
1162 RTLIB::ADD_PPCF128),
1163 N, false);
1164 GetPairElements(Call, Lo, Hi);
1165 }
1166
ExpandFloatRes_FCEIL(SDNode * N,SDValue & Lo,SDValue & Hi)1167 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1168 SDValue &Lo, SDValue &Hi) {
1169 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1170 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1171 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1172 RTLIB::CEIL_PPCF128),
1173 N, false);
1174 GetPairElements(Call, Lo, Hi);
1175 }
1176
ExpandFloatRes_FCOPYSIGN(SDNode * N,SDValue & Lo,SDValue & Hi)1177 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1178 SDValue &Lo, SDValue &Hi) {
1179 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1180 RTLIB::COPYSIGN_F32,
1181 RTLIB::COPYSIGN_F64,
1182 RTLIB::COPYSIGN_F80,
1183 RTLIB::COPYSIGN_F128,
1184 RTLIB::COPYSIGN_PPCF128),
1185 N, false);
1186 GetPairElements(Call, Lo, Hi);
1187 }
1188
ExpandFloatRes_FCOS(SDNode * N,SDValue & Lo,SDValue & Hi)1189 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1190 SDValue &Lo, SDValue &Hi) {
1191 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1192 RTLIB::COS_F32, RTLIB::COS_F64,
1193 RTLIB::COS_F80, RTLIB::COS_F128,
1194 RTLIB::COS_PPCF128),
1195 N, false);
1196 GetPairElements(Call, Lo, Hi);
1197 }
1198
ExpandFloatRes_FDIV(SDNode * N,SDValue & Lo,SDValue & Hi)1199 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1200 SDValue &Hi) {
1201 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1202 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1203 RTLIB::DIV_F32,
1204 RTLIB::DIV_F64,
1205 RTLIB::DIV_F80,
1206 RTLIB::DIV_F128,
1207 RTLIB::DIV_PPCF128),
1208 N->getValueType(0), Ops, false,
1209 SDLoc(N)).first;
1210 GetPairElements(Call, Lo, Hi);
1211 }
1212
ExpandFloatRes_FEXP(SDNode * N,SDValue & Lo,SDValue & Hi)1213 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1214 SDValue &Lo, SDValue &Hi) {
1215 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1216 RTLIB::EXP_F32, RTLIB::EXP_F64,
1217 RTLIB::EXP_F80, RTLIB::EXP_F128,
1218 RTLIB::EXP_PPCF128),
1219 N, false);
1220 GetPairElements(Call, Lo, Hi);
1221 }
1222
ExpandFloatRes_FEXP2(SDNode * N,SDValue & Lo,SDValue & Hi)1223 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1224 SDValue &Lo, SDValue &Hi) {
1225 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1226 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1227 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1228 RTLIB::EXP2_PPCF128),
1229 N, false);
1230 GetPairElements(Call, Lo, Hi);
1231 }
1232
ExpandFloatRes_FFLOOR(SDNode * N,SDValue & Lo,SDValue & Hi)1233 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1234 SDValue &Lo, SDValue &Hi) {
1235 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1236 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1237 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1238 RTLIB::FLOOR_PPCF128),
1239 N, false);
1240 GetPairElements(Call, Lo, Hi);
1241 }
1242
ExpandFloatRes_FLOG(SDNode * N,SDValue & Lo,SDValue & Hi)1243 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1244 SDValue &Lo, SDValue &Hi) {
1245 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1246 RTLIB::LOG_F32, RTLIB::LOG_F64,
1247 RTLIB::LOG_F80, RTLIB::LOG_F128,
1248 RTLIB::LOG_PPCF128),
1249 N, false);
1250 GetPairElements(Call, Lo, Hi);
1251 }
1252
ExpandFloatRes_FLOG2(SDNode * N,SDValue & Lo,SDValue & Hi)1253 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1254 SDValue &Lo, SDValue &Hi) {
1255 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1256 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1257 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1258 RTLIB::LOG2_PPCF128),
1259 N, false);
1260 GetPairElements(Call, Lo, Hi);
1261 }
1262
ExpandFloatRes_FLOG10(SDNode * N,SDValue & Lo,SDValue & Hi)1263 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1264 SDValue &Lo, SDValue &Hi) {
1265 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1266 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1267 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1268 RTLIB::LOG10_PPCF128),
1269 N, false);
1270 GetPairElements(Call, Lo, Hi);
1271 }
1272
ExpandFloatRes_FMA(SDNode * N,SDValue & Lo,SDValue & Hi)1273 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1274 SDValue &Hi) {
1275 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1276 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1277 RTLIB::FMA_F32,
1278 RTLIB::FMA_F64,
1279 RTLIB::FMA_F80,
1280 RTLIB::FMA_F128,
1281 RTLIB::FMA_PPCF128),
1282 N->getValueType(0), Ops, false,
1283 SDLoc(N)).first;
1284 GetPairElements(Call, Lo, Hi);
1285 }
1286
ExpandFloatRes_FMUL(SDNode * N,SDValue & Lo,SDValue & Hi)1287 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1288 SDValue &Hi) {
1289 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1290 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1291 RTLIB::MUL_F32,
1292 RTLIB::MUL_F64,
1293 RTLIB::MUL_F80,
1294 RTLIB::MUL_F128,
1295 RTLIB::MUL_PPCF128),
1296 N->getValueType(0), Ops, false,
1297 SDLoc(N)).first;
1298 GetPairElements(Call, Lo, Hi);
1299 }
1300
ExpandFloatRes_FNEARBYINT(SDNode * N,SDValue & Lo,SDValue & Hi)1301 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1302 SDValue &Lo, SDValue &Hi) {
1303 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1304 RTLIB::NEARBYINT_F32,
1305 RTLIB::NEARBYINT_F64,
1306 RTLIB::NEARBYINT_F80,
1307 RTLIB::NEARBYINT_F128,
1308 RTLIB::NEARBYINT_PPCF128),
1309 N, false);
1310 GetPairElements(Call, Lo, Hi);
1311 }
1312
ExpandFloatRes_FNEG(SDNode * N,SDValue & Lo,SDValue & Hi)1313 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1314 SDValue &Hi) {
1315 SDLoc dl(N);
1316 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1317 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1318 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1319 }
1320
ExpandFloatRes_FP_EXTEND(SDNode * N,SDValue & Lo,SDValue & Hi)1321 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1322 SDValue &Hi) {
1323 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1324 SDLoc dl(N);
1325 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1326 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1327 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1328 }
1329
ExpandFloatRes_FPOW(SDNode * N,SDValue & Lo,SDValue & Hi)1330 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1331 SDValue &Lo, SDValue &Hi) {
1332 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1333 RTLIB::POW_F32, RTLIB::POW_F64,
1334 RTLIB::POW_F80, RTLIB::POW_F128,
1335 RTLIB::POW_PPCF128),
1336 N, false);
1337 GetPairElements(Call, Lo, Hi);
1338 }
1339
ExpandFloatRes_FPOWI(SDNode * N,SDValue & Lo,SDValue & Hi)1340 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1341 SDValue &Lo, SDValue &Hi) {
1342 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1343 RTLIB::POWI_F32, RTLIB::POWI_F64,
1344 RTLIB::POWI_F80, RTLIB::POWI_F128,
1345 RTLIB::POWI_PPCF128),
1346 N, false);
1347 GetPairElements(Call, Lo, Hi);
1348 }
1349
ExpandFloatRes_FREM(SDNode * N,SDValue & Lo,SDValue & Hi)1350 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1351 SDValue &Lo, SDValue &Hi) {
1352 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1353 RTLIB::REM_F32, RTLIB::REM_F64,
1354 RTLIB::REM_F80, RTLIB::REM_F128,
1355 RTLIB::REM_PPCF128),
1356 N, false);
1357 GetPairElements(Call, Lo, Hi);
1358 }
1359
ExpandFloatRes_FRINT(SDNode * N,SDValue & Lo,SDValue & Hi)1360 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1361 SDValue &Lo, SDValue &Hi) {
1362 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1363 RTLIB::RINT_F32, RTLIB::RINT_F64,
1364 RTLIB::RINT_F80, RTLIB::RINT_F128,
1365 RTLIB::RINT_PPCF128),
1366 N, false);
1367 GetPairElements(Call, Lo, Hi);
1368 }
1369
ExpandFloatRes_FROUND(SDNode * N,SDValue & Lo,SDValue & Hi)1370 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1371 SDValue &Lo, SDValue &Hi) {
1372 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1373 RTLIB::ROUND_F32,
1374 RTLIB::ROUND_F64,
1375 RTLIB::ROUND_F80,
1376 RTLIB::ROUND_F128,
1377 RTLIB::ROUND_PPCF128),
1378 N, false);
1379 GetPairElements(Call, Lo, Hi);
1380 }
1381
ExpandFloatRes_FSIN(SDNode * N,SDValue & Lo,SDValue & Hi)1382 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1383 SDValue &Lo, SDValue &Hi) {
1384 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1385 RTLIB::SIN_F32, RTLIB::SIN_F64,
1386 RTLIB::SIN_F80, RTLIB::SIN_F128,
1387 RTLIB::SIN_PPCF128),
1388 N, false);
1389 GetPairElements(Call, Lo, Hi);
1390 }
1391
ExpandFloatRes_FSQRT(SDNode * N,SDValue & Lo,SDValue & Hi)1392 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1393 SDValue &Lo, SDValue &Hi) {
1394 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1395 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1396 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1397 RTLIB::SQRT_PPCF128),
1398 N, false);
1399 GetPairElements(Call, Lo, Hi);
1400 }
1401
ExpandFloatRes_FSUB(SDNode * N,SDValue & Lo,SDValue & Hi)1402 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1403 SDValue &Hi) {
1404 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1405 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1406 RTLIB::SUB_F32,
1407 RTLIB::SUB_F64,
1408 RTLIB::SUB_F80,
1409 RTLIB::SUB_F128,
1410 RTLIB::SUB_PPCF128),
1411 N->getValueType(0), Ops, false,
1412 SDLoc(N)).first;
1413 GetPairElements(Call, Lo, Hi);
1414 }
1415
ExpandFloatRes_FTRUNC(SDNode * N,SDValue & Lo,SDValue & Hi)1416 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1417 SDValue &Lo, SDValue &Hi) {
1418 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1419 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1420 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1421 RTLIB::TRUNC_PPCF128),
1422 N, false);
1423 GetPairElements(Call, Lo, Hi);
1424 }
1425
ExpandFloatRes_LOAD(SDNode * N,SDValue & Lo,SDValue & Hi)1426 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1427 SDValue &Hi) {
1428 if (ISD::isNormalLoad(N)) {
1429 ExpandRes_NormalLoad(N, Lo, Hi);
1430 return;
1431 }
1432
1433 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1434 LoadSDNode *LD = cast<LoadSDNode>(N);
1435 SDValue Chain = LD->getChain();
1436 SDValue Ptr = LD->getBasePtr();
1437 SDLoc dl(N);
1438
1439 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1440 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1441 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1442
1443 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1444 LD->getMemoryVT(), LD->getMemOperand());
1445
1446 // Remember the chain.
1447 Chain = Hi.getValue(1);
1448
1449 // The low part is zero.
1450 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1451 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1452
1453 // Modified the chain - switch anything that used the old chain to use the
1454 // new one.
1455 ReplaceValueWith(SDValue(LD, 1), Chain);
1456 }
1457
ExpandFloatRes_XINT_TO_FP(SDNode * N,SDValue & Lo,SDValue & Hi)1458 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1459 SDValue &Hi) {
1460 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1461 EVT VT = N->getValueType(0);
1462 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1463 SDValue Src = N->getOperand(0);
1464 EVT SrcVT = Src.getValueType();
1465 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1466 SDLoc dl(N);
1467
1468 // First do an SINT_TO_FP, whether the original was signed or unsigned.
1469 // When promoting partial word types to i32 we must honor the signedness,
1470 // though.
1471 if (SrcVT.bitsLE(MVT::i32)) {
1472 // The integer can be represented exactly in an f64.
1473 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1474 MVT::i32, Src);
1475 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1476 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1477 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1478 } else {
1479 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1480 if (SrcVT.bitsLE(MVT::i64)) {
1481 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1482 MVT::i64, Src);
1483 LC = RTLIB::SINTTOFP_I64_PPCF128;
1484 } else if (SrcVT.bitsLE(MVT::i128)) {
1485 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1486 LC = RTLIB::SINTTOFP_I128_PPCF128;
1487 }
1488 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1489
1490 Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1491 GetPairElements(Hi, Lo, Hi);
1492 }
1493
1494 if (isSigned)
1495 return;
1496
1497 // Unsigned - fix up the SINT_TO_FP value just calculated.
1498 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1499 SrcVT = Src.getValueType();
1500
1501 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1502 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1503 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1504 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1505 ArrayRef<uint64_t> Parts;
1506
1507 switch (SrcVT.getSimpleVT().SimpleTy) {
1508 default:
1509 llvm_unreachable("Unsupported UINT_TO_FP!");
1510 case MVT::i32:
1511 Parts = TwoE32;
1512 break;
1513 case MVT::i64:
1514 Parts = TwoE64;
1515 break;
1516 case MVT::i128:
1517 Parts = TwoE128;
1518 break;
1519 }
1520
1521 // TODO: Are there fast-math-flags to propagate to this FADD?
1522 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1523 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
1524 APInt(128, Parts)),
1525 dl, MVT::ppcf128));
1526 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1527 Lo, Hi, ISD::SETLT);
1528 GetPairElements(Lo, Lo, Hi);
1529 }
1530
1531
1532 //===----------------------------------------------------------------------===//
1533 // Float Operand Expansion
1534 //===----------------------------------------------------------------------===//
1535
1536 /// ExpandFloatOperand - This method is called when the specified operand of the
1537 /// specified node is found to need expansion. At this point, all of the result
1538 /// types of the node are known to be legal, but other operands of the node may
1539 /// need promotion or expansion as well as the specified one.
ExpandFloatOperand(SDNode * N,unsigned OpNo)1540 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1541 LLVM_DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1542 SDValue Res = SDValue();
1543
1544 // See if the target wants to custom expand this node.
1545 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1546 return false;
1547
1548 switch (N->getOpcode()) {
1549 default:
1550 #ifndef NDEBUG
1551 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1552 N->dump(&DAG); dbgs() << "\n";
1553 #endif
1554 llvm_unreachable("Do not know how to expand this operator's operand!");
1555
1556 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1557 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1558 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1559
1560 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1561 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1562 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1563 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1564 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1565 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1566 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1567 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1568 OpNo); break;
1569 }
1570
1571 // If the result is null, the sub-method took care of registering results etc.
1572 if (!Res.getNode()) return false;
1573
1574 // If the result is N, the sub-method updated N in place. Tell the legalizer
1575 // core about this.
1576 if (Res.getNode() == N)
1577 return true;
1578
1579 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1580 "Invalid operand expansion");
1581
1582 ReplaceValueWith(SDValue(N, 0), Res);
1583 return false;
1584 }
1585
1586 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1587 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
FloatExpandSetCCOperands(SDValue & NewLHS,SDValue & NewRHS,ISD::CondCode & CCCode,const SDLoc & dl)1588 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1589 SDValue &NewRHS,
1590 ISD::CondCode &CCCode,
1591 const SDLoc &dl) {
1592 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1593 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1594 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1595
1596 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1597
1598 // FIXME: This generated code sucks. We want to generate
1599 // FCMPU crN, hi1, hi2
1600 // BNE crN, L:
1601 // FCMPU crN, lo1, lo2
1602 // The following can be improved, but not that much.
1603 SDValue Tmp1, Tmp2, Tmp3;
1604 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1605 LHSHi, RHSHi, ISD::SETOEQ);
1606 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1607 LHSLo, RHSLo, CCCode);
1608 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1609 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1610 LHSHi, RHSHi, ISD::SETUNE);
1611 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1612 LHSHi, RHSHi, CCCode);
1613 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1614 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1615 NewRHS = SDValue(); // LHS is the result, not a compare.
1616 }
1617
ExpandFloatOp_BR_CC(SDNode * N)1618 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1619 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1620 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1621 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1622
1623 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1624 // against zero to select between true and false values.
1625 if (!NewRHS.getNode()) {
1626 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1627 CCCode = ISD::SETNE;
1628 }
1629
1630 // Update N to have the operands specified.
1631 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1632 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1633 N->getOperand(4)), 0);
1634 }
1635
ExpandFloatOp_FCOPYSIGN(SDNode * N)1636 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1637 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1638 "Logic only correct for ppcf128!");
1639 SDValue Lo, Hi;
1640 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1641 // The ppcf128 value is providing only the sign; take it from the
1642 // higher-order double (which must have the larger magnitude).
1643 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1644 N->getValueType(0), N->getOperand(0), Hi);
1645 }
1646
ExpandFloatOp_FP_ROUND(SDNode * N)1647 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1648 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1649 "Logic only correct for ppcf128!");
1650 SDValue Lo, Hi;
1651 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1652 // Round it the rest of the way (e.g. to f32) if needed.
1653 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1654 N->getValueType(0), Hi, N->getOperand(1));
1655 }
1656
ExpandFloatOp_FP_TO_SINT(SDNode * N)1657 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1658 EVT RVT = N->getValueType(0);
1659 SDLoc dl(N);
1660
1661 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1662 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1663 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1664 }
1665
ExpandFloatOp_FP_TO_UINT(SDNode * N)1666 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1667 EVT RVT = N->getValueType(0);
1668 SDLoc dl(N);
1669
1670 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1671 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1672 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1673 false, dl).first;
1674 }
1675
ExpandFloatOp_SELECT_CC(SDNode * N)1676 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1677 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1678 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1679 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1680
1681 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1682 // against zero to select between true and false values.
1683 if (!NewRHS.getNode()) {
1684 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1685 CCCode = ISD::SETNE;
1686 }
1687
1688 // Update N to have the operands specified.
1689 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1690 N->getOperand(2), N->getOperand(3),
1691 DAG.getCondCode(CCCode)), 0);
1692 }
1693
ExpandFloatOp_SETCC(SDNode * N)1694 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1695 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1696 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1697 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1698
1699 // If ExpandSetCCOperands returned a scalar, use it.
1700 if (!NewRHS.getNode()) {
1701 assert(NewLHS.getValueType() == N->getValueType(0) &&
1702 "Unexpected setcc expansion!");
1703 return NewLHS;
1704 }
1705
1706 // Otherwise, update N to have the operands specified.
1707 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1708 DAG.getCondCode(CCCode)), 0);
1709 }
1710
ExpandFloatOp_STORE(SDNode * N,unsigned OpNo)1711 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1712 if (ISD::isNormalStore(N))
1713 return ExpandOp_NormalStore(N, OpNo);
1714
1715 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1716 assert(OpNo == 1 && "Can only expand the stored value so far");
1717 StoreSDNode *ST = cast<StoreSDNode>(N);
1718
1719 SDValue Chain = ST->getChain();
1720 SDValue Ptr = ST->getBasePtr();
1721
1722 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1723 ST->getValue().getValueType());
1724 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1725 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1726 (void)NVT;
1727
1728 SDValue Lo, Hi;
1729 GetExpandedOp(ST->getValue(), Lo, Hi);
1730
1731 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1732 ST->getMemoryVT(), ST->getMemOperand());
1733 }
1734
1735 //===----------------------------------------------------------------------===//
1736 // Float Operand Promotion
1737 //===----------------------------------------------------------------------===//
1738 //
1739
GetPromotionOpcode(EVT OpVT,EVT RetVT)1740 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1741 if (OpVT == MVT::f16) {
1742 return ISD::FP16_TO_FP;
1743 } else if (RetVT == MVT::f16) {
1744 return ISD::FP_TO_FP16;
1745 }
1746
1747 report_fatal_error("Attempt at an invalid promotion-related conversion");
1748 }
1749
PromoteFloatOperand(SDNode * N,unsigned OpNo)1750 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1751 SDValue R = SDValue();
1752
1753 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false)) {
1754 LLVM_DEBUG(dbgs() << "Node has been custom lowered, done\n");
1755 return false;
1756 }
1757
1758 // Nodes that use a promotion-requiring floating point operand, but doesn't
1759 // produce a promotion-requiring floating point result, need to be legalized
1760 // to use the promoted float operand. Nodes that produce at least one
1761 // promotion-requiring floating point result have their operands legalized as
1762 // a part of PromoteFloatResult.
1763 switch (N->getOpcode()) {
1764 default:
1765 llvm_unreachable("Do not know how to promote this operator's operand!");
1766
1767 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
1768 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
1769 case ISD::FP_TO_SINT:
1770 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1771 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1772 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
1773 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
1774 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
1775 }
1776
1777 if (R.getNode())
1778 ReplaceValueWith(SDValue(N, 0), R);
1779 return false;
1780 }
1781
PromoteFloatOp_BITCAST(SDNode * N,unsigned OpNo)1782 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1783 SDValue Op = N->getOperand(0);
1784 EVT OpVT = Op->getValueType(0);
1785
1786 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1787 EVT PromotedVT = Promoted->getValueType(0);
1788
1789 // Convert the promoted float value to the desired IVT.
1790 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1791 SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N),
1792 IVT, Promoted);
1793 // The final result type might not be an scalar so we need a bitcast. The
1794 // bitcast will be further legalized if needed.
1795 return DAG.getBitcast(N->getValueType(0), Convert);
1796 }
1797
1798 // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
1799 // PromoteFloatRes_FCOPYSIGN.
PromoteFloatOp_FCOPYSIGN(SDNode * N,unsigned OpNo)1800 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1801 assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1802 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1803
1804 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1805 N->getOperand(0), Op1);
1806 }
1807
1808 // Convert the promoted float value to the desired integer type
PromoteFloatOp_FP_TO_XINT(SDNode * N,unsigned OpNo)1809 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1810 SDValue Op = GetPromotedFloat(N->getOperand(0));
1811 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1812 }
1813
PromoteFloatOp_FP_EXTEND(SDNode * N,unsigned OpNo)1814 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1815 SDValue Op = GetPromotedFloat(N->getOperand(0));
1816 EVT VT = N->getValueType(0);
1817
1818 // Desired VT is same as promoted type. Use promoted float directly.
1819 if (VT == Op->getValueType(0))
1820 return Op;
1821
1822 // Else, extend the promoted float value to the desired VT.
1823 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1824 }
1825
1826 // Promote the float operands used for comparison. The true- and false-
1827 // operands have the same type as the result and are promoted, if needed, by
1828 // PromoteFloatRes_SELECT_CC
PromoteFloatOp_SELECT_CC(SDNode * N,unsigned OpNo)1829 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1830 SDValue LHS = GetPromotedFloat(N->getOperand(0));
1831 SDValue RHS = GetPromotedFloat(N->getOperand(1));
1832
1833 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1834 LHS, RHS, N->getOperand(2), N->getOperand(3),
1835 N->getOperand(4));
1836 }
1837
1838 // Construct a SETCC that compares the promoted values and sets the conditional
1839 // code.
PromoteFloatOp_SETCC(SDNode * N,unsigned OpNo)1840 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1841 EVT VT = N->getValueType(0);
1842 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1843 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1844 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1845 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1846
1847 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1848
1849 }
1850
1851 // Lower the promoted Float down to the integer value of same size and construct
1852 // a STORE of the integer value.
PromoteFloatOp_STORE(SDNode * N,unsigned OpNo)1853 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1854 StoreSDNode *ST = cast<StoreSDNode>(N);
1855 SDValue Val = ST->getValue();
1856 SDLoc DL(N);
1857
1858 SDValue Promoted = GetPromotedFloat(Val);
1859 EVT VT = ST->getOperand(1).getValueType();
1860 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1861
1862 SDValue NewVal;
1863 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1864 IVT, Promoted);
1865
1866 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1867 ST->getMemOperand());
1868 }
1869
1870 //===----------------------------------------------------------------------===//
1871 // Float Result Promotion
1872 //===----------------------------------------------------------------------===//
1873
PromoteFloatResult(SDNode * N,unsigned ResNo)1874 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
1875 SDValue R = SDValue();
1876
1877 switch (N->getOpcode()) {
1878 // These opcodes cannot appear if promotion of FP16 is done in the backend
1879 // instead of Clang
1880 case ISD::FP16_TO_FP:
1881 case ISD::FP_TO_FP16:
1882 default:
1883 llvm_unreachable("Do not know how to promote this operator's result!");
1884
1885 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
1886 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
1887 case ISD::EXTRACT_VECTOR_ELT:
1888 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
1889 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
1890
1891 // Unary FP Operations
1892 case ISD::FABS:
1893 case ISD::FCEIL:
1894 case ISD::FCOS:
1895 case ISD::FEXP:
1896 case ISD::FEXP2:
1897 case ISD::FFLOOR:
1898 case ISD::FLOG:
1899 case ISD::FLOG2:
1900 case ISD::FLOG10:
1901 case ISD::FNEARBYINT:
1902 case ISD::FNEG:
1903 case ISD::FRINT:
1904 case ISD::FROUND:
1905 case ISD::FSIN:
1906 case ISD::FSQRT:
1907 case ISD::FTRUNC:
1908 case ISD::FCANONICALIZE: R = PromoteFloatRes_UnaryOp(N); break;
1909
1910 // Binary FP Operations
1911 case ISD::FADD:
1912 case ISD::FDIV:
1913 case ISD::FMAXIMUM:
1914 case ISD::FMINIMUM:
1915 case ISD::FMAXNUM:
1916 case ISD::FMINNUM:
1917 case ISD::FMUL:
1918 case ISD::FPOW:
1919 case ISD::FREM:
1920 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
1921
1922 case ISD::FMA: // FMA is same as FMAD
1923 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
1924
1925 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
1926
1927 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
1928 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
1929 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
1930 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
1931
1932 case ISD::SINT_TO_FP:
1933 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
1934 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
1935
1936 }
1937
1938 if (R.getNode())
1939 SetPromotedFloat(SDValue(N, ResNo), R);
1940 }
1941
1942 // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
1943 // At this point, it is not possible to determine if the bitcast value is
1944 // eventually stored to memory or promoted to f32 or promoted to a floating
1945 // point at a higher precision. Some of these cases are handled by FP_EXTEND,
1946 // STORE promotion handlers.
PromoteFloatRes_BITCAST(SDNode * N)1947 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
1948 EVT VT = N->getValueType(0);
1949 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1950 // Input type isn't guaranteed to be a scalar int so bitcast if not. The
1951 // bitcast will be legalized further if necessary.
1952 EVT IVT = EVT::getIntegerVT(*DAG.getContext(),
1953 N->getOperand(0).getValueType().getSizeInBits());
1954 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
1955 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
1956 }
1957
PromoteFloatRes_ConstantFP(SDNode * N)1958 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
1959 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
1960 EVT VT = N->getValueType(0);
1961 SDLoc DL(N);
1962
1963 // Get the (bit-cast) APInt of the APFloat and build an integer constant
1964 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1965 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
1966 IVT);
1967
1968 // Convert the Constant to the desired FP type
1969 // FIXME We might be able to do the conversion during compilation and get rid
1970 // of it from the object code
1971 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1972 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
1973 }
1974
1975 // If the Index operand is a constant, try to redirect the extract operation to
1976 // the correct legalized vector. If not, bit-convert the input vector to
1977 // equivalent integer vector. Extract the element as an (bit-cast) integer
1978 // value and convert it to the promoted type.
PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode * N)1979 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
1980 SDLoc DL(N);
1981
1982 // If the index is constant, try to extract the value from the legalized
1983 // vector type.
1984 if (isa<ConstantSDNode>(N->getOperand(1))) {
1985 SDValue Vec = N->getOperand(0);
1986 SDValue Idx = N->getOperand(1);
1987 EVT VecVT = Vec->getValueType(0);
1988 EVT EltVT = VecVT.getVectorElementType();
1989
1990 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1991
1992 switch (getTypeAction(VecVT)) {
1993 default: break;
1994 case TargetLowering::TypeScalarizeVector: {
1995 SDValue Res = GetScalarizedVector(N->getOperand(0));
1996 ReplaceValueWith(SDValue(N, 0), Res);
1997 return SDValue();
1998 }
1999 case TargetLowering::TypeWidenVector: {
2000 Vec = GetWidenedVector(Vec);
2001 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
2002 ReplaceValueWith(SDValue(N, 0), Res);
2003 return SDValue();
2004 }
2005 case TargetLowering::TypeSplitVector: {
2006 SDValue Lo, Hi;
2007 GetSplitVector(Vec, Lo, Hi);
2008
2009 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
2010 SDValue Res;
2011 if (IdxVal < LoElts)
2012 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
2013 else
2014 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
2015 DAG.getConstant(IdxVal - LoElts, DL,
2016 Idx.getValueType()));
2017 ReplaceValueWith(SDValue(N, 0), Res);
2018 return SDValue();
2019 }
2020
2021 }
2022 }
2023
2024 // Bit-convert the input vector to the equivalent integer vector
2025 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
2026 EVT IVT = NewOp.getValueType().getVectorElementType();
2027
2028 // Extract the element as an (bit-cast) integer value
2029 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2030 NewOp, N->getOperand(1));
2031
2032 // Convert the element to the desired FP type
2033 EVT VT = N->getValueType(0);
2034 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2035 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2036 }
2037
2038 // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
2039 // needs promotion, so does the argument X. Note that Y, if needed, will be
2040 // handled during operand promotion.
PromoteFloatRes_FCOPYSIGN(SDNode * N)2041 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2042 EVT VT = N->getValueType(0);
2043 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2044 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2045
2046 SDValue Op1 = N->getOperand(1);
2047
2048 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2049 }
2050
2051 // Unary operation where the result and the operand have PromoteFloat type
2052 // action. Construct a new SDNode with the promoted float value of the old
2053 // operand.
PromoteFloatRes_UnaryOp(SDNode * N)2054 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2055 EVT VT = N->getValueType(0);
2056 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2057 SDValue Op = GetPromotedFloat(N->getOperand(0));
2058
2059 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2060 }
2061
2062 // Binary operations where the result and both operands have PromoteFloat type
2063 // action. Construct a new SDNode with the promoted float values of the old
2064 // operands.
PromoteFloatRes_BinOp(SDNode * N)2065 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2066 EVT VT = N->getValueType(0);
2067 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2068 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2069 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2070 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2071 }
2072
PromoteFloatRes_FMAD(SDNode * N)2073 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2074 EVT VT = N->getValueType(0);
2075 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2076 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2077 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2078 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2079
2080 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2081 }
2082
2083 // Promote the Float (first) operand and retain the Integer (second) operand
PromoteFloatRes_FPOWI(SDNode * N)2084 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2085 EVT VT = N->getValueType(0);
2086 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2087 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2088 SDValue Op1 = N->getOperand(1);
2089
2090 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2091 }
2092
2093 // Explicit operation to reduce precision. Reduce the value to half precision
2094 // and promote it back to the legal type.
PromoteFloatRes_FP_ROUND(SDNode * N)2095 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2096 SDLoc DL(N);
2097
2098 SDValue Op = N->getOperand(0);
2099 EVT VT = N->getValueType(0);
2100 EVT OpVT = Op->getValueType(0);
2101 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2102 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2103
2104 // Round promoted float to desired precision
2105 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2106 // Promote it back to the legal output type
2107 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2108 }
2109
PromoteFloatRes_LOAD(SDNode * N)2110 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2111 LoadSDNode *L = cast<LoadSDNode>(N);
2112 EVT VT = N->getValueType(0);
2113
2114 // Load the value as an integer value with the same number of bits.
2115 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2116 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2117 SDLoc(N), L->getChain(), L->getBasePtr(),
2118 L->getOffset(), L->getPointerInfo(), IVT,
2119 L->getAlignment(),
2120 L->getMemOperand()->getFlags(),
2121 L->getAAInfo());
2122 // Legalize the chain result by replacing uses of the old value chain with the
2123 // new one
2124 ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2125
2126 // Convert the integer value to the desired FP type
2127 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2128 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2129 }
2130
2131 // Construct a new SELECT node with the promoted true- and false- values.
PromoteFloatRes_SELECT(SDNode * N)2132 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2133 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2134 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2135
2136 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2137 N->getOperand(0), TrueVal, FalseVal);
2138 }
2139
2140 // Construct a new SELECT_CC node with the promoted true- and false- values.
2141 // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
PromoteFloatRes_SELECT_CC(SDNode * N)2142 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2143 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2144 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2145
2146 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2147 TrueVal.getNode()->getValueType(0), N->getOperand(0),
2148 N->getOperand(1), TrueVal, FalseVal, N->getOperand(4));
2149 }
2150
2151 // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2152 // float type.
PromoteFloatRes_XINT_TO_FP(SDNode * N)2153 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2154 SDLoc DL(N);
2155 EVT VT = N->getValueType(0);
2156 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2157 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2158 // Round the value to the desired precision (that of the source type).
2159 return DAG.getNode(
2160 ISD::FP_EXTEND, DL, NVT,
2161 DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2162 }
2163
PromoteFloatRes_UNDEF(SDNode * N)2164 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2165 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2166 N->getValueType(0)));
2167 }
2168
2169