Lines Matching refs:SrcVT
4520 EVT SrcVT = In2.getValueType(); in LowerFCOPYSIGN() local
4522 if (SrcVT.bitsLT(VT)) in LowerFCOPYSIGN()
4524 else if (SrcVT.bitsGT(VT)) in LowerFCOPYSIGN()
6003 EVT SrcVT = Src.ShuffleVec.getValueType(); in ReconstructShuffle() local
6005 if (SrcVT.getSizeInBits() == VT.getSizeInBits()) in ReconstructShuffle()
6010 EVT EltVT = SrcVT.getVectorElementType(); in ReconstructShuffle()
6014 if (SrcVT.getSizeInBits() < VT.getSizeInBits()) { in ReconstructShuffle()
6015 assert(2 * SrcVT.getSizeInBits() == VT.getSizeInBits()); in ReconstructShuffle()
6024 assert(SrcVT.getSizeInBits() == 2 * VT.getSizeInBits()); in ReconstructShuffle()
7717 EVT SrcVT = LHS.getValueType(); in EmitVectorComparison() local
7718 assert(VT.getSizeInBits() == SrcVT.getSizeInBits() && in EmitVectorComparison()
7727 if (SrcVT.getVectorElementType().isFloatingPoint()) { in EmitVectorComparison()
8781 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap() argument
10056 EVT SrcVT = Src->getValueType(0); in performExtendCombine() local
10057 if (!ResVT.isSimple() || !SrcVT.isSimple()) in performExtendCombine()
10062 if (SrcVT.getSizeInBits() != 64) in performExtendCombine()
10065 unsigned SrcEltSize = SrcVT.getScalarSizeInBits(); in performExtendCombine()
10066 unsigned ElementCount = SrcVT.getVectorNumElements(); in performExtendCombine()
10067 SrcVT = MVT::getVectorVT(MVT::getIntegerVT(SrcEltSize * 2), ElementCount); in performExtendCombine()
10069 Src = DAG.getNode(N->getOpcode(), DL, SrcVT, Src); in performExtendCombine()
10080 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getVectorElementType(), in performExtendCombine()
11076 EVT SrcVT = N0.getOperand(0).getValueType(); in performSelectCombine() local
11080 if (SrcVT == MVT::i1) in performSelectCombine()
11083 int NumMaskElts = ResVT.getSizeInBits() / SrcVT.getSizeInBits(); in performSelectCombine()
11087 SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, NumMaskElts); in performSelectCombine()
11088 EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); in performSelectCombine()
11098 DAG.getTargetLoweringInfo().isTypeLegal(SrcVT)); in performSelectCombine()
11104 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(0)); in performSelectCombine()
11106 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(1)); in performSelectCombine()