| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenExtract.cpp | 201 if (M.intersects(C) || !M.isMask(W)) in INITIALIZE_PASS_DEPENDENCY()
207 if (!M.getLoBits(U).isMask(W)) in INITIALIZE_PASS_DEPENDENCY()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | DemandedBits.cpp | 179 if (AOut.isMask()) { in determineLiveOperandBits()
187 if (AOut.isMask()) { in determineLiveOperandBits()
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| H A D | InstructionSimplify.cpp | 2441 if (C2->isMask() && // C2 == 0+1+ in simplifyOrInst()
2448 if (C1->isMask() && match(B, m_c_Add(m_Specific(A), m_Value(N)))) { in simplifyOrInst()
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| H A D | ScalarEvolution.cpp | 7652 if (CI->getValue().isMask(Z0TySize)) in createSCEV()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86DomainReassignment.cpp | 52 static bool isMask(const TargetRegisterClass *RC, in isMask() function
61 if (isMask(RC, TRI)) in getDomain()
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| H A D | X86ISelLowering.cpp | 45569 NumElts <= CmpBits && CmpVal.isMask(NumElts); in combineSetCCMOVMSK()
46710 if (MaskVal.isMask()) { in combineShiftRightLogical()
47657 !SplatVal.isMask()) in combineAndMaskToShift()
47838 !N->getConstantOperandAPInt(1).isMask(SubVecVT.getVectorNumElements())) in combineScalarAndWithMaskSetcc()
48646 if (C2.isMask(VT.getScalarSizeInBits())) in detectUSatPattern()
48651 if (C1.isNonNegative() && C2.isMask(VT.getScalarSizeInBits())) in detectUSatPattern()
48656 if (C1.isNonNegative() && C2.isMask(VT.getScalarSizeInBits()) && in detectUSatPattern()
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| /llvm-project-15.0.7/llvm/unittests/ADT/ |
| H A D | APIntTest.cpp | 1729 TEST(APIntTest, isMask) { in TEST() argument
1730 EXPECT_FALSE(APInt(32, 0x01010101).isMask()); in TEST()
1731 EXPECT_FALSE(APInt(32, 0xf0000000).isMask()); in TEST()
1732 EXPECT_FALSE(APInt(32, 0xffff0000).isMask()); in TEST()
1733 EXPECT_FALSE(APInt(32, 0xff << 1).isMask()); in TEST()
1736 EXPECT_FALSE(APInt(N, 0).isMask()); in TEST()
1741 EXPECT_TRUE(MaskVal.isMask()); in TEST()
1742 EXPECT_TRUE(MaskVal.isMask(I)); in TEST()
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| /llvm-project-15.0.7/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 469 bool isMask(unsigned numBits) const { in isMask() function
482 bool isMask() const { in isMask() function
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | CorrelatedValuePropagation.cpp | 1038 if (!RHS || !RHS->getValue().isMask()) in processAnd()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstCombineIntrinsic.cpp | 1178 if (NewNumElts >= VWidth && DemandedElts.isMask()) { in simplifyAMDGCNMemoryIntrinsicDemanded()
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| H A D | SIInstrInfo.cpp | 8359 const auto isMask = [&Mask, SrcSize](const MachineOperand *MO) -> bool { in optimizeCompareInstr() local
8369 if (isMask(SrcOp)) in optimizeCompareInstr()
8371 else if (isMask(&Def->getOperand(2))) in optimizeCompareInstr()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAddSub.cpp | 926 if (C2->isMask()) { in foldAddWithConstant()
1970 if (match(Op0, m_APInt(Op0C)) && Op0C->isMask()) { in visitSub()
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| H A D | InstCombineAndOrXor.cpp | 1825 C->isMask(Width - ShiftC->getZExtValue())) in visitAnd()
1888 C->isMask(X->getType()->getScalarSizeInBits())) { in visitAnd()
1898 C->isMask(X->getType()->getScalarSizeInBits())) { in visitAnd()
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| H A D | InstCombineSelect.cpp | 2611 if (!LowBitMaskCst->isMask()) in foldRoundUpIntegerWithPow2Alignment()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 696 if (!MaskVal.isMask()) in matchCombineLoadWithAndMask()
4695 if (!Mask.isMask()) in matchNarrowBinopFeedingAnd()
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | PatternMatch.h | 581 bool isValue(const APInt &C) { return C.isMask(); } in isValue()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5615 if (AndMask.isMask() && in visitANDLike()
5652 if (!AndC->getAPIntValue().isMask()) in isAndLoadExtLoad()
5869 if (!Mask->getAPIntValue().isMask()) in BackwardsPropagateMask()
6188 if (Splat->getAPIntValue().isMask(ElementSize)) { in visitAND()
6363 if (N1C->getAPIntValue().isMask(ScalarWidth) && in visitAND()
6500 if (!C->getAPIntValue().isMask( in visitAND()
12799 if (Mask.isMask()) { in reduceLoadWidth()
12867 if (ShiftMask.isMask()) { in reduceLoadWidth()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6557 if (ActiveBits <= 1 || !DemandBits.isMask(ActiveBits) || in optimizeLoadExt()
|