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Searched refs:getStoreSize (Results 1 – 25 of 43) sorted by relevance

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/llvm-project-15.0.7/llvm/unittests/CodeGen/
H A DSelectionDAGAddressAnalysisTest.cpp114 cast<StoreSDNode>(Store)->getMemoryVT().getStoreSize()); in TEST_F()
161 TypeSize Offset1 = SubVecVT.getStoreSize(); in TEST_F()
169 cast<StoreSDNode>(Store0)->getMemoryVT().getStoreSize()); in TEST_F()
171 cast<StoreSDNode>(Store1)->getMemoryVT().getStoreSize()); in TEST_F()
192 TypeSize Offset1 = SubVecVT.getStoreSize(); in TEST_F()
199 cast<StoreSDNode>(Store0)->getMemoryVT().getStoreSize()); in TEST_F()
201 cast<StoreSDNode>(Store1)->getMemoryVT().getStoreSize()); in TEST_F()
224 cast<StoreSDNode>(Store)->getMemoryVT().getStoreSize()); in TEST_F()
232 cast<StoreSDNode>(GStore)->getMemoryVT().getStoreSize()); in TEST_F()
286 TypeSize Offset1 = SubFixedVecVT2xi8.getStoreSize(); in TEST_F()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DValueTypes.h362 TypeSize getStoreSize() const { in getStoreSize() function
370 return getScalarType().getStoreSize().getFixedSize(); in getScalarStoreSize()
380 return getStoreSize() * 8; in getStoreSizeInBits()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td856 return St->getAlignment() >= St->getMemoryVT().getStoreSize();
862 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
924 Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
962 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2;
967 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;
972 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;
977 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;
982 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 1;
987 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2;
992 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h43 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8; in IsShortVectorType()
H A DSystemZISelLowering.cpp1751 assert((PartOffset + PartValue.getValueType().getStoreSize() <= in LowerCall()
4681 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in getVPermMask()
4906 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in addUndef()
4918 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in add()
6168 unsigned TruncBytes = TruncVT.getStoreSize(); in combineTruncateExtract()
6181 VecVT.getStoreSize() / TruncBytes); in combineTruncateExtract()
6284 unsigned ElemBytes = VT.getVectorElementType().getStoreSize(); in combineMERGE()
6372 if (CurrMemVT.isRound() && CurrMemVT.getStoreSize() <= 16) in isOnlyUsedByStores()
6458 isInt<16>(C->getSExtValue()) || MemVT.getStoreSize() <= 2) in combineSTORE()
6498 FindReplicatedImm(C, SplatVal.getValueType().getStoreSize()); in combineSTORE()
[all …]
H A DSystemZISelDAGToDAG.cpp1428 uint64_t Size = Load->getMemoryVT().getStoreSize(); in canUseBlockOperation()
1444 uint64_t Size = Load->getMemoryVT().getStoreSize(); in storeLoadCanUseMVC()
1469 TypeSize StoreSize = MemAccess->getMemoryVT().getStoreSize(); in storeLoadIsAligned()
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DMachineValueType.h1101 TypeSize getStoreSize() const { in getStoreSize() function
1109 return getScalarType().getStoreSize().getFixedSize(); in getScalarStoreSize()
1119 return getStoreSize() * 8; in getStoreSizeInBits()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1100 unsigned TotalBytes = VT.getStoreSize(); in analyzeArguments()
1105 TotalBytes += Args[j].VT.getStoreSize(); in analyzeArguments()
1142 RegIdx -= VT.getStoreSize(); in analyzeArguments()
1155 TotalBytes += Arg.VT.getStoreSize(); in getTotalArgumentsSizeInBytes()
1206 RegIdx -= VT.getStoreSize(); in analyzeReturnValues()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp540 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
681 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVECustomDAG.cpp310 .getStoreSize(); in getLoadStoreStride()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1032 PartOffset += MemVT.getStoreSize(); in analyzeFormalArgumentsCompute()
1462 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorLoad()
1472 HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()), in SplitVectorLoad()
1552 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize()); in SplitVectorStore()
1556 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorStore()
2840 unsigned Size = VT.getStoreSize(); in shouldCombineMemoryType()
2866 unsigned Size = VT.getStoreSize(); in performLoadCombine()
2916 unsigned Size = VT.getStoreSize(); in performStoreCombine()
4194 int FI = getOrCreateFixedStackObject(MFI, VT.getStoreSize(), Offset); in loadStackInputValue()
H A DR600ISelLowering.cpp1121 if (Alignment < MemVT.getStoreSize() && in LowerSTORE()
1248 assert(Load->getAlignment() >= MemVT.getStoreSize()); in lowerPrivateExtLoad()
1490 unsigned Alignment = MinAlign(VT.getStoreSize(), PartOffset); in LowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp1186 unsigned SrcBytes = LT.second.getStoreSize(); in getMemoryOpCost()
1198 *Alignment >= LT.second.getScalarType().getStoreSize()) in getMemoryOpCost()
H A DPPCISelLowering.cpp3879 unsigned ArgSize = ArgVT.getStoreSize(); in CalculateStackSlotSize()
3923 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment()
3925 Alignment = Align(ArgVT.getStoreSize()); in CalculateStackSlotAlignment()
4339 unsigned ObjSize = ObjectVT.getStoreSize(); in LowerFormalArguments_64SVR4()
6667 const unsigned StoreSize = LocVT.getStoreSize(); in CC_AIX()
6963 const unsigned LocSize = LocVT.getStoreSize(); in LowerFormalArguments_AIX()
7466 if (Arg.getValueType().getStoreSize() == LocVT.getStoreSize()) in LowerCall_AIX()
16520 Info.offset = -VT.getStoreSize()+1; in getTgtMemIntrinsic()
16521 Info.size = 2*VT.getStoreSize()-1; in getTgtMemIntrinsic()
16560 Info.offset = -VT.getStoreSize()+1; in getTgtMemIntrinsic()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST()
H A DLegalizeTypes.cpp906 DAG.CreateStackTemporary(Op.getValueType().getStoreSize(), Align); in CreateStackStoreLoad()
H A DStatepointLowering.cpp115 unsigned SpillSize = ValueType.getStoreSize(); in allocateStackSlot()
H A DLegalizeVectorTypes.cpp1409 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_SUBVECTOR()
1724 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_VECTOR_ELT()
1903 LoMemVT.getStoreSize().getFixedSize()); in SplitVecRes_VP_LOAD()
1986 LoMemVT.getStoreSize().getFixedSize()); in SplitVecRes_MLOAD()
3067 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecOp_EXTRACT_VECTOR_ELT()
3174 LoMemVT.getStoreSize().getFixedSize()); in SplitVecOp_VP_STORE()
3250 LoMemVT.getStoreSize().getFixedSize()); in SplitVecOp_MSTORE()
H A DSelectionDAG.cpp2299 return CreateStackTemporary(VT.getStoreSize(), StackAlign); in CreateStackTemporary()
2303 TypeSize VT1Size = VT1.getStoreSize(); in CreateStackTemporary()
2304 TypeSize VT2Size = VT2.getStoreSize(); in CreateStackTemporary()
7606 Size = MemVT.getStoreSize(); in getMemIntrinsicNode()
7767 uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); in getLoad()
7889 MemoryLocation::getSizeOrUnknown(Val.getValueType().getStoreSize()); in getStore()
7942 PtrInfo, MMOFlags, MemoryLocation::getSizeOrUnknown(SVT.getStoreSize()), in getTruncStore()
8037 uint64_t Size = MemoryLocation::getSizeOrUnknown(MemVT.getStoreSize()); in getLoadVP()
8190 PtrInfo, MMOFlags, MemoryLocation::getSizeOrUnknown(SVT.getStoreSize()), in getTruncStoreVP()
10811 assert(memvt.getStoreSize().getKnownMinSize() <= MMO->getSize() && in MemSDNode()
H A DTargetLowering.cpp8400 unsigned LoadedBytes = LoadedVT.getStoreSize(); in expandUnalignedLoad()
8553 unsigned StoredBytes = StoreMemVT.getStoreSize(); in expandUnalignedStore()
8674 DataVT.getStoreSize().getKnownMinSize())); in IncrementMemoryAddress()
8676 Increment = DAG.getConstant(DataVT.getStoreSize(), DL, AddrVT); in IncrementMemoryAddress()
9657 SDValue StackPtr = DAG.CreateStackTemporary(MemVT.getStoreSize(), Alignment); in expandVectorSplice()
9668 APInt(PtrVT.getFixedSizeInBits(), VT.getStoreSize().getKnownMinSize())); in expandVectorSplice()
9684 TypeSize EltByteSize = VT.getVectorElementType().getStoreSize(); in expandVectorSplice()
9691 APInt(PtrVT.getFixedSizeInBits(), VT.getStoreSize().getKnownMinSize())); in expandVectorSplice()
H A DSelectionDAGBuilder.cpp4591 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicCmpXchg()
4639 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicRMW()
4683 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicLoad()
4736 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicStore()
9901 j * Parts[j].getValueType().getStoreSize().getKnownMinSize()); in LowerCallTo()
10429 ArgNo, PartBase+i*RegisterVT.getStoreSize().getKnownMinSize()); in LowerArguments()
10442 PartBase += VT.getStoreSize().getKnownMinSize(); in LowerArguments()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp1257 uint64_t SlotSize = PtrVT.getStoreSize(); in getReturnAddressFrameIndex()
1281 DAG.getConstant(PtrVT.getStoreSize(), dl, MVT::i16); in LowerRETURNADDR()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1323 return St->getAlignment() >= St->getMemoryVT().getStoreSize();
1329 return St->getAlignment() < St->getMemoryVT().getStoreSize();
1341 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1584 return N->getAlign().value() >= N->getMemoryVT().getStoreSize(); in isAlignedMemNode()
1589 switch (N->getMemoryVT().getStoreSize()) { in isSmallStackStore()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1690 if (MemVT.getStoreSize() != VT.getVectorElementType().getStoreSize()) in Select()

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