History log of /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (Results 1 – 25 of 242)
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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5
# 460781fe 26-May-2022 Craig Topper <[email protected]>

[LegalizeTypes] Fix bug in expensive checks verification

With a fix for an expensive checks build failure exposed by new RISC-V tests.
Something about expanding two rotates in type legalization caus

[LegalizeTypes] Fix bug in expensive checks verification

With a fix for an expensive checks build failure exposed by new RISC-V tests.
Something about expanding two rotates in type legalization caused a change
in the remapping tables that the expensive checks verifying wasn't expecting.
See comment in the code for how it was fixed.

Tests came from this commit that exposed the bug
[RISCV] Add test cases showing failure to remove mask on rotate amounts.

If the masking AND has multiple users we fail to remove it.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D126036

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Revision tags: llvmorg-14.0.4
# 003b95ac 21-May-2022 Craig Topper <[email protected]>

[LegalizeTypes] Remove double map lookup in DAGTypeLegalizer::PerformExpensiveChecks. NFC

Remove repeated checks for ResId being 0.


# 66875dbc 21-May-2022 Craig Topper <[email protected]>

[LegalizeTypes] Use SmallDenseMap::count instead of SmallDenseMap::find. NFC

It's more readable and more efficient.


Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3
# ed98c1b3 09-Mar-2022 serge-sans-paille <[email protected]>

Cleanup includes: DebugInfo & CodeGen

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121332


Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2
# fee57711 18-Dec-2021 Kazu Hirata <[email protected]>

Use DenseMap::lookup (NFC)


# 5c968470 17-Dec-2021 David Truby <[email protected]>

[DAG][sve] Lowering for VLS masked truncating stores

This extends the custom lowering for truncating stores on
fixed length vectors in SVE to support masked truncating stores.
It also adds a DAG com

[DAG][sve] Lowering for VLS masked truncating stores

This extends the custom lowering for truncating stores on
fixed length vectors in SVE to support masked truncating stores.
It also adds a DAG combine for truncates followed by masked
stores.

Reviewed By: peterwaller-arm, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D108115

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Revision tags: llvmorg-13.0.1-rc1
# dd073e08 12-Oct-2021 Nathan Sidwell <[email protected]>

Avoid by-value copies of referenced objects

These were detected by the new -Wauto-by-value-copy (D114989) warning, these by-value
constant copies need only be references.

Reviewed By: aaron.ballman

Avoid by-value copies of referenced objects

These were detected by the new -Wauto-by-value-copy (D114989) warning, these by-value
constant copies need only be references.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D114990

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# 95875d24 24-Nov-2021 Zarko Todorovski <[email protected]>

[LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm

Part of work to use more inclusive language in clang/llvm. Rewording
some comments and change function and variable na

[LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm

Part of work to use more inclusive language in clang/llvm. Rewording
some comments and change function and variable names.

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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4
# 84b07c9b 19-Sep-2021 Kazu Hirata <[email protected]>

[llvm] Use pop_back_val (NFC)


Revision tags: llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2
# 7e75f6fc 10-Feb-2021 Kazu Hirata <[email protected]>

[SelectionDAG] Use range-based for loops (NFC)


Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init
# 16baad8f 24-Jan-2021 Kazu Hirata <[email protected]>

[llvm] Use pop_back_val (NFC)


Revision tags: llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5
# 35a531fb 29-Sep-2020 David Sherwood <[email protected]>

[SVE][CodeGen][NFC] Replace TypeSize comparison operators with their scalar equivalents

In certain places in llvm/lib/CodeGen we were relying upon the TypeSize
comparison operators when in fact the

[SVE][CodeGen][NFC] Replace TypeSize comparison operators with their scalar equivalents

In certain places in llvm/lib/CodeGen we were relying upon the TypeSize
comparison operators when in fact the code was only ever expecting
either scalar values or fixed width vectors. I've changed some of these
places to use the equivalent scalar operator.

Differential Revision: https://reviews.llvm.org/D88482

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Revision tags: llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1
# 833b3b0d 23-Jul-2020 Sebastian Neubauer <[email protected]>

[AMDGPU] Add v3f16/v3i16 support to SDag

Fix lowering and instruction selection for v3x16 types
and enable InstCombine to emit them.

This patch only implements it for the selection dag.
GlobalISel

[AMDGPU] Add v3f16/v3i16 support to SDag

Fix lowering and instruction selection for v3x16 types
and enable InstCombine to emit them.

This patch only implements it for the selection dag.
GlobalISel tests in GlobalISel/llvm.amdgcn.image.load.1d.d16.ll and
GlobalISel/llvm.amdgcn.image.store.2d.d16.ll still don't work.

Differential Revision: https://reviews.llvm.org/D84420

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Revision tags: llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3
# da731894 03-Jul-2020 David Sherwood <[email protected]>

[CodeGen] Replace calls to getVectorNumElements() in DAGTypeLegalizer::SetSplitVector

In DAGTypeLegalizer::SetSplitVector I have changed calls in the assert
from getVectorNumElements() to getVectorE

[CodeGen] Replace calls to getVectorNumElements() in DAGTypeLegalizer::SetSplitVector

In DAGTypeLegalizer::SetSplitVector I have changed calls in the assert
from getVectorNumElements() to getVectorElementCount(), since this
code path works for both fixed and scalable vectors.

This fixes up one warning in the test:

sve-sext-zext.ll

Differential Revision: https://reviews.llvm.org/D83196

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Revision tags: llvmorg-10.0.1-rc2
# cc887240 02-Jun-2020 David Sherwood <[email protected]>

[CodeGen] Ensure callers of CreateStackTemporary use sensible alignments

In two instances of CreateStackTemporary we are sometimes promoting
alignments beyond the stack alignment. I have introduced

[CodeGen] Ensure callers of CreateStackTemporary use sensible alignments

In two instances of CreateStackTemporary we are sometimes promoting
alignments beyond the stack alignment. I have introduced a new function
called getReducedAlign that will return the alignment for the broken
down parts of illegal vector types. For example, on NEON a <32 x i8>
type is made up of two <16 x i8> types - in this case the sensible
alignment is 16 bytes, not 32.

In the legalization code wherever we create stack temporaries I have
started using the reduced alignments instead for illegal vector types.

I added a test to

CodeGen/AArch64/build-one-lane.ll

that tries to insert an element into an illegal fixed vector type
that involves creating a temporary stack object.

Differential Revision: https://reviews.llvm.org/D80370

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# 937cb7a8 05-Jun-2020 Sander de Smalen <[email protected]>

Reland D80640: [CodeGen][SVE] Calculate correct type legalization for scalable vectors.

This reverts commit 9bcef270d7a319c6c0fdffc6c80984a8f0a30ecb.


# 9bcef270 05-Jun-2020 Sander de Smalen <[email protected]>

Revert "[CodeGen][SVE] Calculate correct type legalization for scalable vectors."

Seems to break some buildbots, reverting the patch for now.

This reverts commit 164f4b9d26fdf3cd640a09b63b5ec44d033

Revert "[CodeGen][SVE] Calculate correct type legalization for scalable vectors."

Seems to break some buildbots, reverting the patch for now.

This reverts commit 164f4b9d26fdf3cd640a09b63b5ec44d033cbe8a.

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# 164f4b9d 05-Jun-2020 Sander de Smalen <[email protected]>

[CodeGen][SVE] Calculate correct type legalization for scalable vectors.

This patch updates TargetLoweringBase::computeRegisterProperties and
TargetLoweringBase::getTypeConversion to support scalabl

[CodeGen][SVE] Calculate correct type legalization for scalable vectors.

This patch updates TargetLoweringBase::computeRegisterProperties and
TargetLoweringBase::getTypeConversion to support scalable vectors,
and make the right calls on how to legalise them. These changes are required
to legalise both MVTs and EVTs.

Reviewers: efriedma, david-arm, ctetreau

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80640

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Revision tags: llvmorg-10.0.1-rc1
# 41f13f1f 28-Mar-2020 Jonathan Roelofs <[email protected]>

reland: [DAG] Fix PR45049: LegalizeTypes crash

Sometimes LegalizeTypes knows about common subexpressions before SelectionDAG
does, leading to accidental SDValue removal before its reference count wa

reland: [DAG] Fix PR45049: LegalizeTypes crash

Sometimes LegalizeTypes knows about common subexpressions before SelectionDAG
does, leading to accidental SDValue removal before its reference count was
truly zero.

Differential Revision: https://reviews.llvm.org/D76994

Reviewed-By: bjope

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45049

Reverted in 3ce77142a6452d76d6f97c9a6c2da193e78841ba because the previous patch
broke the expensive-checks bots. The new patch removes the broken check.

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# 3ce77142 04-Apr-2020 Jonathan Roelofs <[email protected]>

Revert "[DAG] Fix PR45049: LegalizeTypes crash"

This reverts commit 17673ae0b2cbf8d48973b673d413fb8591d8aae7.


# 17673ae0 28-Mar-2020 Jonathan Roelofs <[email protected]>

[DAG] Fix PR45049: LegalizeTypes crash

Sometimes LegalizeTypes knows about common subexpressions before SelectionDAG
does, leading to accidental SDValue removal before its reference count was
truly

[DAG] Fix PR45049: LegalizeTypes crash

Sometimes LegalizeTypes knows about common subexpressions before SelectionDAG
does, leading to accidental SDValue removal before its reference count was
truly zero.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45049

https://reviews.llvm.org/D76994

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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2
# eeb63944 08-Feb-2020 Craig Topper <[email protected]>

[LegalizeTypes][ARM][AArch64][PowerPC][RISCV][X86] Use BUILD_PAIR to return expanded integer results from ReplaceNodeResults instead of just returning two results.

Remove code from LegalizeTypes tha

[LegalizeTypes][ARM][AArch64][PowerPC][RISCV][X86] Use BUILD_PAIR to return expanded integer results from ReplaceNodeResults instead of just returning two results.

Remove code from LegalizeTypes that allowed this to work.

We were already using BUILD_PAIR for this in some places so this
standardizes on a single way to do this.

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# 943b5561 01-Feb-2020 Craig Topper <[email protected]>

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

This is based on this llvm-dev thread http://lists.llvm.org/pi

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

This is based on this llvm-dev thread http://lists.llvm.org/pipermail/llvm-dev/2019-December/137521.html

The current strategy for f16 is to promote type to float every except where the specific width is required like loads, stores, and bitcasts. This results in rounding occurring in odd places instead of immediately after arithmetic operations. This interacts in weird ways with the __fp16 type in clang which is a storage only type where arithmetic is always promoted to float. InstCombine can remove some fpext/fptruncs around such arithmetic and turn it into arithmetic on half. This wouldn't be so bad if SelectionDAG was able to put those fpext/fpround back in when it promotes.

It is also not obvious how to handle to make the existing strategy work with STRICT fp. We need to use STRICT versions of the conversions which require chain operands. But if the conversions are created for a bitcast, there is no place to get an appropriate chain from.

This patch implements a different strategy where conversions are emitted directly around arithmetic operations. And otherwise its passed around as an i16 including in arguments and return values. This can result in more conversions between arithmetic operations, but is closer to matching the IR the frontend generates for __fp16. And it will allow us to use the chain from constrained arithmetic nodes to link the STRICT_FP_TO_FP16/STRICT_FP16_TO_FP that will need to be added. I've set it up so that each target can opt into the new behavior. Converting all the targets myself was more than I was able to handle.

Differential Revision: https://reviews.llvm.org/D73749

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Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3
# d4345636 11-Dec-2019 Craig Topper <[email protected]>

[LegalizeTypes] Remove manual worklist management from SoftenFloatRes_FP_EXTEND.

I think this is no longer needed. The system should take care
of legalizing any new nodes that are added. I think thi

[LegalizeTypes] Remove manual worklist management from SoftenFloatRes_FP_EXTEND.

I think this is no longer needed. The system should take care
of legalizing any new nodes that are added. I think this might
have been needed prior to r371709 or r307053.

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Revision tags: llvmorg-9.0.1-rc2
# f586fd44 03-Dec-2019 Craig Topper <[email protected]>

[FPEnv] [PowerPC] Lowering ppc_fp128 StrictFP Nodes to libcalls

This is an alternative to D64662 that shares more code between
strict and non-strict nodes. It's modeled after the implementation
that

[FPEnv] [PowerPC] Lowering ppc_fp128 StrictFP Nodes to libcalls

This is an alternative to D64662 that shares more code between
strict and non-strict nodes. It's modeled after the implementation
that I did for softening.

Differential Revision: https://reviews.llvm.org/D70867

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