Home
last modified time | relevance | path

Searched refs:getResNo (Results 1 – 25 of 37) sorted by relevance

12

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSDNodeDbgValue.h48 unsigned getResNo() const { in getResNo() function
90 return getSDNode() == Other.getSDNode() && getResNo() == Other.getResNo();
H A DSelectionDAGPrinter.cpp64 std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo()); in getEdgeTarget()
131 GW.emitEdge(nullptr, -1, G->getRoot().getNode(), G->getRoot().getResNo(), in addCustomGraphFeatures()
H A DScheduleDAGSDNodes.cpp121 unsigned ResNo = User->getOperand(2).getResNo(); in CheckForPhysRegDependency()
236 if (I.getUse().getResNo() != Chain.getResNo()) in ClusterNeighboringLoads()
474 unsigned DefIdx = N->getOperand(i).getResNo(); in AddSchedEdges()
653 unsigned DefIdx = Use->getOperand(OpIdx).getResNo(); in computeOperandLatency()
742 VRBaseMap.count({L.getSDNode(), L.getResNo()}) == 0) in ProcessSDDbgValues()
H A DResourcePriorityQueue.cpp131 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU()
335 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in rawRegPressureDelta()
485 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in scheduledNode()
H A DInstrEmitter.cpp114 User->getOperand(2).getResNo() == ResNo) { in EmitCopyFromReg()
124 if (Op.getNode() != Node || Op.getResNo() != ResNo) in EmitCopyFromReg()
126 MVT VT = Node->getSimpleValueType(Op.getResNo()); in EmitCopyFromReg()
233 User->getOperand(2).getResNo() == i) { in CreateVirtualRegisters()
731 SDValue V = SDValue(Op.getSDNode(), Op.getResNo()); in AddDbgValueLocationOps()
823 SDValue Op = SDValue(Node, DbgOperand.getResNo()); in EmitDbgInstrRef()
H A DSelectionDAG.cpp3197 assert((Op.getResNo() == 0 || Op.getResNo() == 1) && "Unknown result"); in computeKnownBits()
3201 if (Op.getResNo() == 0) in computeKnownBits()
3208 assert((Op.getResNo() == 0 || Op.getResNo() == 1) && "Unknown result"); in computeKnownBits()
3212 if (Op.getResNo() == 0) in computeKnownBits()
3251 if (Op.getResNo() != 1) in computeKnownBits()
3335 assert((Op.getResNo() == 0 || Op.getResNo() == 1) && "Unknown result"); in computeKnownBits()
3358 if (Op.getResNo() == 0) in computeKnownBits()
3533 if (Op.getResNo() == 1) { in computeKnownBits()
4162 if (Op.getResNo() != 1) in ComputeNumSignBits()
4439 if (Op.getResNo() == 0) { in ComputeNumSignBits()
[all …]
H A DSelectionDAGAddressAnalysis.cpp239 if (LSBase->isIndexed() && Base.getResNo() == IndexResNo) in matchLSNode()
H A DSelectionDAGDumper.cpp864 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); in print()
973 if (unsigned RN = Value.getResNo()) in printOperand()
H A DSelectionDAGBuilder.cpp1384 SDDbgOperand::fromNode(N.getNode(), N.getResNo())); in handleDebugValue()
1945 SDValue Val = RetOp.getValue(RetOp.getResNo() + i); in visitRet()
1991 SDValue(RetOp.getNode(), RetOp.getResNo() + j), in visitRet()
3374 EVT VT = LHSVal.getNode()->getValueType(LHSVal.getResNo() + i); in visitSelect()
3384 Ops.push_back(SDValue(LHSVal.getNode(), LHSVal.getResNo() + i)); in visitSelect()
3788 SDValue(Agg.getNode(), Agg.getResNo() + i); in visitInsertValue()
3799 SDValue(Agg.getNode(), Agg.getResNo() + i); in visitInsertValue()
3834 SDValue(Agg.getNode(), Agg.getResNo() + i); in visitExtractValue()
4287 SDValue Val = SDValue(Src.getNode(), Src.getResNo() + i); in visitStore()
5737 return DAG.getDbgValue(Variable, Expr, N.getNode(), N.getResNo(), in getDbgValue()
[all …]
H A DScheduleDAGFast.cpp224 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in CopyAndMoveSuccessors()
H A DLegalizeTypes.cpp93 if (UI.getUse().getResNo() == i) in PerformExpensiveChecks()
H A DLegalizeVectorOps.cpp226 return SDValue(Result, Op.getResNo()); in TranslateLegalizeResults()
240 return Results[Op.getResNo()]; in RecursivelyLegalizeResults()
H A DDAGCombiner.cpp2765 if (V.getResNo() != 1) in getAsCarry()
2870 N1.getResNo() == 0) in visitADDLikeCommutative()
3132 if (Carry1.getResNo() != 1 || Carry0.getResNo() != 1) in combineADDCARRYDiamond()
3305 (N0.getOpcode() == ISD::UADDO && N0.getResNo() == 0 && in visitADDCARRYLike()
6260 N0.getOperand(0).getResNo() == 0) || in visitAND()
6261 (N0.getOpcode() == ISD::LOAD && N0.getResNo() == 0)) { in visitAND()
11416 if (UI.getUse().getResNo() != N0.getResNo()) in ExtendUsesToFormExtLoad()
11451 if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) { in ExtendUsesToFormExtLoad()
11917 if (UI.getUse().getResNo() != 0 || User == N0.getNode()) in foldSextSetcc()
13517 return Elt.getOperand(Elt.getResNo()).getNode(); in getBuildPairElt()
[all …]
H A DScheduleDAGRRList.cpp1162 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in CopyAndMoveSuccessors()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DDAGISelMatcher.cpp362 if (CT->getResNo() >= getOpcode().getNumResults()) in isContradictoryImpl()
365 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo()); in isContradictoryImpl()
H A DDAGISelMatcherOpt.cpp51 CT->getResNo() == 0) // CheckChildType checks res #0 in ContractNodes()
376 CTM->getResNo() != 0 || in FactorNodes()
H A DDAGISelMatcherEmitter.cpp573 if (cast<CheckTypeMatcher>(N)->getResNo() == 0) { in EmitMatcher()
578 OS << "OPC_CheckTypeRes, " << cast<CheckTypeMatcher>(N)->getResNo() in EmitMatcher()
H A DDAGISelMatcher.h505 unsigned getResNo() const { return ResNo; } in getResNo() function
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h149 unsigned getResNo() const { return ResNo; }
247 (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
308 unsigned getResNo() const { return Val.getResNo(); }
3095 return (Op.getResNo() == 1 &&
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp2312 if (N.getResNo() != 0) break; in matchAddressRecursively()
2956 if (UI.getUse().getResNo() != Flags.getResNo()) in onlyUsesZeroFlag()
2966 if (FlagUI.getUse().getResNo() != 1) continue; in onlyUsesZeroFlag()
2992 if (UI.getUse().getResNo() != Flags.getResNo()) in hasNoSignFlagUses()
3002 if (FlagUI.getUse().getResNo() != 1) continue; in hasNoSignFlagUses()
3048 if (UI.getUse().getResNo() != Flags.getResNo()) in hasNoCarryFlagUses()
3061 if (FlagUI.getUse().getResNo() != 1) in hasNoCarryFlagUses()
3105 if (StoredVal.getResNo() != 0) return false; in isFusableLoadOpStorePattern()
3503 Op.getNode()->hasNUsesOfValue(NUses, Op.getResNo()); in matchBitExtract()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1681 if (Op.getResNo() != 0 || NeedOF || NeedCF) { in EmitTest()
2007 if (Op.getResNo() == 1 && in isM68kLogicalCmp()
2013 if (Op.getResNo() == 2 && Opc == M68kISD::UMUL) in isM68kLogicalCmp()
2266 Cond.getOperand(0).getResNo() == 1 && in LowerBRCOND()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2770 CmpOp0.getResNo() == 0 && CmpOp0->hasNUsesOfValue(1, 0) && in getCmp()
2774 CmpOp0.getResNo() == CmpOp0->getNumValues() - 1 && in getCmp()
3127 return Res.getValue(Op.getResNo()); in lowerSTRICT_FSETCC()
6324 else if (UI.getUse().getResNo() == 0) in combineLOAD()
6337 Ops.push_back((Op.getNode() == N && Op.getResNo() == 0) ? Extract0 : Op); in combineLOAD()
7281 if (Op.getResNo() == 1 && isIntrinsicWithCC(Op, tmp0, tmp1)) { in computeKnownBitsForTargetNode()
7286 if (Op.getResNo() != 0 || VT == MVT::Untyped) in computeKnownBitsForTargetNode()
7393 if (Op.getResNo() != 0) in ComputeNumSignBitsForTargetNode()
H A DSystemZISelDAGToDAG.cpp1251 if (StoredVal.getResNo() != 0) in isFusableLoadOpStorePattern()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5083 if (Cond.getResNo() == 1 && in LowerSELECT()
5665 if (Cond.getResNo() == 1 && in LowerBRCOND()
13513 VecRed.getResNo() != 0 || in PerformADDVecReduce()
14914 Op0.getResNo() == 0 && Op1.getResNo() == 1) in PerformVMOVDRRCombine()
15281 unsigned ResNo = Op0.getResNo(); in PerformExtractEltToVMOVRRD()
15964 if (UI.getUse().getResNo() != Addr.getResNo() || in CombineBaseUpdate()
15987 if (UI.getUse().getResNo() != Base.getResNo() || User == Addr.getNode() || in CombineBaseUpdate()
16071 UI.getUse().getResNo() != Addr.getResNo()) in PerformMVEVLDCombine()
16205 if (UI.getUse().getResNo() == NumVecs) in CombineVLDDUP()
16229 unsigned ResNo = UI.getUse().getResNo(); in CombineVLDDUP()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1822 if (Op.getResNo() == 1) { in computeKnownBitsForTargetNode()

12