1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "SDNodeDbgValue.h"
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include <cstdint>
49 #include <iterator>
50 
51 using namespace llvm;
52 
53 static cl::opt<bool>
54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55                   cl::desc("Display more information when dumping selection "
56                            "DAG nodes."));
57 
getOperationName(const SelectionDAG * G) const58 std::string SDNode::getOperationName(const SelectionDAG *G) const {
59   switch (getOpcode()) {
60   default:
61     if (getOpcode() < ISD::BUILTIN_OP_END)
62       return "<<Unknown DAG Node>>";
63     if (isMachineOpcode()) {
64       if (G)
65         if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66           if (getMachineOpcode() < TII->getNumOpcodes())
67             return std::string(TII->getName(getMachineOpcode()));
68       return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69     }
70     if (G) {
71       const TargetLowering &TLI = G->getTargetLoweringInfo();
72       const char *Name = TLI.getTargetNodeName(getOpcode());
73       if (Name) return Name;
74       return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75     }
76     return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77 
78 #ifndef NDEBUG
79   case ISD::DELETED_NODE:               return "<<Deleted Node!>>";
80 #endif
81   case ISD::PREFETCH:                   return "Prefetch";
82   case ISD::ATOMIC_FENCE:               return "AtomicFence";
83   case ISD::ATOMIC_CMP_SWAP:            return "AtomicCmpSwap";
84   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
85   case ISD::ATOMIC_SWAP:                return "AtomicSwap";
86   case ISD::ATOMIC_LOAD_ADD:            return "AtomicLoadAdd";
87   case ISD::ATOMIC_LOAD_SUB:            return "AtomicLoadSub";
88   case ISD::ATOMIC_LOAD_AND:            return "AtomicLoadAnd";
89   case ISD::ATOMIC_LOAD_CLR:            return "AtomicLoadClr";
90   case ISD::ATOMIC_LOAD_OR:             return "AtomicLoadOr";
91   case ISD::ATOMIC_LOAD_XOR:            return "AtomicLoadXor";
92   case ISD::ATOMIC_LOAD_NAND:           return "AtomicLoadNand";
93   case ISD::ATOMIC_LOAD_MIN:            return "AtomicLoadMin";
94   case ISD::ATOMIC_LOAD_MAX:            return "AtomicLoadMax";
95   case ISD::ATOMIC_LOAD_UMIN:           return "AtomicLoadUMin";
96   case ISD::ATOMIC_LOAD_UMAX:           return "AtomicLoadUMax";
97   case ISD::ATOMIC_LOAD_FADD:           return "AtomicLoadFAdd";
98   case ISD::ATOMIC_LOAD:                return "AtomicLoad";
99   case ISD::ATOMIC_STORE:               return "AtomicStore";
100   case ISD::PCMARKER:                   return "PCMarker";
101   case ISD::READCYCLECOUNTER:           return "ReadCycleCounter";
102   case ISD::SRCVALUE:                   return "SrcValue";
103   case ISD::MDNODE_SDNODE:              return "MDNode";
104   case ISD::EntryToken:                 return "EntryToken";
105   case ISD::TokenFactor:                return "TokenFactor";
106   case ISD::AssertSext:                 return "AssertSext";
107   case ISD::AssertZext:                 return "AssertZext";
108   case ISD::AssertAlign:                return "AssertAlign";
109 
110   case ISD::BasicBlock:                 return "BasicBlock";
111   case ISD::VALUETYPE:                  return "ValueType";
112   case ISD::Register:                   return "Register";
113   case ISD::RegisterMask:               return "RegisterMask";
114   case ISD::Constant:
115     if (cast<ConstantSDNode>(this)->isOpaque())
116       return "OpaqueConstant";
117     return "Constant";
118   case ISD::ConstantFP:                 return "ConstantFP";
119   case ISD::GlobalAddress:              return "GlobalAddress";
120   case ISD::GlobalTLSAddress:           return "GlobalTLSAddress";
121   case ISD::FrameIndex:                 return "FrameIndex";
122   case ISD::JumpTable:                  return "JumpTable";
123   case ISD::GLOBAL_OFFSET_TABLE:        return "GLOBAL_OFFSET_TABLE";
124   case ISD::RETURNADDR:                 return "RETURNADDR";
125   case ISD::ADDROFRETURNADDR:           return "ADDROFRETURNADDR";
126   case ISD::FRAMEADDR:                  return "FRAMEADDR";
127   case ISD::SPONENTRY:                  return "SPONENTRY";
128   case ISD::LOCAL_RECOVER:              return "LOCAL_RECOVER";
129   case ISD::READ_REGISTER:              return "READ_REGISTER";
130   case ISD::WRITE_REGISTER:             return "WRITE_REGISTER";
131   case ISD::FRAME_TO_ARGS_OFFSET:       return "FRAME_TO_ARGS_OFFSET";
132   case ISD::EH_DWARF_CFA:               return "EH_DWARF_CFA";
133   case ISD::EH_RETURN:                  return "EH_RETURN";
134   case ISD::EH_SJLJ_SETJMP:             return "EH_SJLJ_SETJMP";
135   case ISD::EH_SJLJ_LONGJMP:            return "EH_SJLJ_LONGJMP";
136   case ISD::EH_SJLJ_SETUP_DISPATCH:     return "EH_SJLJ_SETUP_DISPATCH";
137   case ISD::ConstantPool:               return "ConstantPool";
138   case ISD::TargetIndex:                return "TargetIndex";
139   case ISD::ExternalSymbol:             return "ExternalSymbol";
140   case ISD::BlockAddress:               return "BlockAddress";
141   case ISD::INTRINSIC_WO_CHAIN:
142   case ISD::INTRINSIC_VOID:
143   case ISD::INTRINSIC_W_CHAIN: {
144     unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
145     unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
146     if (IID < Intrinsic::num_intrinsics)
147       return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
148     if (!G)
149       return "Unknown intrinsic";
150     if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
151       return TII->getName(IID);
152     llvm_unreachable("Invalid intrinsic ID");
153   }
154 
155   case ISD::BUILD_VECTOR:               return "BUILD_VECTOR";
156   case ISD::TargetConstant:
157     if (cast<ConstantSDNode>(this)->isOpaque())
158       return "OpaqueTargetConstant";
159     return "TargetConstant";
160   case ISD::TargetConstantFP:           return "TargetConstantFP";
161   case ISD::TargetGlobalAddress:        return "TargetGlobalAddress";
162   case ISD::TargetGlobalTLSAddress:     return "TargetGlobalTLSAddress";
163   case ISD::TargetFrameIndex:           return "TargetFrameIndex";
164   case ISD::TargetJumpTable:            return "TargetJumpTable";
165   case ISD::TargetConstantPool:         return "TargetConstantPool";
166   case ISD::TargetExternalSymbol:       return "TargetExternalSymbol";
167   case ISD::MCSymbol:                   return "MCSymbol";
168   case ISD::TargetBlockAddress:         return "TargetBlockAddress";
169 
170   case ISD::CopyToReg:                  return "CopyToReg";
171   case ISD::CopyFromReg:                return "CopyFromReg";
172   case ISD::UNDEF:                      return "undef";
173   case ISD::VSCALE:                     return "vscale";
174   case ISD::MERGE_VALUES:               return "merge_values";
175   case ISD::INLINEASM:                  return "inlineasm";
176   case ISD::INLINEASM_BR:               return "inlineasm_br";
177   case ISD::EH_LABEL:                   return "eh_label";
178   case ISD::ANNOTATION_LABEL:           return "annotation_label";
179   case ISD::HANDLENODE:                 return "handlenode";
180 
181   // Unary operators
182   case ISD::FABS:                       return "fabs";
183   case ISD::FMINNUM:                    return "fminnum";
184   case ISD::STRICT_FMINNUM:             return "strict_fminnum";
185   case ISD::FMAXNUM:                    return "fmaxnum";
186   case ISD::STRICT_FMAXNUM:             return "strict_fmaxnum";
187   case ISD::FMINNUM_IEEE:               return "fminnum_ieee";
188   case ISD::FMAXNUM_IEEE:               return "fmaxnum_ieee";
189   case ISD::FMINIMUM:                   return "fminimum";
190   case ISD::STRICT_FMINIMUM:            return "strict_fminimum";
191   case ISD::FMAXIMUM:                   return "fmaximum";
192   case ISD::STRICT_FMAXIMUM:            return "strict_fmaximum";
193   case ISD::FNEG:                       return "fneg";
194   case ISD::FSQRT:                      return "fsqrt";
195   case ISD::STRICT_FSQRT:               return "strict_fsqrt";
196   case ISD::FCBRT:                      return "fcbrt";
197   case ISD::FSIN:                       return "fsin";
198   case ISD::STRICT_FSIN:                return "strict_fsin";
199   case ISD::FCOS:                       return "fcos";
200   case ISD::STRICT_FCOS:                return "strict_fcos";
201   case ISD::FSINCOS:                    return "fsincos";
202   case ISD::FTRUNC:                     return "ftrunc";
203   case ISD::STRICT_FTRUNC:              return "strict_ftrunc";
204   case ISD::FFLOOR:                     return "ffloor";
205   case ISD::STRICT_FFLOOR:              return "strict_ffloor";
206   case ISD::FCEIL:                      return "fceil";
207   case ISD::STRICT_FCEIL:               return "strict_fceil";
208   case ISD::FRINT:                      return "frint";
209   case ISD::STRICT_FRINT:               return "strict_frint";
210   case ISD::FNEARBYINT:                 return "fnearbyint";
211   case ISD::STRICT_FNEARBYINT:          return "strict_fnearbyint";
212   case ISD::FROUND:                     return "fround";
213   case ISD::STRICT_FROUND:              return "strict_fround";
214   case ISD::FROUNDEVEN:                 return "froundeven";
215   case ISD::STRICT_FROUNDEVEN:          return "strict_froundeven";
216   case ISD::FEXP:                       return "fexp";
217   case ISD::STRICT_FEXP:                return "strict_fexp";
218   case ISD::FEXP2:                      return "fexp2";
219   case ISD::STRICT_FEXP2:               return "strict_fexp2";
220   case ISD::FLOG:                       return "flog";
221   case ISD::STRICT_FLOG:                return "strict_flog";
222   case ISD::FLOG2:                      return "flog2";
223   case ISD::STRICT_FLOG2:               return "strict_flog2";
224   case ISD::FLOG10:                     return "flog10";
225   case ISD::STRICT_FLOG10:              return "strict_flog10";
226 
227   // Binary operators
228   case ISD::ADD:                        return "add";
229   case ISD::SUB:                        return "sub";
230   case ISD::MUL:                        return "mul";
231   case ISD::MULHU:                      return "mulhu";
232   case ISD::MULHS:                      return "mulhs";
233   case ISD::AVGFLOORU:                  return "avgflooru";
234   case ISD::AVGFLOORS:                  return "avgfloors";
235   case ISD::AVGCEILU:                   return "avgceilu";
236   case ISD::AVGCEILS:                   return "avgceils";
237   case ISD::ABDS:                       return "abds";
238   case ISD::ABDU:                       return "abdu";
239   case ISD::SDIV:                       return "sdiv";
240   case ISD::UDIV:                       return "udiv";
241   case ISD::SREM:                       return "srem";
242   case ISD::UREM:                       return "urem";
243   case ISD::SMUL_LOHI:                  return "smul_lohi";
244   case ISD::UMUL_LOHI:                  return "umul_lohi";
245   case ISD::SDIVREM:                    return "sdivrem";
246   case ISD::UDIVREM:                    return "udivrem";
247   case ISD::AND:                        return "and";
248   case ISD::OR:                         return "or";
249   case ISD::XOR:                        return "xor";
250   case ISD::SHL:                        return "shl";
251   case ISD::SRA:                        return "sra";
252   case ISD::SRL:                        return "srl";
253   case ISD::ROTL:                       return "rotl";
254   case ISD::ROTR:                       return "rotr";
255   case ISD::FSHL:                       return "fshl";
256   case ISD::FSHR:                       return "fshr";
257   case ISD::FADD:                       return "fadd";
258   case ISD::STRICT_FADD:                return "strict_fadd";
259   case ISD::FSUB:                       return "fsub";
260   case ISD::STRICT_FSUB:                return "strict_fsub";
261   case ISD::FMUL:                       return "fmul";
262   case ISD::STRICT_FMUL:                return "strict_fmul";
263   case ISD::FDIV:                       return "fdiv";
264   case ISD::STRICT_FDIV:                return "strict_fdiv";
265   case ISD::FMA:                        return "fma";
266   case ISD::STRICT_FMA:                 return "strict_fma";
267   case ISD::FMAD:                       return "fmad";
268   case ISD::FREM:                       return "frem";
269   case ISD::STRICT_FREM:                return "strict_frem";
270   case ISD::FCOPYSIGN:                  return "fcopysign";
271   case ISD::FGETSIGN:                   return "fgetsign";
272   case ISD::FCANONICALIZE:              return "fcanonicalize";
273   case ISD::IS_FPCLASS:                 return "is_fpclass";
274   case ISD::FPOW:                       return "fpow";
275   case ISD::STRICT_FPOW:                return "strict_fpow";
276   case ISD::SMIN:                       return "smin";
277   case ISD::SMAX:                       return "smax";
278   case ISD::UMIN:                       return "umin";
279   case ISD::UMAX:                       return "umax";
280 
281   case ISD::FPOWI:                      return "fpowi";
282   case ISD::STRICT_FPOWI:               return "strict_fpowi";
283   case ISD::SETCC:                      return "setcc";
284   case ISD::SETCCCARRY:                 return "setcccarry";
285   case ISD::STRICT_FSETCC:              return "strict_fsetcc";
286   case ISD::STRICT_FSETCCS:             return "strict_fsetccs";
287   case ISD::SELECT:                     return "select";
288   case ISD::VSELECT:                    return "vselect";
289   case ISD::SELECT_CC:                  return "select_cc";
290   case ISD::INSERT_VECTOR_ELT:          return "insert_vector_elt";
291   case ISD::EXTRACT_VECTOR_ELT:         return "extract_vector_elt";
292   case ISD::CONCAT_VECTORS:             return "concat_vectors";
293   case ISD::INSERT_SUBVECTOR:           return "insert_subvector";
294   case ISD::EXTRACT_SUBVECTOR:          return "extract_subvector";
295   case ISD::SCALAR_TO_VECTOR:           return "scalar_to_vector";
296   case ISD::VECTOR_SHUFFLE:             return "vector_shuffle";
297   case ISD::VECTOR_SPLICE:              return "vector_splice";
298   case ISD::SPLAT_VECTOR:               return "splat_vector";
299   case ISD::SPLAT_VECTOR_PARTS:         return "splat_vector_parts";
300   case ISD::VECTOR_REVERSE:             return "vector_reverse";
301   case ISD::STEP_VECTOR:                return "step_vector";
302   case ISD::CARRY_FALSE:                return "carry_false";
303   case ISD::ADDC:                       return "addc";
304   case ISD::ADDE:                       return "adde";
305   case ISD::ADDCARRY:                   return "addcarry";
306   case ISD::SADDO_CARRY:                return "saddo_carry";
307   case ISD::SADDO:                      return "saddo";
308   case ISD::UADDO:                      return "uaddo";
309   case ISD::SSUBO:                      return "ssubo";
310   case ISD::USUBO:                      return "usubo";
311   case ISD::SMULO:                      return "smulo";
312   case ISD::UMULO:                      return "umulo";
313   case ISD::SUBC:                       return "subc";
314   case ISD::SUBE:                       return "sube";
315   case ISD::SUBCARRY:                   return "subcarry";
316   case ISD::SSUBO_CARRY:                return "ssubo_carry";
317   case ISD::SHL_PARTS:                  return "shl_parts";
318   case ISD::SRA_PARTS:                  return "sra_parts";
319   case ISD::SRL_PARTS:                  return "srl_parts";
320 
321   case ISD::SADDSAT:                    return "saddsat";
322   case ISD::UADDSAT:                    return "uaddsat";
323   case ISD::SSUBSAT:                    return "ssubsat";
324   case ISD::USUBSAT:                    return "usubsat";
325   case ISD::SSHLSAT:                    return "sshlsat";
326   case ISD::USHLSAT:                    return "ushlsat";
327 
328   case ISD::SMULFIX:                    return "smulfix";
329   case ISD::SMULFIXSAT:                 return "smulfixsat";
330   case ISD::UMULFIX:                    return "umulfix";
331   case ISD::UMULFIXSAT:                 return "umulfixsat";
332 
333   case ISD::SDIVFIX:                    return "sdivfix";
334   case ISD::SDIVFIXSAT:                 return "sdivfixsat";
335   case ISD::UDIVFIX:                    return "udivfix";
336   case ISD::UDIVFIXSAT:                 return "udivfixsat";
337 
338   // Conversion operators.
339   case ISD::SIGN_EXTEND:                return "sign_extend";
340   case ISD::ZERO_EXTEND:                return "zero_extend";
341   case ISD::ANY_EXTEND:                 return "any_extend";
342   case ISD::SIGN_EXTEND_INREG:          return "sign_extend_inreg";
343   case ISD::ANY_EXTEND_VECTOR_INREG:    return "any_extend_vector_inreg";
344   case ISD::SIGN_EXTEND_VECTOR_INREG:   return "sign_extend_vector_inreg";
345   case ISD::ZERO_EXTEND_VECTOR_INREG:   return "zero_extend_vector_inreg";
346   case ISD::TRUNCATE:                   return "truncate";
347   case ISD::FP_ROUND:                   return "fp_round";
348   case ISD::STRICT_FP_ROUND:            return "strict_fp_round";
349   case ISD::FP_EXTEND:                  return "fp_extend";
350   case ISD::STRICT_FP_EXTEND:           return "strict_fp_extend";
351 
352   case ISD::SINT_TO_FP:                 return "sint_to_fp";
353   case ISD::STRICT_SINT_TO_FP:          return "strict_sint_to_fp";
354   case ISD::UINT_TO_FP:                 return "uint_to_fp";
355   case ISD::STRICT_UINT_TO_FP:          return "strict_uint_to_fp";
356   case ISD::FP_TO_SINT:                 return "fp_to_sint";
357   case ISD::STRICT_FP_TO_SINT:          return "strict_fp_to_sint";
358   case ISD::FP_TO_UINT:                 return "fp_to_uint";
359   case ISD::STRICT_FP_TO_UINT:          return "strict_fp_to_uint";
360   case ISD::FP_TO_SINT_SAT:             return "fp_to_sint_sat";
361   case ISD::FP_TO_UINT_SAT:             return "fp_to_uint_sat";
362   case ISD::BITCAST:                    return "bitcast";
363   case ISD::ADDRSPACECAST:              return "addrspacecast";
364   case ISD::FP16_TO_FP:                 return "fp16_to_fp";
365   case ISD::STRICT_FP16_TO_FP:          return "strict_fp16_to_fp";
366   case ISD::FP_TO_FP16:                 return "fp_to_fp16";
367   case ISD::STRICT_FP_TO_FP16:          return "strict_fp_to_fp16";
368   case ISD::BF16_TO_FP:                 return "bf16_to_fp";
369   case ISD::FP_TO_BF16:                 return "fp_to_bf16";
370   case ISD::LROUND:                     return "lround";
371   case ISD::STRICT_LROUND:              return "strict_lround";
372   case ISD::LLROUND:                    return "llround";
373   case ISD::STRICT_LLROUND:             return "strict_llround";
374   case ISD::LRINT:                      return "lrint";
375   case ISD::STRICT_LRINT:               return "strict_lrint";
376   case ISD::LLRINT:                     return "llrint";
377   case ISD::STRICT_LLRINT:              return "strict_llrint";
378 
379     // Control flow instructions
380   case ISD::BR:                         return "br";
381   case ISD::BRIND:                      return "brind";
382   case ISD::BR_JT:                      return "br_jt";
383   case ISD::BRCOND:                     return "brcond";
384   case ISD::BR_CC:                      return "br_cc";
385   case ISD::CALLSEQ_START:              return "callseq_start";
386   case ISD::CALLSEQ_END:                return "callseq_end";
387 
388     // EH instructions
389   case ISD::CATCHRET:                   return "catchret";
390   case ISD::CLEANUPRET:                 return "cleanupret";
391 
392     // Other operators
393   case ISD::LOAD:                       return "load";
394   case ISD::STORE:                      return "store";
395   case ISD::MLOAD:                      return "masked_load";
396   case ISD::MSTORE:                     return "masked_store";
397   case ISD::MGATHER:                    return "masked_gather";
398   case ISD::MSCATTER:                   return "masked_scatter";
399   case ISD::VAARG:                      return "vaarg";
400   case ISD::VACOPY:                     return "vacopy";
401   case ISD::VAEND:                      return "vaend";
402   case ISD::VASTART:                    return "vastart";
403   case ISD::DYNAMIC_STACKALLOC:         return "dynamic_stackalloc";
404   case ISD::EXTRACT_ELEMENT:            return "extract_element";
405   case ISD::BUILD_PAIR:                 return "build_pair";
406   case ISD::STACKSAVE:                  return "stacksave";
407   case ISD::STACKRESTORE:               return "stackrestore";
408   case ISD::TRAP:                       return "trap";
409   case ISD::DEBUGTRAP:                  return "debugtrap";
410   case ISD::UBSANTRAP:                  return "ubsantrap";
411   case ISD::LIFETIME_START:             return "lifetime.start";
412   case ISD::LIFETIME_END:               return "lifetime.end";
413   case ISD::PSEUDO_PROBE:
414     return "pseudoprobe";
415   case ISD::GC_TRANSITION_START:        return "gc_transition.start";
416   case ISD::GC_TRANSITION_END:          return "gc_transition.end";
417   case ISD::GET_DYNAMIC_AREA_OFFSET:    return "get.dynamic.area.offset";
418   case ISD::FREEZE:                     return "freeze";
419   case ISD::PREALLOCATED_SETUP:
420     return "call_setup";
421   case ISD::PREALLOCATED_ARG:
422     return "call_alloc";
423 
424   // Floating point environment manipulation
425   case ISD::FLT_ROUNDS_:                return "flt_rounds";
426   case ISD::SET_ROUNDING:               return "set_rounding";
427 
428   // Bit manipulation
429   case ISD::ABS:                        return "abs";
430   case ISD::BITREVERSE:                 return "bitreverse";
431   case ISD::BSWAP:                      return "bswap";
432   case ISD::CTPOP:                      return "ctpop";
433   case ISD::CTTZ:                       return "cttz";
434   case ISD::CTTZ_ZERO_UNDEF:            return "cttz_zero_undef";
435   case ISD::CTLZ:                       return "ctlz";
436   case ISD::CTLZ_ZERO_UNDEF:            return "ctlz_zero_undef";
437   case ISD::PARITY:                     return "parity";
438 
439   // Trampolines
440   case ISD::INIT_TRAMPOLINE:            return "init_trampoline";
441   case ISD::ADJUST_TRAMPOLINE:          return "adjust_trampoline";
442 
443   case ISD::CONDCODE:
444     switch (cast<CondCodeSDNode>(this)->get()) {
445     default: llvm_unreachable("Unknown setcc condition!");
446     case ISD::SETOEQ:                   return "setoeq";
447     case ISD::SETOGT:                   return "setogt";
448     case ISD::SETOGE:                   return "setoge";
449     case ISD::SETOLT:                   return "setolt";
450     case ISD::SETOLE:                   return "setole";
451     case ISD::SETONE:                   return "setone";
452 
453     case ISD::SETO:                     return "seto";
454     case ISD::SETUO:                    return "setuo";
455     case ISD::SETUEQ:                   return "setueq";
456     case ISD::SETUGT:                   return "setugt";
457     case ISD::SETUGE:                   return "setuge";
458     case ISD::SETULT:                   return "setult";
459     case ISD::SETULE:                   return "setule";
460     case ISD::SETUNE:                   return "setune";
461 
462     case ISD::SETEQ:                    return "seteq";
463     case ISD::SETGT:                    return "setgt";
464     case ISD::SETGE:                    return "setge";
465     case ISD::SETLT:                    return "setlt";
466     case ISD::SETLE:                    return "setle";
467     case ISD::SETNE:                    return "setne";
468 
469     case ISD::SETTRUE:                  return "settrue";
470     case ISD::SETTRUE2:                 return "settrue2";
471     case ISD::SETFALSE:                 return "setfalse";
472     case ISD::SETFALSE2:                return "setfalse2";
473     }
474   case ISD::VECREDUCE_FADD:             return "vecreduce_fadd";
475   case ISD::VECREDUCE_SEQ_FADD:         return "vecreduce_seq_fadd";
476   case ISD::VECREDUCE_FMUL:             return "vecreduce_fmul";
477   case ISD::VECREDUCE_SEQ_FMUL:         return "vecreduce_seq_fmul";
478   case ISD::VECREDUCE_ADD:              return "vecreduce_add";
479   case ISD::VECREDUCE_MUL:              return "vecreduce_mul";
480   case ISD::VECREDUCE_AND:              return "vecreduce_and";
481   case ISD::VECREDUCE_OR:               return "vecreduce_or";
482   case ISD::VECREDUCE_XOR:              return "vecreduce_xor";
483   case ISD::VECREDUCE_SMAX:             return "vecreduce_smax";
484   case ISD::VECREDUCE_SMIN:             return "vecreduce_smin";
485   case ISD::VECREDUCE_UMAX:             return "vecreduce_umax";
486   case ISD::VECREDUCE_UMIN:             return "vecreduce_umin";
487   case ISD::VECREDUCE_FMAX:             return "vecreduce_fmax";
488   case ISD::VECREDUCE_FMIN:             return "vecreduce_fmin";
489   case ISD::STACKMAP:
490     return "stackmap";
491   case ISD::PATCHPOINT:
492     return "patchpoint";
493 
494     // Vector Predication
495 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...)                    \
496   case ISD::SDID:                                                              \
497     return #NAME;
498 #include "llvm/IR/VPIntrinsics.def"
499   }
500 }
501 
getIndexedModeName(ISD::MemIndexedMode AM)502 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
503   switch (AM) {
504   default:              return "";
505   case ISD::PRE_INC:    return "<pre-inc>";
506   case ISD::PRE_DEC:    return "<pre-dec>";
507   case ISD::POST_INC:   return "<post-inc>";
508   case ISD::POST_DEC:   return "<post-dec>";
509   }
510 }
511 
PrintNodeId(const SDNode & Node)512 static Printable PrintNodeId(const SDNode &Node) {
513   return Printable([&Node](raw_ostream &OS) {
514 #ifndef NDEBUG
515     OS << 't' << Node.PersistentId;
516 #else
517     OS << (const void*)&Node;
518 #endif
519   });
520 }
521 
522 // Print the MMO with more information from the SelectionDAG.
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const MachineFunction * MF,const Module * M,const MachineFrameInfo * MFI,const TargetInstrInfo * TII,LLVMContext & Ctx)523 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
524                             const MachineFunction *MF, const Module *M,
525                             const MachineFrameInfo *MFI,
526                             const TargetInstrInfo *TII, LLVMContext &Ctx) {
527   ModuleSlotTracker MST(M);
528   if (MF)
529     MST.incorporateFunction(MF->getFunction());
530   SmallVector<StringRef, 0> SSNs;
531   MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
532 }
533 
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const SelectionDAG * G)534 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
535                             const SelectionDAG *G) {
536   if (G) {
537     const MachineFunction *MF = &G->getMachineFunction();
538     return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
539                            &MF->getFrameInfo(),
540                            G->getSubtarget().getInstrInfo(), *G->getContext());
541   }
542 
543   LLVMContext Ctx;
544   return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
545                          /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
546 }
547 
548 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const549 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
550 
dump(const SelectionDAG * G) const551 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
552   print(dbgs(), G);
553   dbgs() << '\n';
554 }
555 #endif
556 
print_types(raw_ostream & OS,const SelectionDAG * G) const557 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
558   for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
559     if (i) OS << ",";
560     if (getValueType(i) == MVT::Other)
561       OS << "ch";
562     else
563       OS << getValueType(i).getEVTString();
564   }
565 }
566 
print_details(raw_ostream & OS,const SelectionDAG * G) const567 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
568   if (getFlags().hasNoUnsignedWrap())
569     OS << " nuw";
570 
571   if (getFlags().hasNoSignedWrap())
572     OS << " nsw";
573 
574   if (getFlags().hasExact())
575     OS << " exact";
576 
577   if (getFlags().hasNoNaNs())
578     OS << " nnan";
579 
580   if (getFlags().hasNoInfs())
581     OS << " ninf";
582 
583   if (getFlags().hasNoSignedZeros())
584     OS << " nsz";
585 
586   if (getFlags().hasAllowReciprocal())
587     OS << " arcp";
588 
589   if (getFlags().hasAllowContract())
590     OS << " contract";
591 
592   if (getFlags().hasApproximateFuncs())
593     OS << " afn";
594 
595   if (getFlags().hasAllowReassociation())
596     OS << " reassoc";
597 
598   if (getFlags().hasNoFPExcept())
599     OS << " nofpexcept";
600 
601   if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
602     if (!MN->memoperands_empty()) {
603       OS << "<";
604       OS << "Mem:";
605       for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
606            e = MN->memoperands_end(); i != e; ++i) {
607         printMemOperand(OS, **i, G);
608         if (std::next(i) != e)
609           OS << " ";
610       }
611       OS << ">";
612     }
613   } else if (const ShuffleVectorSDNode *SVN =
614                dyn_cast<ShuffleVectorSDNode>(this)) {
615     OS << "<";
616     for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
617       int Idx = SVN->getMaskElt(i);
618       if (i) OS << ",";
619       if (Idx < 0)
620         OS << "u";
621       else
622         OS << Idx;
623     }
624     OS << ">";
625   } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
626     OS << '<' << CSDN->getAPIntValue() << '>';
627   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
628     if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
629       OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
630     else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
631       OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
632     else {
633       OS << "<APFloat(";
634       CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
635       OS << ")>";
636     }
637   } else if (const GlobalAddressSDNode *GADN =
638              dyn_cast<GlobalAddressSDNode>(this)) {
639     int64_t offset = GADN->getOffset();
640     OS << '<';
641     GADN->getGlobal()->printAsOperand(OS);
642     OS << '>';
643     if (offset > 0)
644       OS << " + " << offset;
645     else
646       OS << " " << offset;
647     if (unsigned int TF = GADN->getTargetFlags())
648       OS << " [TF=" << TF << ']';
649   } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
650     OS << "<" << FIDN->getIndex() << ">";
651   } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
652     OS << "<" << JTDN->getIndex() << ">";
653     if (unsigned int TF = JTDN->getTargetFlags())
654       OS << " [TF=" << TF << ']';
655   } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
656     int offset = CP->getOffset();
657     if (CP->isMachineConstantPoolEntry())
658       OS << "<" << *CP->getMachineCPVal() << ">";
659     else
660       OS << "<" << *CP->getConstVal() << ">";
661     if (offset > 0)
662       OS << " + " << offset;
663     else
664       OS << " " << offset;
665     if (unsigned int TF = CP->getTargetFlags())
666       OS << " [TF=" << TF << ']';
667   } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
668     OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
669     if (unsigned TF = TI->getTargetFlags())
670       OS << " [TF=" << TF << ']';
671   } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
672     OS << "<";
673     const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
674     if (LBB)
675       OS << LBB->getName() << " ";
676     OS << (const void*)BBDN->getBasicBlock() << ">";
677   } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
678     OS << ' ' << printReg(R->getReg(),
679                           G ? G->getSubtarget().getRegisterInfo() : nullptr);
680   } else if (const ExternalSymbolSDNode *ES =
681              dyn_cast<ExternalSymbolSDNode>(this)) {
682     OS << "'" << ES->getSymbol() << "'";
683     if (unsigned int TF = ES->getTargetFlags())
684       OS << " [TF=" << TF << ']';
685   } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
686     if (M->getValue())
687       OS << "<" << M->getValue() << ">";
688     else
689       OS << "<null>";
690   } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
691     if (MD->getMD())
692       OS << "<" << MD->getMD() << ">";
693     else
694       OS << "<null>";
695   } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
696     OS << ":" << N->getVT().getEVTString();
697   }
698   else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
699     OS << "<";
700 
701     printMemOperand(OS, *LD->getMemOperand(), G);
702 
703     bool doExt = true;
704     switch (LD->getExtensionType()) {
705     default: doExt = false; break;
706     case ISD::EXTLOAD:  OS << ", anyext"; break;
707     case ISD::SEXTLOAD: OS << ", sext"; break;
708     case ISD::ZEXTLOAD: OS << ", zext"; break;
709     }
710     if (doExt)
711       OS << " from " << LD->getMemoryVT().getEVTString();
712 
713     const char *AM = getIndexedModeName(LD->getAddressingMode());
714     if (*AM)
715       OS << ", " << AM;
716 
717     OS << ">";
718   } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
719     OS << "<";
720     printMemOperand(OS, *ST->getMemOperand(), G);
721 
722     if (ST->isTruncatingStore())
723       OS << ", trunc to " << ST->getMemoryVT().getEVTString();
724 
725     const char *AM = getIndexedModeName(ST->getAddressingMode());
726     if (*AM)
727       OS << ", " << AM;
728 
729     OS << ">";
730   } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
731     OS << "<";
732 
733     printMemOperand(OS, *MLd->getMemOperand(), G);
734 
735     bool doExt = true;
736     switch (MLd->getExtensionType()) {
737     default: doExt = false; break;
738     case ISD::EXTLOAD:  OS << ", anyext"; break;
739     case ISD::SEXTLOAD: OS << ", sext"; break;
740     case ISD::ZEXTLOAD: OS << ", zext"; break;
741     }
742     if (doExt)
743       OS << " from " << MLd->getMemoryVT().getEVTString();
744 
745     const char *AM = getIndexedModeName(MLd->getAddressingMode());
746     if (*AM)
747       OS << ", " << AM;
748 
749     if (MLd->isExpandingLoad())
750       OS << ", expanding";
751 
752     OS << ">";
753   } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
754     OS << "<";
755     printMemOperand(OS, *MSt->getMemOperand(), G);
756 
757     if (MSt->isTruncatingStore())
758       OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
759 
760     const char *AM = getIndexedModeName(MSt->getAddressingMode());
761     if (*AM)
762       OS << ", " << AM;
763 
764     if (MSt->isCompressingStore())
765       OS << ", compressing";
766 
767     OS << ">";
768   } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
769     OS << "<";
770     printMemOperand(OS, *MGather->getMemOperand(), G);
771 
772     bool doExt = true;
773     switch (MGather->getExtensionType()) {
774     default: doExt = false; break;
775     case ISD::EXTLOAD:  OS << ", anyext"; break;
776     case ISD::SEXTLOAD: OS << ", sext"; break;
777     case ISD::ZEXTLOAD: OS << ", zext"; break;
778     }
779     if (doExt)
780       OS << " from " << MGather->getMemoryVT().getEVTString();
781 
782     auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
783     auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
784     OS << ", " << Signed << " " << Scaled << " offset";
785 
786     OS << ">";
787   } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
788     OS << "<";
789     printMemOperand(OS, *MScatter->getMemOperand(), G);
790 
791     if (MScatter->isTruncatingStore())
792       OS << ", trunc to " << MScatter->getMemoryVT().getEVTString();
793 
794     auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
795     auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
796     OS << ", " << Signed << " " << Scaled << " offset";
797 
798     OS << ">";
799   } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
800     OS << "<";
801     printMemOperand(OS, *M->getMemOperand(), G);
802     OS << ">";
803   } else if (const BlockAddressSDNode *BA =
804                dyn_cast<BlockAddressSDNode>(this)) {
805     int64_t offset = BA->getOffset();
806     OS << "<";
807     BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
808     OS << ", ";
809     BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
810     OS << ">";
811     if (offset > 0)
812       OS << " + " << offset;
813     else
814       OS << " " << offset;
815     if (unsigned int TF = BA->getTargetFlags())
816       OS << " [TF=" << TF << ']';
817   } else if (const AddrSpaceCastSDNode *ASC =
818                dyn_cast<AddrSpaceCastSDNode>(this)) {
819     OS << '['
820        << ASC->getSrcAddressSpace()
821        << " -> "
822        << ASC->getDestAddressSpace()
823        << ']';
824   } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
825     if (LN->hasOffset())
826       OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
827   } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
828     OS << '<' << AA->getAlign().value() << '>';
829   }
830 
831   if (VerboseDAGDumping) {
832     if (unsigned Order = getIROrder())
833         OS << " [ORD=" << Order << ']';
834 
835     if (getNodeId() != -1)
836       OS << " [ID=" << getNodeId() << ']';
837     if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
838       OS << " # D:" << isDivergent();
839 
840     if (G && !G->GetDbgValues(this).empty()) {
841       OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
842       for (SDDbgValue *Dbg : G->GetDbgValues(this))
843         if (!Dbg->isInvalidated())
844           Dbg->print(OS);
845     } else if (getHasDebugValue())
846       OS << " [NoOfDbgValues>0]";
847   }
848 }
849 
print(raw_ostream & OS) const850 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
851   OS << " DbgVal(Order=" << getOrder() << ')';
852   if (isInvalidated())
853     OS << "(Invalidated)";
854   if (isEmitted())
855     OS << "(Emitted)";
856   OS << "(";
857   bool Comma = false;
858   for (const SDDbgOperand &Op : getLocationOps()) {
859     if (Comma)
860       OS << ", ";
861     switch (Op.getKind()) {
862     case SDDbgOperand::SDNODE:
863       if (Op.getSDNode())
864         OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
865       else
866         OS << "SDNODE";
867       break;
868     case SDDbgOperand::CONST:
869       OS << "CONST";
870       break;
871     case SDDbgOperand::FRAMEIX:
872       OS << "FRAMEIX=" << Op.getFrameIx();
873       break;
874     case SDDbgOperand::VREG:
875       OS << "VREG=" << Op.getVReg();
876       break;
877     }
878     Comma = true;
879   }
880   OS << ")";
881   if (isIndirect()) OS << "(Indirect)";
882   if (isVariadic())
883     OS << "(Variadic)";
884   OS << ":\"" << Var->getName() << '"';
885 #ifndef NDEBUG
886   if (Expr->getNumElements())
887     Expr->dump();
888 #endif
889 }
890 
891 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const892 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
893   if (isInvalidated())
894     return;
895   print(dbgs());
896   dbgs() << "\n";
897 }
898 #endif
899 
900 /// Return true if this node is so simple that we should just print it inline
901 /// if it appears as an operand.
shouldPrintInline(const SDNode & Node,const SelectionDAG * G)902 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
903   // Avoid lots of cluttering when inline printing nodes with associated
904   // DbgValues in verbose mode.
905   if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
906     return false;
907   if (Node.getOpcode() == ISD::EntryToken)
908     return false;
909   return Node.getNumOperands() == 0;
910 }
911 
912 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
DumpNodes(const SDNode * N,unsigned indent,const SelectionDAG * G)913 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
914   for (const SDValue &Op : N->op_values()) {
915     if (shouldPrintInline(*Op.getNode(), G))
916       continue;
917     if (Op.getNode()->hasOneUse())
918       DumpNodes(Op.getNode(), indent+2, G);
919   }
920 
921   dbgs().indent(indent);
922   N->dump(G);
923 }
924 
dump() const925 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
926   dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
927 
928   for (const SDNode &N : allnodes()) {
929     if (!N.hasOneUse() && &N != getRoot().getNode() &&
930         (!shouldPrintInline(N, this) || N.use_empty()))
931       DumpNodes(&N, 2, this);
932   }
933 
934   if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
935   dbgs() << "\n";
936 
937   if (VerboseDAGDumping) {
938     if (DbgBegin() != DbgEnd())
939       dbgs() << "SDDbgValues:\n";
940     for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
941       Dbg->dump();
942     if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
943       dbgs() << "Byval SDDbgValues:\n";
944     for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
945       Dbg->dump();
946   }
947   dbgs() << "\n";
948 }
949 #endif
950 
printr(raw_ostream & OS,const SelectionDAG * G) const951 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
952   OS << PrintNodeId(*this) << ": ";
953   print_types(OS, G);
954   OS << " = " << getOperationName(G);
955   print_details(OS, G);
956 }
957 
printOperand(raw_ostream & OS,const SelectionDAG * G,const SDValue Value)958 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
959                          const SDValue Value) {
960   if (!Value.getNode()) {
961     OS << "<null>";
962     return false;
963   }
964 
965   if (shouldPrintInline(*Value.getNode(), G)) {
966     OS << Value->getOperationName(G) << ':';
967     Value->print_types(OS, G);
968     Value->print_details(OS, G);
969     return true;
970   }
971 
972   OS << PrintNodeId(*Value.getNode());
973   if (unsigned RN = Value.getResNo())
974     OS << ':' << RN;
975   return false;
976 }
977 
978 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
979 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
980 
DumpNodesr(raw_ostream & OS,const SDNode * N,unsigned indent,const SelectionDAG * G,VisitedSDNodeSet & once)981 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
982                        const SelectionDAG *G, VisitedSDNodeSet &once) {
983   if (!once.insert(N).second) // If we've been here before, return now.
984     return;
985 
986   // Dump the current SDNode, but don't end the line yet.
987   OS.indent(indent);
988   N->printr(OS, G);
989 
990   // Having printed this SDNode, walk the children:
991   for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
992     if (i) OS << ",";
993     OS << " ";
994 
995     const SDValue Op = N->getOperand(i);
996     bool printedInline = printOperand(OS, G, Op);
997     if (printedInline)
998       once.insert(Op.getNode());
999   }
1000 
1001   OS << "\n";
1002 
1003   // Dump children that have grandchildren on their own line(s).
1004   for (const SDValue &Op : N->op_values())
1005     DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1006 }
1007 
dumpr() const1008 LLVM_DUMP_METHOD void SDNode::dumpr() const {
1009   VisitedSDNodeSet once;
1010   DumpNodesr(dbgs(), this, 0, nullptr, once);
1011 }
1012 
dumpr(const SelectionDAG * G) const1013 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1014   VisitedSDNodeSet once;
1015   DumpNodesr(dbgs(), this, 0, G, once);
1016 }
1017 #endif
1018 
printrWithDepthHelper(raw_ostream & OS,const SDNode * N,const SelectionDAG * G,unsigned depth,unsigned indent)1019 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1020                                   const SelectionDAG *G, unsigned depth,
1021                                   unsigned indent) {
1022   if (depth == 0)
1023     return;
1024 
1025   OS.indent(indent);
1026 
1027   N->print(OS, G);
1028 
1029   for (const SDValue &Op : N->op_values()) {
1030     // Don't follow chain operands.
1031     if (Op.getValueType() == MVT::Other)
1032       continue;
1033     OS << '\n';
1034     printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1035   }
1036 }
1037 
printrWithDepth(raw_ostream & OS,const SelectionDAG * G,unsigned depth) const1038 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1039                             unsigned depth) const {
1040   printrWithDepthHelper(OS, this, G, depth, 0);
1041 }
1042 
printrFull(raw_ostream & OS,const SelectionDAG * G) const1043 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1044   // Don't print impossibly deep things.
1045   printrWithDepth(OS, G, 10);
1046 }
1047 
1048 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1049 LLVM_DUMP_METHOD
dumprWithDepth(const SelectionDAG * G,unsigned depth) const1050 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1051   printrWithDepth(dbgs(), G, depth);
1052 }
1053 
dumprFull(const SelectionDAG * G) const1054 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1055   // Don't print impossibly deep things.
1056   dumprWithDepth(G, 10);
1057 }
1058 #endif
1059 
print(raw_ostream & OS,const SelectionDAG * G) const1060 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1061   printr(OS, G);
1062   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1063     if (i) OS << ", "; else OS << " ";
1064     printOperand(OS, G, getOperand(i));
1065   }
1066   if (DebugLoc DL = getDebugLoc()) {
1067     OS << ", ";
1068     DL.print(OS);
1069   }
1070 }
1071