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Searched refs:RegisterMaskPair (Results 1 – 20 of 20) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h38 struct RegisterMaskPair { struct
52 SmallVector<RegisterMaskPair,8> LiveInRegs;
53 SmallVector<RegisterMaskPair,8> LiveOutRegs;
169 SmallVector<RegisterMaskPair, 8> Uses;
172 SmallVector<RegisterMaskPair, 8> Defs;
175 SmallVector<RegisterMaskPair, 8> DeadDefs;
304 LaneBitmask insert(RegisterMaskPair Pair) { in insert()
317 LaneBitmask erase(RegisterMaskPair Pair) { in erase()
542 void discoverLiveOut(RegisterMaskPair Pair);
544 void discoverLiveIn(RegisterMaskPair Pair);
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H A DMachineBasicBlock.h100 struct RegisterMaskPair {
105 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
132 using LiveInVector = std::vector<RegisterMaskPair>;
379 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
381 void addLiveIn(const RegisterMaskPair &RegMaskPair) {
433 using value_type = RegisterMaskPair;
434 using pointer = const RegisterMaskPair *;
435 using reference = const RegisterMaskPair &;
H A DMachineScheduler.h513 void updatePressureDiffs(ArrayRef<RegisterMaskPair> LiveUses);
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DRegisterPressure.cpp99 for (const RegisterMaskPair &P : LiveInRegs) { in dump()
107 for (const RegisterMaskPair &P : LiveOutRegs) { in dump()
382 RegisterMaskPair Pair) { in addRegLanes()
408 RegisterMaskPair Pair) { in removeRegLanes()
485 for (const RegisterMaskPair &P : RegOpers.Defs) in collectInstr()
635 for (const RegisterMaskPair &P : DeadDefs) { in adjustLaneLiveness()
664 for (const RegisterMaskPair &P : RegOpers.Defs) in addInstruction()
667 for (const RegisterMaskPair &P : RegOpers.Uses) in addInstruction()
708 for (const RegisterMaskPair &P : Regs) { in addLiveRegs()
746 for (const RegisterMaskPair &P : DeadDefs) { in bumpDeadDefs()
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H A DMachineBasicBlock.cpp560 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in removeLiveIn()
578 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; }); in isLiveIn()
584 [](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) { in sortUniqueLiveIns()
1512 for (const MachineBasicBlock::RegisterMaskPair &LI : S->liveins()) { in computeRegisterLiveness()
1571 for (const MachineBasicBlock::RegisterMaskPair &LI : liveins()) in computeRegisterLiveness()
H A DBranchRelaxation.cpp454 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) in fixupUnconditionalBranch()
H A DMachineScheduler.cpp1050 SmallVector<RegisterMaskPair, 8> LiveUses; in initRegPressure()
1115 ArrayRef<RegisterMaskPair> LiveUses) { in updatePressureDiffs()
1116 for (const RegisterMaskPair &P : LiveUses) { in updatePressureDiffs()
1341 for (const RegisterMaskPair &P : RPTracker.getPressure().LiveOutRegs) { in computeCyclicCriticalPath()
1467 SmallVector<RegisterMaskPair, 8> LiveUses; in scheduleMI()
H A DRDFLiveness.cpp867 for (const MachineBasicBlock::RegisterMaskPair &LI : B.liveins()) in computeLiveIns()
894 for (const MachineBasicBlock::RegisterMaskPair &LI : B.liveins()) in resetLiveIns()
H A DMachinePipeliner.cpp1599 SmallVector<RegisterMaskPair, 8> LiveOutRegs; in computeLiveOuts()
1622 LiveOutRegs.push_back(RegisterMaskPair(Reg, in computeLiveOuts()
1628 LiveOutRegs.push_back(RegisterMaskPair(*Units, in computeLiveOuts()
H A DRegAllocFast.cpp528 for (MachineBasicBlock::RegisterMaskPair P : MBB.liveins()) { in reloadAtBegin()
H A DBranchFolding.cpp375 for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) { in replaceTailWithBranchTo()
H A DMachineVerifier.cpp2780 for (MachineBasicBlock::RegisterMaskPair P : MBB.liveins()) { in visitMachineFunctionAfter()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp220 std::vector<MachineBasicBlock::RegisterMaskPair> OrigLiveIn( in runOnMachineFunction()
222 std::vector<MachineBasicBlock::RegisterMaskPair> NewLiveIn( in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp218 static SmallVector<RegisterMaskPair, 8>
221 SmallVector<RegisterMaskPair, 8> Res; in collectVirtualRegUses()
232 Res, [Reg](const RegisterMaskPair &RM) { return RM.RegUnit == Reg; }); in collectVirtualRegUses()
236 Res.push_back(RegisterMaskPair(Reg, UsedMask)); in collectVirtualRegUses()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/
H A DSnippetRepetitorTest.cpp65 return Field(&MachineBasicBlock::RegisterMaskPair::PhysReg, Eq(Reg)); in __anon0f0167460302()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kFrameLowering.cpp178 [Reg](MachineBasicBlock::RegisterMaskPair RegMask) { in isRegLiveIn()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMLowOverheadLoops.cpp1032 for (const MachineBasicBlock::RegisterMaskPair &RegMask : ExitBB->liveins()) { in ValidateLiveOuts()
H A DARMConstantIslandPass.cpp2519 for (const MachineBasicBlock::RegisterMaskPair &RegMaskPair : BB->liveins()) in adjustJTTargetBlockForward()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp166 for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) { in isEAXLiveIn()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp3561 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : EntryBB->liveins()) in runOnMachineFunction()