| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 193 Known = LHSKnown & RHSKnown; in SimplifyDemandedUseBits()
222 Known = LHSKnown | RHSKnown; in SimplifyDemandedUseBits()
260 Known = LHSKnown ^ RHSKnown; in SimplifyDemandedUseBits()
269 if (DemandedMask.isSubsetOf(RHSKnown.Zero)) in SimplifyDemandedUseBits()
288 if (DemandedMask.isSubsetOf(RHSKnown.Zero|RHSKnown.One) && in SimplifyDemandedUseBits()
289 RHSKnown.One.isSubsetOf(LHSKnown.One)) { in SimplifyDemandedUseBits()
957 KnownBits RHSKnown(BitWidth); in SimplifyMultipleUseDemandedBits() local
970 Known = LHSKnown & RHSKnown; in SimplifyMultipleUseDemandedBits()
996 Known = LHSKnown | RHSKnown; in SimplifyMultipleUseDemandedBits()
1021 Known = LHSKnown ^ RHSKnown; in SimplifyMultipleUseDemandedBits()
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| H A D | InstCombineAddSub.cpp | 1973 KnownBits RHSKnown = computeKnownBits(Op1, 0, &I); in visitSub() local
1974 if ((*Op0C | RHSKnown.Zero).isAllOnes()) in visitSub()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelKnownBits.cpp | 419 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local
422 computeKnownBitsImpl(MI.getOperand(2).getReg(), RHSKnown, DemandedElts, in computeKnownBitsImpl()
424 Known = KnownBits::ashr(LHSKnown, RHSKnown); in computeKnownBitsImpl()
428 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local
431 computeKnownBitsImpl(MI.getOperand(2).getReg(), RHSKnown, DemandedElts, in computeKnownBitsImpl()
433 Known = KnownBits::lshr(LHSKnown, RHSKnown); in computeKnownBitsImpl()
437 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local
440 computeKnownBitsImpl(MI.getOperand(2).getReg(), RHSKnown, DemandedElts, in computeKnownBitsImpl()
442 Known = KnownBits::shl(LHSKnown, RHSKnown); in computeKnownBitsImpl()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 754 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
762 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
775 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
788 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
801 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
814 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
830 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
846 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
859 KnownBits RHSKnown = in computeKnownBitsFromAssume() local
909 if (RHSKnown.isAllOnes() || RHSKnown.isNonNegative()) { in computeKnownBitsFromAssume()
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| H A D | InstructionSimplify.cpp | 3030 KnownBits RHSKnown = computeKnownBits(RHS, Q.DL, 0, Q.AC, Q.CxtI, Q.DT); in simplifyICmpWithBinOpOnLHS() local
3032 if (RHSKnown.isNonNegative() && YKnown.isNegative()) in simplifyICmpWithBinOpOnLHS()
3034 if (RHSKnown.isNegative() || YKnown.isNonNegative()) in simplifyICmpWithBinOpOnLHS()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4512 KnownBits RHSKnown = DAG.computeKnownBits(Op.getOperand(1), Depth + 1); in computeKnownBitsForTargetNode() local
4514 RHSKnown.countMinTrailingZeros(); in computeKnownBitsForTargetNode()
4522 RHSKnown = RHSKnown.trunc(24); in computeKnownBitsForTargetNode()
4526 unsigned RHSValBits = RHSKnown.countMaxSignificantBits(); in computeKnownBitsForTargetNode()
4534 bool RHSNegative = RHSKnown.isNegative(); in computeKnownBitsForTargetNode()
4535 bool RHSNonNegative = RHSKnown.isNonNegative(); in computeKnownBitsForTargetNode()
4536 bool RHSPositive = RHSKnown.isStrictlyPositive(); in computeKnownBitsForTargetNode()
4544 unsigned RHSValBits = RHSKnown.countMaxActiveBits(); in computeKnownBitsForTargetNode()
4558 KnownBits RHSKnown = DAG.computeKnownBits(Op.getOperand(1), Depth + 1); in computeKnownBitsForTargetNode() local
4565 Known.One |= ((RHSKnown.One.getZExtValue() >> SelBits) & 0xff) << I; in computeKnownBitsForTargetNode()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 680 KnownBits LHSKnown, RHSKnown; in SimplifyMultipleUseDemandedBits() local
740 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
745 if (DemandedBits.isSubsetOf(LHSKnown.Zero | RHSKnown.One)) in SimplifyMultipleUseDemandedBits()
747 if (DemandedBits.isSubsetOf(RHSKnown.Zero | LHSKnown.One)) in SimplifyMultipleUseDemandedBits()
753 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
758 if (DemandedBits.isSubsetOf(LHSKnown.One | RHSKnown.Zero)) in SimplifyMultipleUseDemandedBits()
760 if (DemandedBits.isSubsetOf(RHSKnown.One | LHSKnown.Zero)) in SimplifyMultipleUseDemandedBits()
766 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
770 if (DemandedBits.isSubsetOf(RHSKnown.Zero)) in SimplifyMultipleUseDemandedBits()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2598 KnownBits RHSKnown = DAG.computeKnownBits(N.getOperand(1)); in provablyDisjointOr() local
2599 return (~(LHSKnown.Zero | RHSKnown.Zero) == 0); in provablyDisjointOr()
2673 KnownBits RHSKnown = DAG.computeKnownBits(N.getOperand(1)); in SelectAddressRegReg() local
2676 if (~(LHSKnown.Zero | RHSKnown.Zero) == 0) { in SelectAddressRegReg()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7266 KnownBits RHSKnown = in computeKnownBitsBinOp() local
7268 Known = KnownBits::commonBits(LHSKnown, RHSKnown); in computeKnownBitsBinOp()
|