| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 193 Known = LHSKnown & RHSKnown; in SimplifyDemandedUseBits() 222 Known = LHSKnown | RHSKnown; in SimplifyDemandedUseBits() 260 Known = LHSKnown ^ RHSKnown; in SimplifyDemandedUseBits() 788 Known.One = LHSKnown.One & LowBits; in SimplifyDemandedUseBits() 792 if (LHSKnown.isNonNegative() || LowBits.isSubsetOf(LHSKnown.Zero)) in SimplifyDemandedUseBits() 797 if (LHSKnown.isNegative() && LowBits.intersects(LHSKnown.One)) in SimplifyDemandedUseBits() 810 if (LHSKnown.isNonNegative()) in SimplifyDemandedUseBits() 956 KnownBits LHSKnown(BitWidth); in SimplifyMultipleUseDemandedBits() local 970 Known = LHSKnown & RHSKnown; in SimplifyMultipleUseDemandedBits() 996 Known = LHSKnown | RHSKnown; in SimplifyMultipleUseDemandedBits() [all …]
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| H A D | InstCombineAddSub.cpp | 927 KnownBits LHSKnown = computeKnownBits(X, 0, &Add); in foldAddWithConstant() local 928 if ((*C2 | LHSKnown.Zero).isAllOnes()) in foldAddWithConstant()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelKnownBits.cpp | 419 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local 420 computeKnownBitsImpl(MI.getOperand(1).getReg(), LHSKnown, DemandedElts, in computeKnownBitsImpl() 424 Known = KnownBits::ashr(LHSKnown, RHSKnown); in computeKnownBitsImpl() 428 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local 429 computeKnownBitsImpl(MI.getOperand(1).getReg(), LHSKnown, DemandedElts, in computeKnownBitsImpl() 433 Known = KnownBits::lshr(LHSKnown, RHSKnown); in computeKnownBitsImpl() 437 KnownBits LHSKnown, RHSKnown; in computeKnownBitsImpl() local 438 computeKnownBitsImpl(MI.getOperand(1).getReg(), LHSKnown, DemandedElts, in computeKnownBitsImpl() 442 Known = KnownBits::shl(LHSKnown, RHSKnown); in computeKnownBitsImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4511 KnownBits LHSKnown = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); in computeKnownBitsForTargetNode() local 4513 unsigned TrailZ = LHSKnown.countMinTrailingZeros() + in computeKnownBitsForTargetNode() 4521 LHSKnown = LHSKnown.trunc(24); in computeKnownBitsForTargetNode() 4525 unsigned LHSValBits = LHSKnown.countMaxSignificantBits(); in computeKnownBitsForTargetNode() 4531 bool LHSNegative = LHSKnown.isNegative(); in computeKnownBitsForTargetNode() 4532 bool LHSNonNegative = LHSKnown.isNonNegative(); in computeKnownBitsForTargetNode() 4533 bool LHSPositive = LHSKnown.isStrictlyPositive(); in computeKnownBitsForTargetNode() 4543 unsigned LHSValBits = LHSKnown.countMaxActiveBits(); in computeKnownBitsForTargetNode() 4557 KnownBits LHSKnown = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); in computeKnownBitsForTargetNode() local 4569 Known.One |= ((LHSKnown.One.getZExtValue() >> SelBits) & 0xff) << I; in computeKnownBitsForTargetNode() [all …]
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 2928 KnownBits LHSKnown = computeKnownBits(LHS, Q.DL, 0, Q.AC, Q.CxtI, Q.DT); in simplifyICmpWithZero() local 2929 if (LHSKnown.isNegative()) in simplifyICmpWithZero() 2931 if (LHSKnown.isNonNegative()) in simplifyICmpWithZero() 2936 KnownBits LHSKnown = computeKnownBits(LHS, Q.DL, 0, Q.AC, Q.CxtI, Q.DT); in simplifyICmpWithZero() local 2937 if (LHSKnown.isNegative()) in simplifyICmpWithZero() 2939 if (LHSKnown.isNonNegative() && in simplifyICmpWithZero() 2945 KnownBits LHSKnown = computeKnownBits(LHS, Q.DL, 0, Q.AC, Q.CxtI, Q.DT); in simplifyICmpWithZero() local 2946 if (LHSKnown.isNegative()) in simplifyICmpWithZero() 2948 if (LHSKnown.isNonNegative()) in simplifyICmpWithZero() 2954 if (LHSKnown.isNegative()) in simplifyICmpWithZero() [all …]
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| H A D | ValueTracking.cpp | 310 KnownBits LHSKnown(IT->getBitWidth()); in haveNoCommonBitsSet() local 312 computeKnownBits(LHS, LHSKnown, DL, 0, AC, CxtI, DT, nullptr, UseInstrInfo); in haveNoCommonBitsSet() 314 return KnownBits::haveNoCommonBitsSet(LHSKnown, RHSKnown); in haveNoCommonBitsSet() 4848 KnownBits LHSKnown = computeKnownBits(LHS, DL, /*Depth=*/0, AC, CxtI, DT, in computeOverflowForUnsignedMul() local 4852 ConstantRange LHSRange = ConstantRange::fromKnownBits(LHSKnown, false); in computeOverflowForUnsignedMul() 4890 KnownBits LHSKnown = computeKnownBits(LHS, DL, /*Depth=*/0, AC, CxtI, DT, in computeOverflowForSignedMul() local 4894 if (LHSKnown.isNonNegative() || RHSKnown.isNonNegative()) in computeOverflowForSignedMul()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 680 KnownBits LHSKnown, RHSKnown; in SimplifyMultipleUseDemandedBits() local 739 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits() 745 if (DemandedBits.isSubsetOf(LHSKnown.Zero | RHSKnown.One)) in SimplifyMultipleUseDemandedBits() 747 if (DemandedBits.isSubsetOf(RHSKnown.Zero | LHSKnown.One)) in SimplifyMultipleUseDemandedBits() 758 if (DemandedBits.isSubsetOf(LHSKnown.One | RHSKnown.Zero)) in SimplifyMultipleUseDemandedBits() 760 if (DemandedBits.isSubsetOf(RHSKnown.One | LHSKnown.Zero)) in SimplifyMultipleUseDemandedBits() 772 if (DemandedBits.isSubsetOf(LHSKnown.Zero)) in SimplifyMultipleUseDemandedBits() 1355 KnownBits LHSKnown = TLO.DAG.computeKnownBits(Op0, DemandedElts, Depth); in SimplifyDemandedBits() local 1357 if ((LHSKnown.Zero & DemandedBits) == in SimplifyDemandedBits() 1363 if (ShrinkDemandedConstant(Op, ~LHSKnown.Zero & DemandedBits, in SimplifyDemandedBits() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2595 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0)); in provablyDisjointOr() local 2596 if (!LHSKnown.Zero.getBoolValue()) in provablyDisjointOr() 2599 return (~(LHSKnown.Zero | RHSKnown.Zero) == 0); in provablyDisjointOr() 2670 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0)); in SelectAddressRegReg() local 2672 if (LHSKnown.Zero.getBoolValue()) { in SelectAddressRegReg() 2676 if (~(LHSKnown.Zero | RHSKnown.Zero) == 0) { in SelectAddressRegReg() 2776 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0)); in SelectAddressRegImm() local 2778 if ((LHSKnown.Zero.getZExtValue()|~(uint64_t)imm) == ~0ULL) { in SelectAddressRegImm() 2862 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0)); in SelectAddressRegImm34() local 2863 if ((LHSKnown.Zero.getZExtValue() | ~(uint64_t)Imm) != ~0ULL) in SelectAddressRegImm34()
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| H A D | PPCISelDAGToDAG.cpp | 5377 KnownBits LHSKnown = CurDAG->computeKnownBits(N->getOperand(0)); in Select() local 5381 if ((LHSKnown.Zero.getZExtValue()|~(uint64_t)Imm) == ~0ULL) { in Select()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7264 KnownBits LHSKnown = in computeKnownBitsBinOp() local 7268 Known = KnownBits::commonBits(LHSKnown, RHSKnown); in computeKnownBitsBinOp()
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