| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | aix-lower-constant-pool-index.ll | 35 ; 32SMALL-MIR: renamable $f[[REG2:[0-9]+]] = LFS 0, killed renamable $r[[REG1]] :: (load (s32) from… 39 ; 32LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $r[[REG2]] :: (load (s32) from… 42 ; 64SMALL-MIR: renamable $f[[REG2:[0-9]+]] = LFS 0, killed renamable $x[[REG1]] :: (load (s32) from… 46 ; 64LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $x[[REG2]] :: (load (s32) from…
|
| H A D | aix32-vector-vararg-caller-split.ll | 21 ; CHECK: [[FLOAT1:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT1ADDR]] :: (load (s32) from constant-po… 24 ; CHECK: [[FLOAT2:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT2ADDR]] :: (load (s32) from constant-po…
|
| H A D | toc-data.ll | 81 ; CHECK32: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f) 89 ; CHECK64: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]] :: (dereferenceable load (s32) from @f) 93 ; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]]
|
| H A D | aix-cc-abi.ll | 409 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r3 :: (dereferenceable load (s32) from @f1) 417 ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x3 :: (dereferenceable load (s32) from @f1) 603 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG1]] :: (dereferenceable load (s32) fro… 704 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from… 736 ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from… 773 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from… 805 ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from… 844 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from… 878 ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG]] :: (dereferenceable load (s32) from… 915 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG]] :: (dereferenceable load (s32) from… [all …]
|
| H A D | aix-cc-byval.ll | 126 ; 32BIT-NEXT: renamable $f1 = LFS 0, killed renamable $r[[REG1]] :: (dereferenceable load (s32) fr… 155 ; 64BIT-NEXT: renamable $f1 = LFS 0, killed renamable $x[[REG1]] :: (dereferenceable load (s32) fr…
|
| H A D | convert-rr-to-ri-instrs.mir | 3119 %8 = LFS 4, %4 :: (load (s32) from %ir.3, !tbaa !14) 3124 %13 = LFS 8, %4 :: (load (s32) from %ir.5, !tbaa !14) 3129 %18 = LFS 12, %4 :: (load (s32) from %ir.7, !tbaa !14) 3203 ; CHECK: LFS 88, %0 3210 ; CHECK: LFS -88, %0
|
| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 11 PCREL_OPT(LFS, PLFS, OPC_AND_RST);
|
| H A D | PPC64.cpp | 76 LFS = 0xC0000000, enumerator
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MLRegallocEvictAdvisor.cpp | 464 std::vector<LoggedFeatureSpec> LFS; in getAdvisor() local 466 LFS.push_back({FS, None}); in getAdvisor() 469 append_range(LFS, drop_begin(MUTR->outputLoggedFeatureSpecs())); in getAdvisor() 473 LFS.push_back({Output, None}); in getAdvisor() 476 std::make_unique<Logger>(LFS, Reward, /*IncludeReward*/ true))); in getAdvisor()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 138 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \ 146 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \ 154 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
|
| H A D | PPCFastISel.cpp | 497 Opc = Subtarget->hasSPE() ? PPC::SPELWZ : PPC::LFS; in PPCEmitLoad() 513 bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS; in PPCEmitLoad() 566 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad() 2019 Opc = ((VT == MVT::f32) ? PPC::LFS : PPC::LFD); in PPCMaterializeFP()
|
| H A D | PPCPreEmitPeephole.cpp | 84 case PPC::LFS: in hasPCRelativeForm()
|
| H A D | PPCInstrInfo.cpp | 2942 LowerOpcode = PPC::LFS; in expandVSXMemPseudo() 4149 case PPC::LFSX: III.ImmOpcode = PPC::LFS; break; in instrHasImmForm() 4257 III.ImmOpcode = PPC::LFS; in instrHasImmForm()
|
| H A D | PPCRegisterInfo.cpp | 107 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
|
| H A D | P10InstrResources.td | 1432 LFS,
|
| H A D | P9InstrResources.td | 852 LFS
|
| H A D | PPCInstrInfo.td | 1807 def LFS : DForm_1<48, (outs f4rc:$rD), (ins memri:$src), 3204 (COPY_TO_REGCLASS (LFS DForm:$src), F8RC)>;
|
| H A D | PPCISelDAGToDAG.cpp | 7313 case PPC::LFS: in PeepholePPC64()
|
| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | TFUtils.cpp | 222 const auto &LFS = LoggedFeatureSpecs[I]; in transferLog() local 223 (*FL)[LFS.getLoggingName()] = std::move(FeatureLists[I]); in transferLog()
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1521 unsigned LFS = MFI.getLocalFrameSize(); in processFunctionBeforeFrameFinalized() local 1530 LFS = alignTo(LFS+S, A); in processFunctionBeforeFrameFinalized() 1531 MFI.mapLocalFrameObject(i, -static_cast<int64_t>(LFS)); in processFunctionBeforeFrameFinalized() 1535 MFI.setLocalFrameSize(LFS); in processFunctionBeforeFrameFinalized()
|