| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 579 SDValue LHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS, in getAVRCmp() 581 SDValue LHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS, in getAVRCmp() 583 SDValue RHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS, in getAVRCmp() 585 SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS, in getAVRCmp() 694 SDValue LHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS, in getAVRCmp() 696 SDValue LHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS, in getAVRCmp() 698 SDValue RHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS, in getAVRCmp() 700 SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS, in getAVRCmp() 713 SDValue LHS_0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS, in getAVRCmp() 715 SDValue LHS_1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, LHS, in getAVRCmp() [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 645 LL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 647 RL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 649 AddendL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 651 AddendH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 674 LH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 676 RH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in TryExpandADDWithMul() 703 SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 706 SDValue LHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 709 SDValue RHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() 712 SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ExpandADDSUB() [all …]
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 222 EXTRACT_ELEMENT, enumerator
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.cpp | 988 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements() 990 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NVT, Pair, in GetPairElements()
|
| H A D | SelectionDAGDumper.cpp | 404 case ISD::EXTRACT_ELEMENT: return "extract_element"; in getOperationName()
|
| H A D | LegalizeFloatTypes.cpp | 1210 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandFloatResult() 1791 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandFloatOperand()
|
| H A D | LegalizeDAG.cpp | 1076 case ISD::EXTRACT_ELEMENT: in LegalizeOp() 3113 case ISD::EXTRACT_ELEMENT: { in ExpandNode()
|
| H A D | LegalizeIntegerTypes.cpp | 2406 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandIntegerResult() 4703 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break; in ExpandIntegerOperand()
|
| H A D | SelectionDAG.cpp | 3613 case ISD::EXTRACT_ELEMENT: { in computeKnownBits() 4286 case ISD::EXTRACT_ELEMENT: { in ComputeNumSignBits() 6234 case ISD::EXTRACT_ELEMENT: in getNode()
|
| H A D | SelectionDAGBuilder.cpp | 590 Part1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts() 592 Part0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, in getCopyToParts()
|
| H A D | TargetLowering.cpp | 7638 Op = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::f64, Op, in expandIS_FPCLASS()
|
| H A D | DAGCombiner.cpp | 13713 DAG.getNode(ISD::EXTRACT_ELEMENT, SDLoc(NewConv), MVT::i64, NewConv, in visitBITCAST() 13781 ISD::EXTRACT_ELEMENT, SDLoc(XorResult), MVT::i64, XorResult, in visitBITCAST()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1698 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerUDIVREM64() 1699 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, One); in LowerUDIVREM64() 1702 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero); in LowerUDIVREM64() 1703 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, One); in LowerUDIVREM64() 1761 SDValue Mulhi1_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1, in LowerUDIVREM64() 1764 DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1, One); in LowerUDIVREM64() 1775 SDValue Mulhi2_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2, in LowerUDIVREM64() 1778 DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi2, One); in LowerUDIVREM64() 1791 SDValue Mul3_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mul3, One); in LowerUDIVREM64() 1976 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero); in LowerSDIVREM() [all …]
|
| H A D | SIISelLowering.cpp | 10950 auto AccumLo = DAG.getNode(ISD::EXTRACT_ELEMENT, SL, MVT::i32, Accum, Zero); in tryFoldToMad64_32() 10951 auto AccumHi = DAG.getNode(ISD::EXTRACT_ELEMENT, SL, MVT::i32, Accum, One); in tryFoldToMad64_32() 10955 DAG.getNode(ISD::EXTRACT_ELEMENT, SL, MVT::i32, MulLHS, One); in tryFoldToMad64_32() 10962 DAG.getNode(ISD::EXTRACT_ELEMENT, SL, MVT::i32, MulRHS, One); in tryFoldToMad64_32()
|
| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | r600.bitcast.ll | 139 ; This just checks for crash in BUILD_VECTOR/EXTRACT_ELEMENT combine
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 1233 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, in lowerBITCAST() 1235 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, in lowerBITCAST() 1280 SDValue InLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator() 1282 SDValue InHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, In, in initAccumulator()
|
| H A D | MipsISelLowering.cpp | 1020 BottomHalf = CurDAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, AddOperand, in performMADD_MSUBCombine() 1023 TopHalf = CurDAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, AddOperand, in performMADD_MSUBCombine()
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4089 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN() 4091 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN() 6224 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 6226 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST() 9941 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator() 9943 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator() 10078 ISD::EXTRACT_ELEMENT, dl, MVT::i32, ST->getValue(), in LowerSTORE() 10082 ISD::EXTRACT_ELEMENT, dl, MVT::i32, ST->getValue(), in LowerSTORE() 10472 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic() 10475 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic() [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3078 SDValue BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO() 3080 SDValue TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, in LowerUMULO_SMULO()
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2430 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Scalar, in splatSplitI64WithVL() 2432 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Scalar, in splatSplitI64WithVL() 4530 SDValue ValLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Val, Zero); in lowerINSERT_VECTOR_ELT() 4531 SDValue ValHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Val, One); in lowerINSERT_VECTOR_ELT() 4726 SDValue ScalarLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, ScalarOp, in lowerVectorIntrinsicScalars() 4728 SDValue ScalarHi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, ScalarOp, in lowerVectorIntrinsicScalars()
|
| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1433 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, In, in lowerI128ToGR128() 1435 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, In, in lowerI128ToGR128() 1792 DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, ArgValue, in LowerCall()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3072 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs() 3074 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg, in Passv64i1ArgInRegs() 26331 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 26333 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Mask, in getMaskNode() 31237 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Src, in LowerBITCAST() 31240 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Src, in LowerBITCAST() 33180 cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 33182 cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), in ReplaceNodeResults() 33191 swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults() 33193 swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), in ReplaceNodeResults()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8173 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::f64, Src, in LowerFP_TO_INT() 8175 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::f64, Src, in LowerFP_TO_INT() 10515 return DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::f64, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 5254 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, Value, in LowerStore128() 5256 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i64, Value, in LowerStore128()
|