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Searched refs:ConstraintCode (Results 1 – 21 of 21) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp97 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in getRegistersForValue()
197 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; in chooseConstraint()
207 OpInfo.ConstraintCode = OpInfo.Codes[0]; in computeConstraintToUse()
208 OpInfo.ConstraintType = TLI->getConstraintType(OpInfo.ConstraintCode); in computeConstraintToUse()
214 if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { in computeConstraintToUse()
225 OpInfo.ConstraintCode = Repl; in computeConstraintToUse()
377 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm()
491 OpInfo.ConstraintCode, Ops, in lowerInlineAsm()
494 << OpInfo.ConstraintCode << " yet\n"); in lowerInlineAsm()
520 TLI->getInlineAsmMemConstraint(OpInfo.ConstraintCode); in lowerInlineAsm()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h491 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
492 if (ConstraintCode.size() == 1) { in getInlineAsmMemConstraint()
493 switch(ConstraintCode[0]) { in getInlineAsmMemConstraint()
507 } else if (ConstraintCode.size() == 2 && ConstraintCode[0] == 'Z') { in getInlineAsmMemConstraint()
508 switch (ConstraintCode[1]) { in getInlineAsmMemConstraint()
521 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp62 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode,
252 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
254 switch (ConstraintCode) { in SelectInlineAsmMemoryOperand()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsISelLowering.h650 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
651 if (ConstraintCode == "o") in getInlineAsmMemConstraint()
653 if (ConstraintCode == "R") in getInlineAsmMemConstraint()
655 if (ConstraintCode == "ZC") in getInlineAsmMemConstraint()
657 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.h546 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
547 if (ConstraintCode == "Q") in getInlineAsmMemConstraint()
549 else if (ConstraintCode.size() == 2) { in getInlineAsmMemConstraint()
550 if (ConstraintCode[0] == 'U') { in getInlineAsmMemConstraint()
551 switch(ConstraintCode[1]) { in getInlineAsmMemConstraint()
571 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp43 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode,
199 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
200 assert((ConstraintCode == InlineAsm::Constraint_m || in SelectInlineAsmMemoryOperand()
201 ConstraintCode == InlineAsm::Constraint_Q) && in SelectInlineAsmMemoryOperand()
H A DAVRISelLowering.h133 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
H A DAVRISelLowering.cpp1976 AVRTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint()
1979 switch (ConstraintCode[0]) { in getInlineAsmMemConstraint()
1983 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h986 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
987 if (ConstraintCode == "es") in getInlineAsmMemConstraint()
989 else if (ConstraintCode == "Q") in getInlineAsmMemConstraint()
991 else if (ConstraintCode == "Z") in getInlineAsmMemConstraint()
993 else if (ConstraintCode == "Zy") in getInlineAsmMemConstraint()
995 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelDAGToDAG.cpp63 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode,
158 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) { in SelectInlineAsmMemoryOperand() argument
160 switch (ConstraintCode) { in SelectInlineAsmMemoryOperand()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1099 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
1100 if (ConstraintCode == "Q") in getInlineAsmMemConstraint()
1105 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.h1203 getInlineAsmMemConstraint(StringRef ConstraintCode) const override { in getInlineAsmMemConstraint() argument
1204 if (ConstraintCode == "v") in getInlineAsmMemConstraint()
1206 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
H A DX86ISelLowering.cpp55730 X86::CondCode Cond = parseConstraintCode(OpInfo.ConstraintCode); in LowerAsmOutputForConstraint()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4461 std::string ConstraintCode; member
4532 virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint() argument
4533 if (ConstraintCode == "m") in getInlineAsmMemConstraint()
4535 if (ConstraintCode == "o") in getInlineAsmMemConstraint()
4537 if (ConstraintCode == "X") in getInlineAsmMemConstraint()
4539 if (ConstraintCode == "p") in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp205 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode, in set()
H A DTargetLowering.cpp5270 assert(!ConstraintCode.empty() && "No known constraint!"); in isMatchingInputConstraint()
5271 return isdigit(static_cast<unsigned char>(ConstraintCode[0])); in isMatchingInputConstraint()
5277 assert(!ConstraintCode.empty() && "No known constraint!"); in getMatchedOperand()
5278 return atoi(ConstraintCode.c_str()); in getMatchedOperand()
5453 getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode, in ParseConstraints()
5456 getRegForInlineAsmConstraint(TRI, Input.ConstraintCode, in ParseConstraints()
5634 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx]; in ChooseConstraint()
5647 OpInfo.ConstraintCode = OpInfo.Codes[0]; in ComputeConstraintToUse()
5654 if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) { in ComputeConstraintToUse()
5664 OpInfo.ConstraintCode = "i"; in ComputeConstraintToUse()
[all …]
H A DSelectionDAGBuilder.cpp8437 TLI.getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode, in patchMatchingInput()
8440 TLI.getRegForInlineAsmConstraint(TRI, MatchingOpInfo.ConstraintCode, in patchMatchingInput()
8523 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in getRegistersForValue()
8806 Twine(OpInfo.ConstraintCode) + in visitInlineAsm()
8834 TLI.getInlineAsmMemConstraint(OpInfo.ConstraintCode); in visitInlineAsm()
8851 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm()
8937 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode, in visitInlineAsm()
8949 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm()
8972 TLI.getInlineAsmMemConstraint(OpInfo.ConstraintCode); in visitInlineAsm()
8995 Twine(OpInfo.ConstraintCode) + "'"); in visitInlineAsm()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h434 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
H A DRISCVISelLowering.cpp11989 RISCVTargetLowering::getInlineAsmMemConstraint(StringRef ConstraintCode) const { in getInlineAsmMemConstraint()
11991 if (ConstraintCode.size() == 1) { in getInlineAsmMemConstraint()
11992 switch (ConstraintCode[0]) { in getInlineAsmMemConstraint()
12000 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode); in getInlineAsmMemConstraint()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp845 TRI, TC.ConstraintCode, TC.ConstraintVT).second; in isInlineAsmSourceOfDivergence()
H A DSIISelLowering.cpp12918 SIRI, TC.ConstraintCode, TC.ConstraintVT).second; in requiresUniformRegister()