[IR] Don't use blockaddresses as callbr arguments

Following some recent discussions, this changes the representation
of callbrs in IR. The current blockaddress arguments are replaced
with `!` label

[IR] Don't use blockaddresses as callbr arguments

Following some recent discussions, this changes the representation
of callbrs in IR. The current blockaddress arguments are replaced
with `!` label constraints that refer directly to callbr indirect
destinations:

; Before:
%res = callbr i8* asm "", "=r,r,i"(i8* %x, i8* blockaddress(@test8, %foo))
to label %asm.fallthrough [label %foo]
; After:
%res = callbr i8* asm "", "=r,r,!i"(i8* %x)
to label %asm.fallthrough [label %foo]

The benefit of this is that we can easily update the successors of
a callbr, without having to worry about also updating blockaddress
references. This should allow us to remove some limitations:

* Allow unrolling/peeling/rotation of callbr, or any other
clone-based optimizations
(https://github.com/llvm/llvm-project/issues/41834)
* Allow duplicate successors
(https://github.com/llvm/llvm-project/issues/45248)

This is just the IR representation change though, I will follow up
with patches to remove limtations in various transformation passes
that are no longer needed.

Differential Revision: https://reviews.llvm.org/D129288

show more ...

[InlineAsm] Add support for address operands ("p").

This patch adds support for inline assembly address operands using the "p"
constraint on X86 and SystemZ.

This was in fact broken on X86 (see exa

[InlineAsm] Add support for address operands ("p").

This patch adds support for inline assembly address operands using the "p"
constraint on X86 and SystemZ.

This was in fact broken on X86 (see example at
https://reviews.llvm.org/D110267, Nov 23).

These operands should probably be treated the same as memory operands by
CodeGenPrepare, which have been commented with "TODO" there.

Review: Xiang Zhang and Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D122220

show more ...

Cleanup includes: DebugInfo & CodeGen

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121332

[IR] Use CallBase::getParamElementType() (NFC)

As this method now exists on CallBase, use it rather than the
one on AttributeList.

GlobalISel: Avoid crash on asm with lying result types

The physical register in the asm has the wrong type for the declared
IR. It seems to work in the DAG by extracting the 4 elements that are
defi

GlobalISel: Avoid crash on asm with lying result types

The physical register in the asm has the wrong type for the declared
IR. It seems to work in the DAG by extracting the 4 elements that are
defined in the IR from the register, but that isn't handled here. This
doesn't seem to be a well tested path since other mismatched cases are
crashing the DAG asm handling.

show more ...

[GlobalISel] Avoid pointer element type access during InlineAsm lowering

Same change as has been made for the SDAG lowering.

[NFC] Remove uses of PointerType::getElementType()

Instead use either Type::getPointerElementType() or
Type::getNonOpaquePointerElementType().

This is part of D117885, in preparation for deprecatin

[NFC] Remove uses of PointerType::getElementType()

Instead use either Type::getPointerElementType() or
Type::getNonOpaquePointerElementType().

This is part of D117885, in preparation for deprecating the API.

show more ...

[IR] Add ConstraintInfo::hasArg() helper (NFC)

Checking whether a constraint corresponds to an argument is a
recurring pattern.

[AArch64] Legalize MVT::i64x8 in DAG isel lowering

This patch legalizes the Machine Value Type introduced in D94096 for loads
and stores. A new target hook named getAsmOperandValueType() is added wh

[AArch64] Legalize MVT::i64x8 in DAG isel lowering

This patch legalizes the Machine Value Type introduced in D94096 for loads
and stores. A new target hook named getAsmOperandValueType() is added which
maps i512 to MVT::i64x8. GlobalISel falls back to DAG for legalization.

Differential Revision: https://reviews.llvm.org/D94097

show more ...

[GlobalISel][InlineAsm] Fix matching input constraint to physreg

Add given input and mark it as tied.
Doesn't create additional copy compared to
matching input constraint to virtual register.

Diffe

[GlobalISel][InlineAsm] Fix matching input constraint to physreg

Add given input and mark it as tied.
Doesn't create additional copy compared to
matching input constraint to virtual register.

Differential Revision: https://reviews.llvm.org/D85122

show more ...

GlobalISel: Handle 'n' inline asm constraint

[GlobalISel][InlineAsm] Add register class ID to the flags of register input operands

Summary: We do this already for output operands, but missed it for (non-tied) input operands.

Reviewers: arsenm

[GlobalISel][InlineAsm] Add register class ID to the flags of register input operands

Summary: We do this already for output operands, but missed it for (non-tied) input operands.

Reviewers: arsenm, Petar.Avramovic

Reviewed By: arsenm

Subscribers: jvesely, wdng, nhaehnle, rovka, hiraditya, llvm-commits, kerbowa

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83763

show more ...

[GlobalISel][InlineAsm] Fix buildCopy for inputs

Check that input size matches size of destination reg class.
Attempt to extend input size when needed.

Differential Revision: https://reviews.llvm.o

[GlobalISel][InlineAsm] Fix buildCopy for inputs

Check that input size matches size of destination reg class.
Attempt to extend input size when needed.

Differential Revision: https://reviews.llvm.org/D83384

show more ...

[GlobalISel][InlineAsm] Fix matching input constraints to mem operand

Mark matching input constraint to mem operand as not supported.

Differential Revision: https://reviews.llvm.org/D83235

[GlobalISel][InlineAsm] Add support for matching input constraints

Find def operand that corresponds to matching constraint and
tie input to that operand.

Differential Revision: https://reviews.llv

[GlobalISel][InlineAsm] Add support for matching input constraints

Find def operand that corresponds to matching constraint and
tie input to that operand.

Differential Revision: https://reviews.llvm.org/D82651

show more ...

[GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

Summary:
Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm oper

[GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

Summary:
Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm operand.
However, we also have to add the EarlyClobber flag to the MachineOperand itself.

This fixes PR46028

Reviewers: arsenm, leonardchan

Reviewed By: arsenm, leonardchan

Subscribers: phosek, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80467

show more ...

Replace dyn_cast with isa when the result isn't used (NFC)

Fix build warning: unused variable 'BB'

[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified

Summary:
D78319 introduced basic support for inline asm input operands in GlobalISel.
However, that patch did

[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified

Summary:
D78319 introduced basic support for inline asm input operands in GlobalISel.
However, that patch did not handle the case where a memory input operand still needs to
be indirectified. Later code asserts that the memory operand is already indirect.

This patch adds an early return false to trigger the SelectionDAG fallback for now.

Reviewers: arsenm, paquette

Reviewed By: arsenm

Subscribers: thakis, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79955

show more ...

Revert "[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified"

This reverts commit 887dfeec53ad5e564e9990c433e5b53f2e651dbf.
It broke irtranslator-inline-asm.ll on

Revert "[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified"

This reverts commit 887dfeec53ad5e564e9990c433e5b53f2e651dbf.
It broke irtranslator-inline-asm.ll on many bots, e.g.
http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/38606/steps/test-check-all/logs/FAIL%3A%20LLVM%3A%3Airtranslator-inline-asm.ll

show more ...

[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified

Summary:
D78319 introduced basic support for inline asm input operands in GlobalISel.
However, that patch did

[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified

Summary:
D78319 introduced basic support for inline asm input operands in GlobalISel.
However, that patch did not handle the case where a memory input operand still needs to
be indirectified. Later code asserts that the memory operand is already indirect.

This patch adds an early return false to trigger the SelectionDAG fallback for now.

Reviewers: arsenm, paquette

Reviewed By: arsenm

Subscribers: wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79955

show more ...

[GlobalISel][InlineAsm] Add support for basic input operand constraints

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: arsenm

Subscribers: gargaroff, wdng, rov

[GlobalISel][InlineAsm] Add support for basic input operand constraints

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: arsenm

Subscribers: gargaroff, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78319

show more ...

[GlobalISel][InlineAsm] Add support for basic output operand constraints

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: arsenm

Subscribers: gargaroff, wdng, ro

[GlobalISel][InlineAsm] Add support for basic output operand constraints

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: arsenm

Subscribers: gargaroff, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78318

show more ...

[IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand().

This method has been commented as deprecated for a while. Remove
it and replace all uses with the equivalent getCalledOpe

[IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand().

This method has been commented as deprecated for a while. Remove
it and replace all uses with the equivalent getCalledOperand().

I also made a few cleanups in here. For example, to removes use
of getElementType on a pointer when we could just use getFunctionType
from the call.

Differential Revision: https://reviews.llvm.org/D78882

show more ...

[GlobalISel] Introduce InlineAsmLowering class

Summary:
Similar to the CallLowering class used for lowering LLVM IR calls to MIR calls,
we introduce a separate class for lowering LLVM IR inline asm

[GlobalISel] Introduce InlineAsmLowering class

Summary:
Similar to the CallLowering class used for lowering LLVM IR calls to MIR calls,
we introduce a separate class for lowering LLVM IR inline asm to MIR INLINEASM.

There is no functional change yet, all existing tests should pass.

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: aemerson

Subscribers: gargaroff, wdng, mgorny, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78316

show more ...