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Searched refs:AVR (Results 1 – 25 of 77) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFObjectWriter.cpp78 case AVR::fixup_32: in getRelocType()
84 case AVR::fixup_16: in getRelocType()
86 case AVR::fixup_16_pm: in getRelocType()
112 case AVR::fixup_call: in getRelocType()
114 case AVR::fixup_ldi: in getRelocType()
116 case AVR::fixup_6: in getRelocType()
128 case AVR::fixup_8: in getRelocType()
130 case AVR::fixup_8_lo8: in getRelocType()
132 case AVR::fixup_8_hi8: in getRelocType()
136 case AVR::fixup_diff8: in getRelocType()
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H A DAVRELFStreamer.cpp17 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
19 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
21 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
23 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
25 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
27 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
29 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
31 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
33 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
35 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet()
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H A DAVRAsmBackend.cpp252 case AVR::fixup_7_pcrel: in adjustFixupValue()
258 case AVR::fixup_call: in adjustFixupValue()
261 case AVR::fixup_ldi: in adjustFixupValue()
264 case AVR::fixup_lo8_ldi: in adjustFixupValue()
319 case AVR::fixup_16: in adjustFixupValue()
324 case AVR::fixup_16_pm: in adjustFixupValue()
331 case AVR::fixup_6: in adjustFixupValue()
334 case AVR::fixup_6_adiw: in adjustFixupValue()
338 case AVR::fixup_port5: in adjustFixupValue()
342 case AVR::fixup_port6: in adjustFixupValue()
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H A DAVRMCExpr.cpp150 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind()
154 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind()
157 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind()
160 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind()
163 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind()
167 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind()
170 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind()
173 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind()
177 Kind = AVR::fixup_16_pm; in getFixupKind()
180 Kind = AVR::fixup_lo8_ldi_gs; in getFixupKind()
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H A DAVRInstPrinter.cpp44 case AVR::LDRdPtr: in printInst()
45 case AVR::LDRdPtrPi: in printInst()
46 case AVR::LDRdPtrPd: in printInst()
51 if (Opcode == AVR::LDRdPtrPd) in printInst()
56 if (Opcode == AVR::LDRdPtrPi) in printInst()
59 case AVR::STPtrRr: in printInst()
65 case AVR::STPtrPiRr: in printInst()
66 case AVR::STPtrPdRr: in printInst()
69 if (Opcode == AVR::STPtrPdRr) in printInst()
74 if (Opcode == AVR::STPtrPiRr) in printInst()
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H A DAVRMCCodeEmitter.cpp80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder()
81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder()
91 template <AVR::Fixups Fixup>
109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
122 case AVR::R27R26: in encodeLDSTPtrReg()
124 case AVR::R29R28: in encodeLDSTPtrReg()
126 case AVR::R31R30: in encodeLDSTPtrReg()
150 case AVR::R31R30: in encodeMemri()
153 case AVR::R29R28: in encodeMemri()
183 template <AVR::Fixups Fixup, unsigned Offset>
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/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp39 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {} in AVRInstrInfo()
228 case AVR::BREQk: in getCondFromBranchOpc()
230 case AVR::BRNEk: in getCondFromBranchOpc()
232 case AVR::BRSHk: in getCondFromBranchOpc()
234 case AVR::BRLOk: in getCondFromBranchOpc()
236 case AVR::BRMIk: in getCondFromBranchOpc()
238 case AVR::BRPLk: in getCondFromBranchOpc()
240 case AVR::BRGEk: in getCondFromBranchOpc()
242 case AVR::BRLTk: in getCondFromBranchOpc()
518 case AVR::JMPk: in getBranchDestBlock()
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H A DAVRFrameLowering.cpp75 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0) in emitPrologue()
104 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
128 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
145 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0); in restoreStatusRegister()
149 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0); in restoreStatusRegister()
211 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
321 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
354 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
362 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30); in eliminateCallFramePseudoInstr()
385 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
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H A DAVRRegisterInfo.cpp73 for (unsigned Reg = AVR::R2; Reg <= AVR::R17; Reg++) in getReservedRegs()
76 for (unsigned Reg = AVR::R3R2; Reg <= AVR::R18R17; Reg++) in getReservedRegs()
118 if ((Opcode != AVR::SUBIWRdK) && (Opcode != AVR::ADIWRdK)) { in foldFrameOffset()
130 case AVR::SUBIWRdK: in foldFrameOffset()
133 case AVR::ADIWRdK: in foldFrameOffset()
195 case AVR::R25R24: in eliminateFrameIndex()
196 case AVR::R27R26: in eliminateFrameIndex()
225 unsigned AddOpc = AVR::ADIWRdK, SubOpc = AVR::SBIWRdK; in eliminateFrameIndex()
239 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0) in eliminateFrameIndex()
270 return AVR::R28; in getFrameRegister()
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H A DAVRExpandPseudoInsts.cpp279 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
284 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
289 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
343 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
823 unsigned OpLo = IsExt ? AVR::ELPMRdZPi : AVR::LPMRdZPi; in expandLPMWELPMW()
824 unsigned OpHi = IsExt ? AVR::ELPMRdZ : AVR::LPMRdZ; in expandLPMWELPMW()
2442 EXPAND(AVR::COMWRd); in expandMI()
2443 EXPAND(AVR::NEGWRd); in expandMI()
2471 EXPAND(AVR::INWRdA); in expandMI()
2491 EXPAND(AVR::SEXT); in expandMI()
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H A DAVRISelLowering.cpp1047 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
1048 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14,
1049 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8};
1050 static const MCPhysReg RegList8Tiny[] = {AVR::R25, AVR::R24, AVR::R23,
1051 AVR::R22, AVR::R21, AVR::R20};
1053 AVR::R26R25, AVR::R25R24, AVR::R24R23, AVR::R23R22, AVR::R22R21,
1054 AVR::R21R20, AVR::R20R19, AVR::R19R18, AVR::R18R17, AVR::R17R16,
1055 AVR::R16R15, AVR::R15R14, AVR::R14R13, AVR::R13R12, AVR::R12R11,
1056 AVR::R11R10, AVR::R10R9, AVR::R9R8};
1726 return (SrcReg == AVR::R0 || SrcReg == AVR::R1); in isCopyMulResult()
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H A DAVRTargetObjectFile.cpp43 if (AVR::isProgramMemoryAddress(GO) && !GO->hasSection() && in SelectSectionForGlobal()
56 AVR::getAddressSpace(GO) != AVR::ProgramMemory) { in SelectSectionForGlobal()
63 switch (AVR::getAddressSpace(GO)) { in SelectSectionForGlobal()
64 case AVR::ProgramMemory: // address space 1 in SelectSectionForGlobal()
66 case AVR::ProgramMemory1: // address space 2 in SelectSectionForGlobal()
68 case AVR::ProgramMemory2: // address space 3 in SelectSectionForGlobal()
70 case AVR::ProgramMemory3: // address space 4 in SelectSectionForGlobal()
72 case AVR::ProgramMemory4: // address space 5 in SelectSectionForGlobal()
74 case AVR::ProgramMemory5: // address space 6 in SelectSectionForGlobal()
H A DAVRISelDAGToDAG.cpp144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
185 Opcode = Bank > 0 ? AVR::ELPMBRdZPi : AVR::LPMRdZPi; in selectIndexedProgMemLoad()
189 Opcode = Bank > 0 ? AVR::ELPMWRdZPi : AVR::LPMWRdZPi; in selectIndexedProgMemLoad()
257 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
329 if (!RN || (RN->getReg() != AVR::SP)) { in select()
339 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr; in select()
354 if (!AVR::isProgramMemoryAccess(LD)) { in select()
362 int ProgMemBank = AVR::getProgramMemoryBank(LD); in select()
456 Ops.push_back(CurDAG->getRegister(AVR::R31R30, MVT::i16)); in select()
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H A DAVRRegisterInfo.td19 let Namespace = "AVR";
25 let Namespace = "AVR" in {
114 def GPR8 : RegisterClass<"AVR", [i8], 8,
125 def GPR8lo : RegisterClass<"AVR", [i8], 8,
130 def LD8 : RegisterClass<"AVR", [i8], 8,
140 def LD8lo : RegisterClass<"AVR", [i8], 8,
144 def DREGS : RegisterClass<"AVR", [i16], 8,
159 : RegisterClass<"AVR", [i16], 8,
182 def DLDREGS : RegisterClass<"AVR", [i16], 8,
192 def IWREGS : RegisterClass<"AVR", [i16], 8,
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H A DAVR.td1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
8 // This is the top level entry point for the AVR target.
18 // AVR Device Definitions
73 def AVR : Target {
H A DREADME.md1 # AVR backend
3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic…
7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
/llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp60 AVR::R0, AVR::R1, AVR::R2, AVR::R3, AVR::R4, AVR::R5, AVR::R6,
61 AVR::R7, AVR::R8, AVR::R9, AVR::R10, AVR::R11, AVR::R12, AVR::R13,
62 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20,
63 AVR::R21, AVR::R22, AVR::R23, AVR::R24, AVR::R25, AVR::R26, AVR::R27,
64 AVR::R28, AVR::R29, AVR::R30, AVR::R31,
261 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30)); in decodeMemri()
276 unsigned RegBase = (Insn & 0x8) ? AVR::R29R28 : AVR::R31R30; in decodeLoadStore()
317 RegBase = AVR::R27R26; in decodeLoadStore()
320 RegBase = AVR::R29R28; in decodeLoadStore()
323 RegBase = AVR::R31R30; in decodeLoadStore()
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/llvm-project-15.0.7/llvm/test/CodeGen/AVR/features/
H A Dxmega_io.ll8 ; RUN: llc -O0 < %s -march=avr -mcpu avr2 | FileCheck %s -check-prefix=AVR
9 ; RUN: llc -O0 < %s -march=avr -mcpu avr25 | FileCheck %s -check-prefix=AVR
10 ; RUN: llc -O0 < %s -march=avr -mcpu avr3 | FileCheck %s -check-prefix=AVR
11 ; RUN: llc -O0 < %s -march=avr -mcpu avr31 | FileCheck %s -check-prefix=AVR
13 ; RUN: llc -O0 < %s -march=avr -mcpu avr4 | FileCheck %s -check-prefix=AVR
14 ; RUN: llc -O0 < %s -march=avr -mcpu avr5 | FileCheck %s -check-prefix=AVR
16 ; RUN: llc -O0 < %s -march=avr -mcpu avr6 | FileCheck %s -check-prefix=AVR
21 ; AVR: lds r24, 8
29 ; AVR: in r24, 8
37 ; AVR: in r24, 48
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/llvm-project-15.0.7/llvm/test/Object/
H A Dobj2yaml.test683 # ELF-AVR: FileHeader:
689 # ELF-AVR-NEXT: ProgramHeaders:
690 # ELF-AVR-NEXT: - Type: PT_LOAD
692 # ELF-AVR-NEXT: FirstSec: .text
693 # ELF-AVR-NEXT: LastSec: .text
694 # ELF-AVR-NEXT: Align: 0x2
697 # ELF-AVR-NEXT: FirstSec: .data
698 # ELF-AVR-NEXT: LastSec: .data
700 # ELF-AVR-NEXT: PAddr: 0x4
701 # ELF-AVR-NEXT: Sections:
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/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Dsections.ll23 ; -fdata-sections. The AVR backend does not yet respect -fdata-sections in this
32 ; CHECK-8515: error: Current AVR subtarget does not support accessing extended program memory
33 ; CHECK-tiny40: error: Current AVR subtarget does not support accessing program memory
38 ; CHECK-8515: error: Current AVR subtarget does not support accessing extended program memory
39 ; CHECK-tiny40: error: Current AVR subtarget does not support accessing program memory
44 ; CHECK-8515: error: Current AVR subtarget does not support accessing extended program memory
45 ; CHECK-tiny40: error: Current AVR subtarget does not support accessing program memory
50 ; CHECK-8515: error: Current AVR subtarget does not support accessing extended program memory
51 ; CHECK-tiny40: error: Current AVR subtarget does not support accessing program memory
56 ; CHECK-8515: error: Current AVR subtarget does not support accessing extended program memory
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/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/
H A DBUILD.gn6 td_file = "../AVR.td"
12 td_file = "../AVR.td"
18 td_file = "../AVR.td"
24 td_file = "../AVR.td"
30 td_file = "../AVR.td"
49 "//llvm/lib/Target/AVR/TargetInfo",
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/
H A DBUILD.gn6 td_file = "../AVR.td"
15 "//llvm/lib/Target/AVR:LLVMAVRCodeGen",
16 "//llvm/lib/Target/AVR/MCTargetDesc",
17 "//llvm/lib/Target/AVR/TargetInfo",
/llvm-project-15.0.7/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp357 if (RegNum == AVR::NoRegister) { in parseRegisterName()
360 if (RegNum == AVR::NoRegister) { in parseRegisterName()
370 if (RegNum == AVR::NoRegister) in parseRegisterName()
377 int RegNum = AVR::NoRegister; in parseRegister()
405 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
409 if (AVR::R0 <= RegNo && RegNo <= AVR::R15 && in tryParseRegisterOperand()
410 STI.hasFeature(AVR::FeatureTinyEncoding)) in tryParseRegisterOperand()
583 if (RegNo == AVR::NoRegister) in parseMemriOperand()
609 return (RegNo == AVR::NoRegister); in ParseRegister()
619 if (RegNo == AVR::NoRegister) in tryParseRegister()
[all …]
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/
H A DBUILD.gn6 td_file = "../AVR.td"
16 "//llvm/lib/Target/AVR/MCTargetDesc",
17 "//llvm/lib/Target/AVR/TargetInfo",
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/AVR/
H A DBUILD.gn6 td_file = "AVR.td"
12 td_file = "AVR.td"
48 # having the directory's name, "//llvm/lib/Target/AVR" will refer to this
53 group("AVR") {

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