Lines Matching refs:AVR
54 const Register SCRATCH_REGISTER = AVR::R0;
56 const Register ZERO_REGISTER = AVR::R1;
229 if (Op == AVR::ANDIRdK && ImmVal == 0xff) in isLogicImmOpRedundant()
233 if (Op == AVR::ORIRdK && ImmVal == 0x0) in isLogicImmOpRedundant()
278 bool AVRExpandPseudo::expand<AVR::ADDWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
279 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
283 bool AVRExpandPseudo::expand<AVR::ADCWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
284 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
288 bool AVRExpandPseudo::expand<AVR::SUBWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
289 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
293 bool AVRExpandPseudo::expand<AVR::SUBIWRdK>(Block &MBB, BlockIt MBBI) { in expand()
303 buildMI(MBB, MBBI, AVR::SUBIRdK) in expand()
308 buildMI(MBB, MBBI, AVR::SBCIRdK) in expand()
342 bool AVRExpandPseudo::expand<AVR::SBCWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
343 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
347 bool AVRExpandPseudo::expand<AVR::SBCIWRdK>(Block &MBB, BlockIt MBBI) { in expand()
357 unsigned OpLo = AVR::SBCIRdK; in expand()
358 unsigned OpHi = AVR::SBCIRdK; in expand()
387 bool AVRExpandPseudo::expand<AVR::ANDWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
388 return expandLogic(AVR::ANDRdRr, MBB, MBBI); in expand()
392 bool AVRExpandPseudo::expand<AVR::ANDIWRdK>(Block &MBB, BlockIt MBBI) { in expand()
393 return expandLogicImm(AVR::ANDIRdK, MBB, MBBI); in expand()
397 bool AVRExpandPseudo::expand<AVR::ORWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
398 return expandLogic(AVR::ORRdRr, MBB, MBBI); in expand()
402 bool AVRExpandPseudo::expand<AVR::ORIWRdK>(Block &MBB, BlockIt MBBI) { in expand()
403 return expandLogicImm(AVR::ORIRdK, MBB, MBBI); in expand()
407 bool AVRExpandPseudo::expand<AVR::EORWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
408 return expandLogic(AVR::EORRdRr, MBB, MBBI); in expand()
412 bool AVRExpandPseudo::expand<AVR::COMWRd>(Block &MBB, BlockIt MBBI) { in expand()
419 unsigned OpLo = AVR::COMRd; in expand()
420 unsigned OpHi = AVR::COMRd; in expand()
444 bool AVRExpandPseudo::expand<AVR::NEGWRd>(Block &MBB, BlockIt MBBI) { in expand()
455 buildMI(MBB, MBBI, AVR::NEGRd) in expand()
462 buildMI(MBB, MBBI, AVR::NEGRd) in expand()
468 buildMI(MBB, MBBI, AVR::SBCRdRr) in expand()
482 bool AVRExpandPseudo::expand<AVR::CPWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
490 unsigned OpLo = AVR::CPRdRr; in expand()
491 unsigned OpHi = AVR::CPCRdRr; in expand()
515 bool AVRExpandPseudo::expand<AVR::CPCWRdRr>(Block &MBB, BlockIt MBBI) { in expand()
523 unsigned OpLo = AVR::CPCRdRr; in expand()
524 unsigned OpHi = AVR::CPCRdRr; in expand()
550 bool AVRExpandPseudo::expand<AVR::LDIWRdK>(Block &MBB, BlockIt MBBI) { in expand()
555 unsigned OpLo = AVR::LDIRdK; in expand()
556 unsigned OpHi = AVR::LDIRdK; in expand()
601 bool AVRExpandPseudo::expand<AVR::LDSWRdK>(Block &MBB, BlockIt MBBI) { in expand()
606 unsigned OpLo = AVR::LDSRdK; in expand()
607 unsigned OpHi = AVR::LDSRdK; in expand()
647 bool AVRExpandPseudo::expand<AVR::LDWRdPtr>(Block &MBB, BlockIt MBBI) { in expand()
654 unsigned OpLo = AVR::LDRdPtr; in expand()
655 unsigned OpHi = AVR::LDDRdPtrQ; in expand()
672 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg); in expand()
682 buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg); in expand()
685 buildMI(MBB, MBBI, AVR::POPRd, DstLoReg); in expand()
696 bool AVRExpandPseudo::expand<AVR::LDWRdPtrPi>(Block &MBB, BlockIt MBBI) { in expand()
703 unsigned OpLo = AVR::LDRdPtrPi; in expand()
704 unsigned OpHi = AVR::LDRdPtrPi; in expand()
729 bool AVRExpandPseudo::expand<AVR::LDWRdPtrPd>(Block &MBB, BlockIt MBBI) { in expand()
736 unsigned OpLo = AVR::LDRdPtrPd; in expand()
737 unsigned OpHi = AVR::LDRdPtrPd; in expand()
762 bool AVRExpandPseudo::expand<AVR::LDDWRdPtrQ>(Block &MBB, BlockIt MBBI) { in expand()
770 unsigned OpLo = AVR::LDDRdPtrQ; in expand()
771 unsigned OpHi = AVR::LDDRdPtrQ; in expand()
793 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg); in expand()
803 buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg); in expand()
806 buildMI(MBB, MBBI, AVR::POPRd, DstLoReg); in expand()
823 unsigned OpLo = IsExt ? AVR::ELPMRdZPi : AVR::LPMRdZPi; in expandLPMWELPMW()
824 unsigned OpHi = IsExt ? AVR::ELPMRdZ : AVR::LPMRdZ; in expandLPMWELPMW()
832 buildMI(MBB, MBBI, AVR::OUTARr).addImm(STI.getIORegRAMPZ()).addReg(Bank); in expandLPMWELPMW()
849 buildMI(MBB, MBBI, AVR::PUSHRr).addReg(TmpReg); in expandLPMWELPMW()
858 buildMI(MBB, MBBI, AVR::MOVRdRr, DstHiReg).addReg(TmpReg); in expandLPMWELPMW()
861 buildMI(MBB, MBBI, AVR::POPRd, DstLoReg); in expandLPMWELPMW()
872 bool AVRExpandPseudo::expand<AVR::LPMWRdZ>(Block &MBB, BlockIt MBBI) { in expand()
877 bool AVRExpandPseudo::expand<AVR::ELPMWRdZ>(Block &MBB, BlockIt MBBI) { in expand()
882 bool AVRExpandPseudo::expand<AVR::ELPMBRdZ>(Block &MBB, BlockIt MBBI) { in expand()
891 buildMI(MBB, MBBI, AVR::OUTARr).addImm(STI.getIORegRAMPZ()).addReg(BankReg); in expand()
894 auto MILB = buildMI(MBB, MBBI, AVR::ELPMRdZ) in expand()
905 bool AVRExpandPseudo::expand<AVR::LPMWRdZPi>(Block &MBB, BlockIt MBBI) { in expand()
910 bool AVRExpandPseudo::expand<AVR::ELPMBRdZPi>(Block &MBB, BlockIt MBBI) { in expand()
915 bool AVRExpandPseudo::expand<AVR::ELPMWRdZPi>(Block &MBB, BlockIt MBBI) { in expand()
925 buildMI(MBB, MBBI, AVR::INRdA) in expandAtomic()
930 buildMI(MBB, MBBI, AVR::BCLRs).addImm(7); // CLI in expandAtomic()
935 buildMI(MBB, MBBI, AVR::OUTARr) in expandAtomic()
969 TRI->getAllocatableSet(*MBB.getParent(), &AVR::GPR8RegClass); in scavengeGPR8()
978 BitVector Available = RS.getRegsAvailable(&AVR::GPR8RegClass); in scavengeGPR8()
987 bool AVRExpandPseudo::expand<AVR::AtomicLoad8>(Block &MBB, BlockIt MBBI) { in expand()
988 return expandAtomicBinaryOp(AVR::LDRdPtr, MBB, MBBI); in expand()
992 bool AVRExpandPseudo::expand<AVR::AtomicLoad16>(Block &MBB, BlockIt MBBI) { in expand()
993 return expandAtomicBinaryOp(AVR::LDWRdPtr, MBB, MBBI); in expand()
997 bool AVRExpandPseudo::expand<AVR::AtomicStore8>(Block &MBB, BlockIt MBBI) { in expand()
998 return expandAtomicBinaryOp(AVR::STPtrRr, MBB, MBBI); in expand()
1002 bool AVRExpandPseudo::expand<AVR::AtomicStore16>(Block &MBB, BlockIt MBBI) { in expand()
1003 return expandAtomicBinaryOp(AVR::STWPtrRr, MBB, MBBI); in expand()
1007 bool AVRExpandPseudo::expand<AVR::AtomicFence>(Block &MBB, BlockIt MBBI) { in expand()
1014 bool AVRExpandPseudo::expand<AVR::STSWKRr>(Block &MBB, BlockIt MBBI) { in expand()
1019 unsigned OpLo = AVR::STSKRr; in expand()
1020 unsigned OpHi = AVR::STSKRr; in expand()
1060 bool AVRExpandPseudo::expand<AVR::STWPtrRr>(Block &MBB, BlockIt MBBI) { in expand()
1067 unsigned OpLo = AVR::STPtrRr; in expand()
1068 unsigned OpHi = AVR::STDPtrQRr; in expand()
1089 bool AVRExpandPseudo::expand<AVR::STWPtrPiRr>(Block &MBB, BlockIt MBBI) { in expand()
1097 unsigned OpLo = AVR::STPtrPiRr; in expand()
1098 unsigned OpHi = AVR::STPtrPiRr; in expand()
1124 bool AVRExpandPseudo::expand<AVR::STWPtrPdRr>(Block &MBB, BlockIt MBBI) { in expand()
1132 unsigned OpLo = AVR::STPtrPdRr; in expand()
1133 unsigned OpHi = AVR::STPtrPdRr; in expand()
1159 bool AVRExpandPseudo::expand<AVR::STDWPtrQRr>(Block &MBB, BlockIt MBBI) { in expand()
1172 buildMI(MBB, MBBI, AVR::PUSHWRr).addReg(DstReg); in expand()
1175 buildMI(MBB, MBBI, AVR::SUBIWRdK) in expand()
1180 buildMI(MBB, MBBI, AVR::STWPtrRr) in expand()
1185 buildMI(MBB, MBBI, AVR::POPWRd).addDef(DstReg, RegState::Define); in expand()
1188 unsigned OpLo = AVR::STDPtrQRr; in expand()
1189 unsigned OpHi = AVR::STDPtrQRr; in expand()
1212 bool AVRExpandPseudo::expand<AVR::STDSPQRr>(Block &MBB, BlockIt MBBI) { in expand()
1217 assert(MI.getOperand(0).getReg() == AVR::SP && in expand()
1224 MI.setDesc(TII->get(AVR::STDPtrQRr)); in expand()
1225 MI.getOperand(0).setReg(AVR::R29R28); in expand()
1231 bool AVRExpandPseudo::expand<AVR::STDWSPQRr>(Block &MBB, BlockIt MBBI) { in expand()
1236 assert(MI.getOperand(0).getReg() == AVR::SP && in expand()
1243 MI.setDesc(TII->get(AVR::STDWPtrQRr)); in expand()
1244 MI.getOperand(0).setReg(AVR::R29R28); in expand()
1250 bool AVRExpandPseudo::expand<AVR::INWRdA>(Block &MBB, BlockIt MBBI) { in expand()
1256 unsigned OpLo = AVR::INRdA; in expand()
1257 unsigned OpHi = AVR::INRdA; in expand()
1282 bool AVRExpandPseudo::expand<AVR::OUTWARr>(Block &MBB, BlockIt MBBI) { in expand()
1288 unsigned OpLo = AVR::OUTARr; in expand()
1289 unsigned OpHi = AVR::OUTARr; in expand()
1313 bool AVRExpandPseudo::expand<AVR::PUSHWRr>(Block &MBB, BlockIt MBBI) { in expand()
1319 unsigned OpLo = AVR::PUSHRr; in expand()
1320 unsigned OpHi = AVR::PUSHRr; in expand()
1338 bool AVRExpandPseudo::expand<AVR::POPWRd>(Block &MBB, BlockIt MBBI) { in expand()
1343 unsigned OpLo = AVR::POPRd; in expand()
1344 unsigned OpHi = AVR::POPRd; in expand()
1355 bool AVRExpandPseudo::expand<AVR::ROLBRd>(Block &MBB, BlockIt MBBI) { in expand()
1367 OpShift = AVR::ADDRdRr; in expand()
1368 OpCarry = AVR::ADCRdRr; in expand()
1393 bool AVRExpandPseudo::expand<AVR::RORBRd>(Block &MBB, BlockIt MBBI) { in expand()
1408 buildMI(MBB, MBBI, AVR::BST).addReg(DstReg).addImm(0); in expand()
1411 buildMI(MBB, MBBI, AVR::RORRd, DstReg).addReg(DstReg); in expand()
1414 buildMI(MBB, MBBI, AVR::BLD, DstReg).addReg(DstReg).addImm(7); in expand()
1421 bool AVRExpandPseudo::expand<AVR::LSLWRd>(Block &MBB, BlockIt MBBI) { in expand()
1428 unsigned OpLo = AVR::ADDRdRr; // ADD Rd, Rd <==> LSL Rd in expand()
1429 unsigned OpHi = AVR::ADCRdRr; // ADC Rd, Rd <==> ROL Rd in expand()
1455 bool AVRExpandPseudo::expand<AVR::LSLWHiRd>(Block &MBB, BlockIt MBBI) { in expand()
1466 buildMI(MBB, MBBI, AVR::ADDRdRr) in expand()
1489 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSLW4Rd()
1492 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSLW4Rd()
1498 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSLW4Rd()
1507 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSLW4Rd()
1516 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSLW4Rd()
1525 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSLW4Rd()
1546 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandLSLW8Rd()
1552 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSLW8Rd()
1573 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandLSLW12Rd()
1578 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSLW12Rd()
1584 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSLW12Rd()
1593 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSLW12Rd()
1605 bool AVRExpandPseudo::expand<AVR::LSLWNRd>(Block &MBB, BlockIt MBBI) { in expand()
1622 bool AVRExpandPseudo::expand<AVR::LSRWRd>(Block &MBB, BlockIt MBBI) { in expand()
1629 unsigned OpLo = AVR::RORRd; in expand()
1630 unsigned OpHi = AVR::LSRRd; in expand()
1654 bool AVRExpandPseudo::expand<AVR::LSRWLoRd>(Block &MBB, BlockIt MBBI) { in expand()
1665 buildMI(MBB, MBBI, AVR::LSRRd) in expand()
1687 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSRW4Rd()
1690 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSRW4Rd()
1696 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSRW4Rd()
1705 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSRW4Rd()
1714 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSRW4Rd()
1723 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSRW4Rd()
1744 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandLSRW8Rd()
1750 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSRW8Rd()
1771 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandLSRW12Rd()
1776 buildMI(MBB, MBBI, AVR::SWAPRd) in expandLSRW12Rd()
1782 buildMI(MBB, MBBI, AVR::ANDIRdK) in expandLSRW12Rd()
1791 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSRW12Rd()
1803 bool AVRExpandPseudo::expand<AVR::LSRWNRd>(Block &MBB, BlockIt MBBI) { in expand()
1820 bool AVRExpandPseudo::expand<AVR::RORWRd>(Block &MBB, BlockIt MBBI) { in expand()
1826 bool AVRExpandPseudo::expand<AVR::ROLWRd>(Block &MBB, BlockIt MBBI) { in expand()
1832 bool AVRExpandPseudo::expand<AVR::ASRWRd>(Block &MBB, BlockIt MBBI) { in expand()
1839 unsigned OpLo = AVR::RORRd; in expand()
1840 unsigned OpHi = AVR::ASRRd; in expand()
1864 bool AVRExpandPseudo::expand<AVR::ASRWLoRd>(Block &MBB, BlockIt MBBI) { in expand()
1875 buildMI(MBB, MBBI, AVR::ASRRd) in expand()
1901 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRW7Rd()
1907 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandASRW7Rd()
1912 buildMI(MBB, MBBI, AVR::ADCRdRr) in expandASRW7Rd()
1919 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRW7Rd()
1943 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandASRW8Rd()
1948 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRW8Rd()
1955 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRW8Rd()
1984 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRW14Rd()
1990 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRW14Rd()
1996 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRW14Rd()
2002 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandASRW14Rd()
2008 buildMI(MBB, MBBI, AVR::ADCRdRr) in expandASRW14Rd()
2035 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRW15Rd()
2042 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRW15Rd()
2052 buildMI(MBB, MBBI, AVR::MOVRdRr) in expandASRW15Rd()
2061 bool AVRExpandPseudo::expand<AVR::ASRWNRd>(Block &MBB, BlockIt MBBI) { in expand()
2090 buildMI(MBB, MBBI, AVR::RORRd) in expandLSLB7Rd()
2096 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSLB7Rd()
2102 buildMI(MBB, MBBI, AVR::RORRd) in expandLSLB7Rd()
2117 bool AVRExpandPseudo::expand<AVR::LSLBNRd>(Block &MBB, BlockIt MBBI) { in expand()
2140 buildMI(MBB, MBBI, AVR::ADCRdRr) in expandLSRB7Rd()
2147 buildMI(MBB, MBBI, AVR::EORRdRr) in expandLSRB7Rd()
2153 buildMI(MBB, MBBI, AVR::ADCRdRr) in expandLSRB7Rd()
2169 bool AVRExpandPseudo::expand<AVR::LSRBNRd>(Block &MBB, BlockIt MBBI) { in expand()
2192 buildMI(MBB, MBBI, AVR::BST) in expandASRB6Rd()
2198 buildMI(MBB, MBBI, AVR::ADDRdRr) // LSL Rd <==> ADD Rd, Rd in expandASRB6Rd()
2203 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRB6Rd()
2208 buildMI(MBB, MBBI, AVR::BLD) in expandASRB6Rd()
2229 buildMI(MBB, MBBI, AVR::ADDRdRr) in expandASRB7Rd()
2235 buildMI(MBB, MBBI, AVR::SBCRdRr) in expandASRB7Rd()
2251 bool AVRExpandPseudo::expand<AVR::ASRBNRd>(Block &MBB, BlockIt MBBI) { in expand()
2265 template <> bool AVRExpandPseudo::expand<AVR::SEXT>(Block &MBB, BlockIt MBBI) { in expand()
2289 buildMI(MBB, MBBI, AVR::MOVRdRr) in expand()
2294 auto MOV = buildMI(MBB, MBBI, AVR::MOVRdRr) in expand()
2301 buildMI(MBB, MBBI, AVR::ADDRdRr) // LSL Rd <==> ADD Rd, Rr in expand()
2307 buildMI(MBB, MBBI, AVR::SBCRdRr) in expand()
2322 template <> bool AVRExpandPseudo::expand<AVR::ZEXT>(Block &MBB, BlockIt MBBI) { in expand()
2341 buildMI(MBB, MBBI, AVR::MOVRdRr) in expand()
2347 buildMI(MBB, MBBI, AVR::EORRdRr) in expand()
2360 bool AVRExpandPseudo::expand<AVR::SPREAD>(Block &MBB, BlockIt MBBI) { in expand()
2366 unsigned OpLo = AVR::INRdA; in expand()
2367 unsigned OpHi = AVR::INRdA; in expand()
2387 bool AVRExpandPseudo::expand<AVR::SPWRITE>(Block &MBB, BlockIt MBBI) { in expand()
2396 buildMI(MBB, MBBI, AVR::INRdA) in expand()
2397 .addReg(AVR::R0, RegState::Define) in expand()
2401 buildMI(MBB, MBBI, AVR::BCLRs).addImm(0x07).setMIFlags(Flags); in expand()
2403 buildMI(MBB, MBBI, AVR::OUTARr) in expand()
2408 buildMI(MBB, MBBI, AVR::OUTARr) in expand()
2410 .addReg(AVR::R0, RegState::Kill) in expand()
2413 buildMI(MBB, MBBI, AVR::OUTARr) in expand()
2431 EXPAND(AVR::ADDWRdRr); in expandMI()
2432 EXPAND(AVR::ADCWRdRr); in expandMI()
2433 EXPAND(AVR::SUBWRdRr); in expandMI()
2434 EXPAND(AVR::SUBIWRdK); in expandMI()
2435 EXPAND(AVR::SBCWRdRr); in expandMI()
2436 EXPAND(AVR::SBCIWRdK); in expandMI()
2437 EXPAND(AVR::ANDWRdRr); in expandMI()
2438 EXPAND(AVR::ANDIWRdK); in expandMI()
2439 EXPAND(AVR::ORWRdRr); in expandMI()
2440 EXPAND(AVR::ORIWRdK); in expandMI()
2441 EXPAND(AVR::EORWRdRr); in expandMI()
2442 EXPAND(AVR::COMWRd); in expandMI()
2443 EXPAND(AVR::NEGWRd); in expandMI()
2444 EXPAND(AVR::CPWRdRr); in expandMI()
2445 EXPAND(AVR::CPCWRdRr); in expandMI()
2446 EXPAND(AVR::LDIWRdK); in expandMI()
2447 EXPAND(AVR::LDSWRdK); in expandMI()
2448 EXPAND(AVR::LDWRdPtr); in expandMI()
2449 EXPAND(AVR::LDWRdPtrPi); in expandMI()
2450 EXPAND(AVR::LDWRdPtrPd); in expandMI()
2451 case AVR::LDDWRdYQ: //: FIXME: remove this once PR13375 gets fixed in expandMI()
2452 EXPAND(AVR::LDDWRdPtrQ); in expandMI()
2453 EXPAND(AVR::LPMWRdZ); in expandMI()
2454 EXPAND(AVR::LPMWRdZPi); in expandMI()
2455 EXPAND(AVR::ELPMBRdZ); in expandMI()
2456 EXPAND(AVR::ELPMWRdZ); in expandMI()
2457 EXPAND(AVR::ELPMBRdZPi); in expandMI()
2458 EXPAND(AVR::ELPMWRdZPi); in expandMI()
2459 EXPAND(AVR::AtomicLoad8); in expandMI()
2460 EXPAND(AVR::AtomicLoad16); in expandMI()
2461 EXPAND(AVR::AtomicStore8); in expandMI()
2462 EXPAND(AVR::AtomicStore16); in expandMI()
2463 EXPAND(AVR::AtomicFence); in expandMI()
2464 EXPAND(AVR::STSWKRr); in expandMI()
2465 EXPAND(AVR::STWPtrRr); in expandMI()
2466 EXPAND(AVR::STWPtrPiRr); in expandMI()
2467 EXPAND(AVR::STWPtrPdRr); in expandMI()
2468 EXPAND(AVR::STDWPtrQRr); in expandMI()
2469 EXPAND(AVR::STDSPQRr); in expandMI()
2470 EXPAND(AVR::STDWSPQRr); in expandMI()
2471 EXPAND(AVR::INWRdA); in expandMI()
2472 EXPAND(AVR::OUTWARr); in expandMI()
2473 EXPAND(AVR::PUSHWRr); in expandMI()
2474 EXPAND(AVR::POPWRd); in expandMI()
2475 EXPAND(AVR::ROLBRd); in expandMI()
2476 EXPAND(AVR::RORBRd); in expandMI()
2477 EXPAND(AVR::LSLWRd); in expandMI()
2478 EXPAND(AVR::LSRWRd); in expandMI()
2479 EXPAND(AVR::RORWRd); in expandMI()
2480 EXPAND(AVR::ROLWRd); in expandMI()
2481 EXPAND(AVR::ASRWRd); in expandMI()
2482 EXPAND(AVR::LSLWHiRd); in expandMI()
2483 EXPAND(AVR::LSRWLoRd); in expandMI()
2484 EXPAND(AVR::ASRWLoRd); in expandMI()
2485 EXPAND(AVR::LSLWNRd); in expandMI()
2486 EXPAND(AVR::LSRWNRd); in expandMI()
2487 EXPAND(AVR::ASRWNRd); in expandMI()
2488 EXPAND(AVR::LSLBNRd); in expandMI()
2489 EXPAND(AVR::LSRBNRd); in expandMI()
2490 EXPAND(AVR::ASRBNRd); in expandMI()
2491 EXPAND(AVR::SEXT); in expandMI()
2492 EXPAND(AVR::ZEXT); in expandMI()
2493 EXPAND(AVR::SPREAD); in expandMI()
2494 EXPAND(AVR::SPWRITE); in expandMI()