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Searched refs:DestVT (Results 1 – 20 of 20) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1207 MVT DestVT = VA.getLocVT(); in processCallArgs() local
1215 MVT DestVT = VA.getLocVT(); in processCallArgs() local
1748 MVT DestVT = VA.getValVT(); in selectRet() local
1750 if (RVVT != DestVT) { in selectRet()
1780 EVT SrcVT, DestVT; in selectTrunc() local
1786 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in selectTrunc()
1818 MVT DestVT = DestEVT.getSimpleVT(); in selectIntExt() local
1863 if ((DestVT != MVT::i32) && (DestVT != MVT::i16)) in emitIntSExt()
1898 if (((DestVT != MVT::i8) && (DestVT != MVT::i16) && (DestVT != MVT::i32)) || in emitIntExt()
1918 MVT DestVT = DestEVT.getSimpleVT(); in selectDivRem() local
[all …]
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DCallingConvEmitter.cpp223 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local
224 O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n"; in EmitAction()
225 if (MVT(DestVT).isFloatingPoint()) { in EmitAction()
237 MVT::SimpleValueType DestVT = getValueType(DestTy); in EmitAction() local
238 O << IndentStr << "LocVT = " << getEnumName(DestVT) << ";\n"; in EmitAction()
239 if (MVT(DestVT).isFloatingPoint()) { in EmitAction()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1275 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp()
1443 MVT DestVT = VA.getLocVT(); in processCallArgs() local
1449 ArgVT = DestVT; in processCallArgs()
1455 MVT DestVT = VA.getLocVT(); in processCallArgs() local
1461 ArgVT = DestVT; in processCallArgs()
1510 MVT DestVT = VA.getValVT(); in finishCall() local
1511 MVT CopyVT = DestVT; in finishCall()
1765 if (RVVT != DestVT) { in SelectRet()
1814 if (DestVT != MVT::i32 && DestVT != MVT::i64) in PPCEmitIntExt()
1834 } else if (DestVT == MVT::i32) { in PPCEmitIntExt()
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H A DPPCISelLowering.h801 bool isFPExtFree(EVT DestVT, EVT SrcVT) const override;
H A DPPCISelLowering.cpp7790 if (DestVT == MVT::Other) DestVT = Op.getValueType(); in BuildIntrinsicOp()
7791 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
7799 EVT DestVT = MVT::Other) { in BuildIntrinsicOp() argument
7800 if (DestVT == MVT::Other) DestVT = LHS.getValueType(); in BuildIntrinsicOp()
7801 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
7809 EVT DestVT = MVT::Other) { in BuildIntrinsicOp() argument
7810 if (DestVT == MVT::Other) DestVT = Op0.getValueType(); in BuildIntrinsicOp()
7811 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
14161 bool PPCTargetLowering::isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() argument
14162 assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() && in isFPExtFree()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2840 MVT DestVT; in selectFPToInt() local
2841 if (!isTypeLegal(I->getType(), DestVT) || DestVT.isVector()) in selectFPToInt()
2873 MVT DestVT; in selectIntToFP() local
2880 assert((DestVT == MVT::f32 || DestVT == MVT::f64) && in selectIntToFP()
3907 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8 && in selectTrunc()
3956 assert((DestVT == MVT::i8 || DestVT == MVT::i16 || DestVT == MVT::i32 || in emiti1Ext()
3960 if (DestVT == MVT::i8 || DestVT == MVT::i16) in emiti1Ext()
4372 if (((DestVT != MVT::i8) && (DestVT != MVT::i16) && in emitIntExt()
4373 (DestVT != MVT::i32) && (DestVT != MVT::i64)) || in emitIntExt()
4408 if (DestVT == MVT::i8 || DestVT == MVT::i16) in emitIntExt()
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H A DAArch64ISelLowering.cpp6012 EVT DestVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumSrcElts); in ReconstructShuffle() local
6019 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6035 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6041 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6046 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6049 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6053 Src.ShuffleVec = DAG.getNode(AArch64ISD::EXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1765 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectBinaryIntOp()
1974 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local
1977 ArgVT = DestVT; in ProcessCallArgs()
1983 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local
1986 ArgVT = DestVT; in ProcessCallArgs()
2149 MVT DestVT = VA.getValVT(); in SelectRet() local
2151 if (RVVT != DestVT) { in SelectRet()
2592 EVT SrcVT, DestVT; in SelectTrunc() local
2598 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectTrunc()
2612 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in ARMEmitIntExt()
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H A DARMISelLowering.cpp6668 EVT DestVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumSrcElts); in ReconstructShuffle() local
6676 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6692 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6698 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6703 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6706 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
6709 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp904 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT() local
905 RegisterVT = DestVT; in getVectorTypeBreakdownMVT()
906 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT()
907 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdownMVT()
1331 MVT DestVT = getRegisterType(Context, NewVT); in getVectorTypeBreakdown() local
1332 RegisterVT = DestVT; in getVectorTypeBreakdown()
1339 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown()
1340 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdown()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1972 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
1973 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
1978 void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in setOperationPromotedToType() argument
1980 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
2341 virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const { in isFPExtFree() argument
2342 assert(SrcVT.isFloatingPoint() && DestVT.isFloatingPoint() && in isFPExtFree()
2350 virtual bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() argument
2351 assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() && in isFPExtFoldable()
2353 return isFPExtFree(DestVT, SrcVT); in isFPExtFoldable()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp158 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
866 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local
867 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
893 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps()
1738 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert()
1739 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
2419 if (DestVT == MVT::f32) in ExpandLegalINT_TO_FP()
2426 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
2473 return DAG.getNode(OpToUse, dl, DestVT, in PromoteLegalINT_TO_FP()
2487 EVT NewOutTy = DestVT; in PromoteLegalFP_TO_INT()
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H A DSelectionDAGBuilder.cpp3062 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N)); in visitTrunc()
3088 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitFPTrunc() local
3089 setValue(&I, DAG.getNode(ISD::FP_ROUND, dl, DestVT, N, in visitFPTrunc()
3140 setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT)); in visitPtrToInt()
3149 setValue(&I, DAG.getZExtOrTrunc(N, getCurSDLoc(), DestVT)); in visitIntToPtr()
3160 if (DestVT != N.getValueType()) in visitBitCast()
3162 DestVT, N)); // convert types. in visitBitCast()
3178 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitAddrSpaceCast() local
5539 EVT DestVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local
5540 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt); in visitIntrinsicCall()
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H A DLegalizeTypes.cpp883 EVT DestVT) { in CreateStackStoreLoad() argument
887 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT); in CreateStackStoreLoad()
892 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo()); in CreateStackStoreLoad()
H A DLegalizeVectorTypes.cpp314 EVT DestVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_UnaryOp() local
333 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op); in ScalarizeVecRes_UnaryOp()
1518 EVT DestVT = N->getValueType(0); in SplitVecRes_ExtendOp() local
1520 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT); in SplitVecRes_ExtendOp()
1537 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) { in SplitVecRes_ExtendOp()
H A DLegalizeTypes.h218 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2461 EVT DestVT = Op.getValueType(); in LowerUINT_TO_FP() local
2474 if (DestVT == MVT::f32) in LowerUINT_TO_FP()
2477 assert(DestVT == MVT::f64); in LowerUINT_TO_FP()
2488 EVT DestVT = Op.getValueType(); in LowerSINT_TO_FP() local
2501 if (DestVT == MVT::f32) in LowerSINT_TO_FP()
2504 assert(DestVT == MVT::f64); in LowerSINT_TO_FP()
3791 EVT DestVT = N->getValueType(0); in PerformDAGCombine() local
3798 if (DestVT.isVector()) { in PerformDAGCombine()
3802 unsigned NElts = DestVT.getVectorNumElements(); in PerformDAGCombine()
3805 EVT DestEltVT = DestVT.getVectorElementType(); in PerformDAGCombine()
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H A DSIISelLowering.h202 bool isFPExtFoldable(unsigned Opcode, EVT DestVT, EVT SrcVT) const override;
H A DSIISelLowering.cpp726 EVT DestVT, EVT SrcVT) const { in isFPExtFoldable() argument
729 DestVT.getScalarType() == MVT::f32 && !Subtarget->hasFP32Denormals() && in isFPExtFoldable()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp20372 MVT DestVT = VT == MVT::v2i64 ? MVT::v4i32 : VT; in LowerEXTEND_VECTOR_INREG() local
20374 unsigned DestWidth = DestVT.getScalarSizeInBits(); in LowerEXTEND_VECTOR_INREG()
20378 unsigned DestElts = DestVT.getVectorNumElements(); in LowerEXTEND_VECTOR_INREG()
20387 Curr = DAG.getBitcast(DestVT, Curr); in LowerEXTEND_VECTOR_INREG()
20390 SignExt = DAG.getNode(X86ISD::VSRAI, dl, DestVT, Curr, in LowerEXTEND_VECTOR_INREG()