Lines Matching refs:DestVT
158 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
170 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue Op0, EVT DestVT,
172 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned,
174 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned,
866 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local
867 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
893 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps()
899 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps()
1725 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument
1738 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert()
1739 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
1757 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign); in EmitStackConvert()
1760 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2331 EVT DestVT, in ExpandLegalINT_TO_FP() argument
2382 SDValue Result = DAG.getFPExtendOrRound(Sub, dl, DestVT); in ExpandLegalINT_TO_FP()
2388 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2419 if (DestVT == MVT::f32) in ExpandLegalINT_TO_FP()
2426 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
2434 return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg); in ExpandLegalINT_TO_FP()
2442 SDValue SelectionDAGLegalize::PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, in PromoteLegalINT_TO_FP() argument
2473 return DAG.getNode(OpToUse, dl, DestVT, in PromoteLegalINT_TO_FP()
2483 SDValue SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, in PromoteLegalFP_TO_INT() argument
2487 EVT NewOutTy = DestVT; in PromoteLegalFP_TO_INT()
2517 return DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT()