| /llvm-project-15.0.7/llvm/unittests/Transforms/Utils/ |
| H A D | IntegerDivisionTest.cpp | 40 Value *Div = Builder.CreateSDiv(A, B); in TEST() local
70 Value *Div = Builder.CreateUDiv(A, B); in TEST() local
161 Value *Div = Builder.CreateSDiv(A, B); in TEST() local
191 Value *Div = Builder.CreateUDiv(A, B); in TEST() local
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | IntegerDivision.cpp | 432 bool llvm::expandDivision(BinaryOperator *Div) { in expandDivision()
582 bool llvm::expandDivisionUpTo32Bits(BinaryOperator *Div) { in expandDivisionUpTo32Bits()
630 bool llvm::expandDivisionUpTo64Bits(BinaryOperator *Div) { in expandDivisionUpTo64Bits()
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| H A D | ScalarEvolutionExpander.cpp | 319 const SCEV *Div = SE.getConstant(CI); in FactorOutConstant() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 315 int64_t Div = 0; in generateInstSeq() local
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPrepareFunctions.cpp | 216 Value *Div = IRB.CreateUDiv(Mul, UMulFunc->getArg(0)); in buildUMulWithOverflowFunc() local
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | DivRemPairs.cpp | 58 Instruction *Div; in matchExpandedRem() local
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | fp-floatcontrol-pragma.cpp | 354 float Div(float x, float y, float z) { in Div() function
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | LoopCacheAnalysis.cpp | 433 const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize); in delinearize() local
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| H A D | BranchProbabilityInfo.cpp | 511 uint32_t Div = static_cast<uint32_t>( in calcMetadataWeights() local
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| H A D | ScalarEvolution.cpp | 1810 if (auto *Div = dyn_cast<SCEVUDivExpr>(Op)) in getZeroExtendExpr() local
3443 const SCEV *Div = getUDivExpr(Op, RHSC); in getUDivExpr() local
9726 if (const SCEVUDivExpr *Div = dyn_cast<SCEVUDivExpr>(V)) { in computeSCEVAtScope() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1662 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq); in LowerDIVREM24() local
1845 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); in LowerUDIVREM64() local
1998 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM() local
2022 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y, Flags); in LowerFREM() local
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| H A D | AMDGPUCodeGenPrepare.cpp | 988 Value *Div = Builder.CreateAdd(IQ, JQ); in expandDivRem24Impl() local
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| H A D | AMDGPULegalizerInfo.cpp | 2113 auto Div = B.buildFDiv(Ty, Src0Reg, Src1Reg, Flags); in legalizeFrem() local
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 486 Div, ///< Signed division. enumerator
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| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCWin64EH.cpp | 255 const MCSymbol *RHS, int Div) { in GetSubDivExpr()
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | ConstantFold.cpp | 2233 Constant *Div = in ConstantFoldGetElementPtr() local
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| H A D | AsmWriter.cpp | 1321 } else if (const PossiblyExactOperator *Div = in WriteOptimizationInfo() local
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 273 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); in visitMul() local
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| H A D | InstCombineCompares.cpp | 2500 BinaryOperator *Div, in foldICmpDivConstant()
3981 Instruction *Div; in foldMultiplicationOverflowCheck() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 7859 static bool ConvertOmodDiv(int64_t &Div) { in ConvertOmodDiv()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 7219 const unsigned Div = std::min<unsigned>(MaxSize, Alignment); in coerceToIntArrayWithLimit() local
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12128 Register Div = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 21166 SDValue Div = DAG.getNode(Op.getOpcode(), dl, WidenedVT, Op0, Op1); in LowerFixedLengthVectorIntDivideToSVE() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 20441 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 15327 SDValue Div = DAG.getNode(ISD::FDIV, SDLoc(N1), VT, Rsqrt, Y); in visitFDIV() local
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