Home
last modified time | relevance | path

Searched refs:TargetLoweringOpt (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3539 struct TargetLoweringOpt { struct
3546 explicit TargetLoweringOpt(SelectionDAG &InDAG, in TargetLoweringOpt() argument
3576 TargetLoweringOpt &TLO) const; argument
3580 TargetLoweringOpt &TLO) const;
3596 TargetLoweringOpt &TLO) const;
3613 TargetLoweringOpt &TLO, unsigned Depth = 0,
3619 KnownBits &Known, TargetLoweringOpt &TLO,
3683 const TargetLoweringOpt &TLO) const { in shouldSimplifyDemandedVectorElts()
3749 APInt &KnownZero, TargetLoweringOpt &TLO, unsigned Depth = 0) const;
3760 TargetLoweringOpt &TLO,
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.h1119 TargetLoweringOpt &TLO) const override;
1139 TargetLoweringOpt &TLO,
1145 TargetLoweringOpt &TLO,
1152 TargetLoweringOpt &TLO,
H A DX86ISelLowering.cpp36670 TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant()
40837 TargetLowering::TargetLoweringOpt &TLO, unsigned Depth) const { in SimplifyDemandedVectorEltsForTargetShuffle()
40904 TargetLoweringOpt &TLO, unsigned Depth) const { in SimplifyDemandedVectorEltsForTargetNode()
41617 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, in SimplifyDemandedBitsForTargetNode()
44434 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in combineVSelectToBLENDV()
/llvm-project-15.0.7/llvm/unittests/CodeGen/
H A DAArch64SelectionDAGTest.cpp179 TargetLowering::TargetLoweringOpt TLO(*DAG, false, false); in TEST_F()
206 TargetLowering::TargetLoweringOpt TLO(*DAG, false, false); in TEST_F()
229 TargetLowering::TargetLoweringOpt TLO(*DAG, false, false); in TEST_F()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h118 const TargetLoweringOpt &TLO) const override;
H A DWebAssemblyISelLowering.cpp911 SDValue Op, const TargetLoweringOpt &TLO) const { in shouldSimplifyDemandedVectorElts()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.h437 TargetLoweringOpt &TLO,
520 TargetLoweringOpt &TLO) const override;
H A DARMISelLowering.cpp19896 TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant()
19978 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, in SimplifyDemandedBitsForTargetNode()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h515 TargetLoweringOpt &TLO) const override;
1142 TargetLoweringOpt &TLO,
H A DAArch64ISelLowering.cpp1736 TargetLowering::TargetLoweringOpt &TLO, in optimizeLogicalImm()
1831 TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant()
17535 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in performTBISimplification()
21907 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, in SimplifyDemandedBitsForTargetNode()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h415 TargetLoweringOpt &TLO) const override;
H A DRISCVISelLowering.cpp9436 TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant()
/llvm-project-15.0.7/llvm/docs/
H A DXRayExample.rst93 …vm::APInt const&, llvm::APInt&, llvm::APInt&, llvm::TargetLowering::TargetLoweringOpt&, unsigned i…
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp502 TargetLoweringOpt &TLO) const { in ShrinkDemandedConstant()
542 TargetLoweringOpt &TLO) const { in ShrinkDemandedConstant()
555 TargetLoweringOpt &TLO) const { in ShrinkDemandedOp()
600 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
616 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
631 TargetLoweringOpt &TLO, in SimplifyDemandedBits()
1062 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, in SimplifyDemandedBits()
2725 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedVectorElts()
2789 APInt &KnownZero, TargetLoweringOpt &TLO, unsigned Depth, in SimplifyDemandedVectorElts()
3499 TargetLoweringOpt &TLO, unsigned Depth) const { in SimplifyDemandedVectorEltsForTargetNode()
[all …]
H A DDAGCombiner.cpp309 void CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &TLO);
324 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
858 CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &TLO) { in CommitTargetLoweringOpt()
1201 CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &TLO) { in CommitTargetLoweringOpt()
1227 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedBits()
1246 TargetLowering::TargetLoweringOpt TLO(DAG, LegalTypes, LegalOperations); in SimplifyDemandedVectorElts()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1604 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1620 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp4121 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()