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Searched refs:NumDefs (Results 1 – 25 of 42) sorted by relevance

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/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DStackMaps.h174 NumDefs = MI->getNumDefs(); in StatepointOpers()
178 unsigned getIDPos() const { return NumDefs + IDPos; } in getIDPos()
181 unsigned getNBytesPos() const { return NumDefs + NBytesPos; } in getNBytesPos()
184 unsigned getNCallArgsPos() const { return NumDefs + NCallArgsPos; } in getNCallArgsPos()
189 return MI->getOperand(NumDefs + NCallArgsPos).getImm() + MetaEnd + NumDefs; in getVarIdx()
204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } in getID()
208 return MI->getOperand(NumDefs + NBytesPos).getImm(); in getNumPatchBytes()
213 return MI->getOperand(NumDefs + CallTargetPos); in getCallTarget()
248 unsigned NumDefs; variable
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h379 const unsigned NumDefs = MI.getNumOperands() - 1; in tryFoldUnmergeCast() local
412 for (unsigned I = 0; I != NumDefs; ++I) { in tryFoldUnmergeCast()
443 if (Idx < NumDefs) in tryFoldUnmergeCast()
785 unsigned NumDefs = MI.getNumDefs(); in tryCombineUnmergeDefs() local
788 SmallBitVector DeadDefs(NumDefs); in tryCombineUnmergeDefs()
817 unsigned NumDefs = MI.getNumDefs(); in tryCombineUnmergeValues() local
867 for (unsigned I = 0; I != NumDefs; ++I) { in tryCombineUnmergeValues()
896 if (NumMergeRegs < NumDefs) { in tryCombineUnmergeValues()
897 if (NumDefs % NumMergeRegs != 0) in tryCombineUnmergeValues()
951 } else if (NumMergeRegs > NumDefs) { in tryCombineUnmergeValues()
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterInlineAsm.cpp334 unsigned NumDefs = 0; in emitInlineAsm() local
335 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in emitInlineAsm()
336 ++NumDefs) in emitInlineAsm()
337 assert(NumDefs != MI->getNumOperands()-2 && "No asm string?"); in emitInlineAsm()
339 assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?"); in emitInlineAsm()
342 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in emitInlineAsm()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp42 NumDefs = OutDI->getNumArgs(); in CGIOperandList()
62 if (i < NumDefs) { in CGIOperandList()
66 ArgInit = InDI->getArg(i-NumDefs); in CGIOperandList()
67 ArgName = InDI->getArgNameStr(i-NumDefs); in CGIOperandList()
112 if (i < NumDefs) in CGIOperandList()
143 --NumDefs; in CGIOperandList()
293 if (DestOp.first >= Ops.NumDefs) in ParseConstraint()
297 if (SrcOp.first < Ops.NumDefs) in ParseConstraint()
H A DInstrDocsEmitter.cpp152 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs()
H A DCodeGenInstruction.h146 unsigned NumDefs; variable
H A DGlobalISelEmitter.cpp4769 const unsigned NumDefs = DstI->Operands.NumDefs; in importExplicitDefRenderers() local
4770 if (NumDefs == 0) in importExplicitDefRenderers()
4777 if (Dst->getExtTypes().size() < NumDefs) in importExplicitDefRenderers()
4782 for (unsigned I = 1; I < NumDefs; ++I) { in importExplicitDefRenderers()
4893 unsigned DstINumUses = OrigDstI->Operands.size() - OrigDstI->Operands.NumDefs; in importExplicitUseRenderers()
4901 unsigned NumResults = OrigDstI->Operands.NumDefs; in importExplicitUseRenderers()
4928 unsigned InstOpNo = DstI->Operands.NumDefs + I; in importExplicitUseRenderers()
5059 if (Inst.Operands.NumDefs > 1) in inferRegClassFromPattern()
5249 unsigned DstNumDefs = DstI.Operands.NumDefs, in runOnPattern()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp964 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local
975 NumDefs = NumResults; in EmitMachineNode()
979 NumDefs = NumResults; in EmitMachineNode()
987 bool HasPhysRegOuts = NumResults > NumDefs && in EmitMachineNode()
1048 bool HasOptPRefs = NumDefs > NumResults; in EmitMachineNode()
1051 unsigned NumSkip = HasOptPRefs ? NumDefs - NumResults : 0; in EmitMachineNode()
1053 AddOperand(MIB, Node->getOperand(i), i-NumSkip+NumDefs, &II, in EmitMachineNode()
1090 for (unsigned i = NumDefs; i < NumResults; ++i) { in EmitMachineNode()
1091 Register Reg = II.getImplicitDefs()[i - NumDefs]; in EmitMachineNode()
1131 if (Opc == TargetOpcode::STATEPOINT && NumDefs > 0) { in EmitMachineNode()
[all …]
H A DScheduleDAGRRList.cpp2130 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
2131 for (unsigned i = 0; i != NumDefs; ++i) { in MayReduceRegPressure()
2176 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
2177 for (unsigned i = 0; i != NumDefs; ++i) { in RegPressureDiff()
2305 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2306 for (unsigned i = 0; i != NumDefs; ++i) { in unscheduledNode()
2322 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2323 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in unscheduledNode()
2893 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
2905 for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) { in canClobberPhysRegDefs()
[all …]
/llvm-project-15.0.7/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagOperands.cpp81 i < I.Operands.NumDefs); in makeOperandList()
92 NewValue->add(I.Operands[i].Name, i, i < I.Operands.NumDefs); in makeOperandList()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp715 unsigned NumDefs = MI->getDesc().getNumDefs(); in insertFaultingInstr() local
716 assert(NumDefs <= 1 && "other cases unhandled!"); in insertFaultingInstr()
719 if (NumDefs != 0) { in insertFaultingInstr()
721 assert(NumDefs == 1 && "expected exactly one def!"); in insertFaultingInstr()
H A DFixupStatepointCallerSaved.cpp483 unsigned NumDefs = MI.getNumDefs(); in rewriteStatepoint() local
484 for (unsigned I = 0; I < NumDefs; ++I) { in rewriteStatepoint()
516 for (unsigned I = NumDefs; I < MI.getNumOperands(); ++I) { in rewriteStatepoint()
531 assert(OldDef < NumDefs); in rewriteStatepoint()
H A DMachineCSE.cpp611 unsigned NumDefs = MI.getNumDefs(); in ProcessBlockCSE() local
613 for (unsigned i = 0, e = MI.getNumOperands(); NumDefs && i != e; ++i) { in ProcessBlockCSE()
631 --NumDefs; in ProcessBlockCSE()
656 --NumDefs; in ProcessBlockCSE()
H A DMachineInstr.cpp699 unsigned NumDefs = MCID->getNumDefs(); in getNumExplicitDefs() local
701 return NumDefs; in getNumExplicitDefs()
703 for (unsigned I = NumDefs, E = getNumOperands(); I != E; ++I) { in getNumExplicitDefs()
707 ++NumDefs; in getNumExplicitDefs()
709 return NumDefs; in getNumExplicitDefs()
1107 unsigned NumDefs = getNumDefs(); in findTiedOperandIdx() local
1108 for (unsigned CurDefIdx = 0; CurDefIdx < NumDefs; ++CurDefIdx) { in findTiedOperandIdx()
H A DPeepholeOptimizer.cpp886 unsigned NumDefs; ///< Number of defs in the bitcast. member in __anon4a9001390211::UncoalescableRewriter
890 NumDefs = MI.getDesc().getNumDefs(); in UncoalescableRewriter()
900 if (CurrentSrcIdx == NumDefs) in getNextRewritableSource()
905 if (CurrentSrcIdx == NumDefs) in getNextRewritableSource()
H A DTargetInstrInfo.cpp497 unsigned NumDefs = 0; in foldPatchpoint() local
499 std::tie(NumDefs, StartIdx) = TII.getPatchpointUnfoldableRange(MI); in foldPatchpoint()
506 if (Op < NumDefs) { in foldPatchpoint()
548 assert(TiedTo < NumDefs && "Bad tied operand"); in foldPatchpoint()
H A DMachineLICM.cpp1086 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() local
1087 for (unsigned i = 0, e = MI.getNumOperands(); NumDefs && i != e; ++i) { in IsCheapInstruction()
1091 --NumDefs; in IsCheapInstruction()
/llvm-project-15.0.7/llvm/unittests/CodeGen/
H A DMachineInstrTest.cpp51 unsigned char NumDefs = 1; in TEST() local
56 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
122 unsigned char NumDefs = 1; in TEST() local
127 0, NumOps, NumDefs, 0, 0, 1ULL << MCID::HasOptionalDef, in TEST()
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCInstrDesc.cpp43 for (int i = 0, e = NumDefs; i != e; ++i) in hasDefOfPhysReg()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h201 unsigned char NumDefs; // Num of args that are definitions variable
245 unsigned getNumDefs() const { return NumDefs; } in getNumDefs()
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBTFDebug.cpp1295 unsigned NumDefs = 0; in beginInstruction() local
1296 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in beginInstruction()
1297 ++NumDefs) in beginInstruction()
1301 const char *AsmStr = MI->getOperand(NumDefs).getSymbolName(); in beginInstruction()
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp524 unsigned NumDefs = Desc.getNumDefs(); in clearsSuperRegisters() local
526 assert(Mask.getBitWidth() == NumDefs + NumImplicitDefs && in clearsSuperRegisters()
557 for (unsigned I = 0, E = NumDefs; I < E; ++I) { in clearsSuperRegisters()
566 Mask.setBit(NumDefs + I); in clearsSuperRegisters()
H A DX86BaseInfo.h1056 unsigned NumDefs = Desc.getNumDefs(); in getOperandBias() local
1058 switch (NumDefs) { in getOperandBias()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp455 SmallVector<Register, 8> UnmergeDefs(NumDefs); in buildWidenedRemergeToDst()
457 for (unsigned I = 1; I != NumDefs; ++I) in buildWidenedRemergeToDst()
3697 unsigned NumDefs = MI.getNumDefs(); in fewerElementsVectorMultiEltType() local
3705 for (unsigned i = 0; i < NumDefs; ++i) { in fewerElementsVectorMultiEltType()
3747 for (unsigned i = 0; i < NumDefs; ++i) in fewerElementsVectorMultiEltType()
3750 for (unsigned i = 0; i < NumDefs; ++i) in fewerElementsVectorMultiEltType()
3764 unsigned NumDefs = MI.getNumDefs(); in fewerElementsVectorPhi() local
5073 unsigned NumDefs = MI.getNumExplicitDefs(); in narrowScalarAddSub() local
5074 Register Src1 = MI.getOperand(NumDefs).getReg(); in narrowScalarAddSub()
5077 if (NumDefs == 2) in narrowScalarAddSub()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp190 unsigned NumDefs = 0; in evaluate() local
196 NumDefs++; in evaluate()
200 if (NumDefs == 0) in evaluate()

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