| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12100 return DAG.getBitcast( in lowerShuffleWithPSHUFB() 12932 return DAG.getBitcast( in lowerShuffleAsBlend() 13495 return DAG.getBitcast( in lowerShuffleAsByteRotate() 13941 return DAG.getBitcast( in lowerShuffleAsSpecificZeroOrAnyExtend() 13954 return DAG.getBitcast( in lowerShuffleAsSpecificZeroOrAnyExtend() 14000 return DAG.getBitcast( in lowerShuffleAsSpecificZeroOrAnyExtend() 14814 return DAG.getBitcast( in lowerShuffleAsPermuteAndUnpack() 14976 return DAG.getBitcast( in lowerV2I64Shuffle() 15591 V = DAG.getBitcast( in lowerV8I16GeneralSingleInputShuffle() 15833 V = DAG.getBitcast( in lowerV8I16GeneralSingleInputShuffle() [all …]
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| H A D | X86ISelDAGToDAG.cpp | 965 AllOnes = CurDAG->getBitcast(VT, AllOnes); in PreprocessISelDAG()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 479 return DAG.getBitcast(CastTy, Vec); in opCastElem() 545 ElemIdx = DAG.getBitcast(MVT::i32, ElemIdx); in convertToByteIndex() 566 Idx = DAG.getBitcast(MVT::i32, Idx); in getIndexInWord32() 662 return DAG.getBitcast(VecTy, S); in buildHvxVectorReg() 1126 return DAG.getBitcast(ResTy, W0); in extractHvxSubvectorReg() 1131 return DAG.getBitcast(ResTy, WW); in extractHvxSubvectorReg() 1258 SDValue V = DAG.getBitcast(MVT::i32, SubV); in insertHvxSubvectorReg() 1402 return DAG.getBitcast(ResTy, Collect); in compressHvxPred() 1458 return DAG.getBitcast(VecTy, Splat); in LowerHvxSplatVector() 1591 DAG.getBitcast(MVT::i16, ValV), IdxV); in LowerHvxInsertElement() [all …]
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| H A D | HexagonISelLowering.cpp | 234 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn() 483 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall() 2256 SDValue T0 = DAG.getBitcast(MVT::i32, Op0); in LowerVECTOR_SHUFFLE() 2258 return DAG.getBitcast(VecTy, T1); in LowerVECTOR_SHUFFLE() 2285 return DAG.getBitcast(VecTy, T1); in LowerVECTOR_SHUFFLE() 2448 return DAG.getBitcast(VecTy, N); in buildVector32() 2491 return DAG.getBitcast(MVT::v4i8, R); in buildVector32() 2547 return DAG.getBitcast(VecTy, V0); in buildVector64() 2626 VecV = DAG.getBitcast(ScalarTy, VecV); in extractVector() 2657 ExtV = DAG.getBitcast(ResTy, ExtV); in extractVector() [all …]
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| H A D | HexagonISelDAGToDAG.cpp | 1215 DAG.getBitcast(SVT, If1), in ppHoistZextI1() 1216 DAG.getBitcast(SVT, If0)); in ppHoistZextI1() 1217 SDValue Ret = DAG.getBitcast(UVT, Sel); in ppHoistZextI1()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1970 DAG.getBitcast(ExtractedVecT, Extract.getOperand(0)), NewIndex); in LowerSIGN_EXTEND_INREG() 2205 Src1 = DAG.getBitcast(VecT, Src1); in LowerBUILD_VECTOR() 2212 Src2 = DAG.getBitcast(VecT, Src2); in LowerBUILD_VECTOR() 2456 return DAG.getBitcast(DstType, NewShuffle); in performVECTOR_SHUFFLECombine() 2690 Lo = DAG.getBitcast(InVT, Lo); in truncateVectorWithNARROW() 2691 Hi = DAG.getBitcast(InVT, Hi); in truncateVectorWithNARROW() 2693 return DAG.getBitcast(DstVT, Res); in truncateVectorWithNARROW()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 15713 return DAG.getBitcast(VT, Src); in FoldIntToFPToInt() 19494 return DAG.getBitcast(VT, Shuf); in combineInsertEltToShuffle() 20184 return DAG.getBitcast(VT, BV); in reduceBuildVecExtToExtBuildVec() 20262 return DAG.getBitcast(VT, Src); in reduceBuildVecTruncToBitCast() 20458 return DAG.getBitcast(VT, Shuf); in reduceBuildVecToShuffleWithZero() 22127 return DAG.getBitcast(VT, in combineShuffleToVectorExtend() 22191 return DAG.getBitcast(VT, N00); in combineTruncationShuffle() 22752 return DAG.getBitcast( in visitVECTOR_SHUFFLE() 22757 return DAG.getBitcast( in visitVECTOR_SHUFFLE() 22818 return DAG.getBitcast( in visitVECTOR_SHUFFLE() [all …]
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| H A D | TargetLowering.cpp | 694 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits() 715 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits() 733 return DAG.getBitcast(DstVT, V); in SimplifyMultipleUseDemandedBits() 836 return DAG.getBitcast(DstVT, Src); in SimplifyMultipleUseDemandedBits() 2249 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits() 2336 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedBits() 3268 return TLO.CombineTo(Op, TLO.DAG.getBitcast(VT, Src)); in SimplifyDemandedVectorElts() 7542 SDValue LoFlt = DAG.getBitcast(DstVT, LoOr); in expandUINT_TO_FP() 7543 SDValue HiFlt = DAG.getBitcast(DstVT, HiOr); in expandUINT_TO_FP() 7676 SDValue OpAsInt = DAG.getBitcast(IntVT, Op); in expandIS_FPCLASS() [all …]
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| H A D | LegalizeFloatTypes.cpp | 1113 RHS = DAG.getBitcast(LVT, RHS); in SoftenFloatOp_FCOPYSIGN() 2141 return DAG.getBitcast(N->getValueType(0), Convert); in PromoteFloatOp_BITCAST() 2330 SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0)); in PromoteFloatRes_BITCAST()
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| H A D | SelectionDAGBuilder.cpp | 439 return DAG.getBitcast(ValueVT, Val); in getCopyFromPartsVector() 689 Val = DAG.getBitcast(IntermediateType, Val); in getCopyToPartsVector() 7992 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall() 7993 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
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| H A D | SelectionDAG.cpp | 2164 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) { in getBitcast() function in SelectionDAG 5652 return getBitcast(VT, getBuildVector(BVVT, DL, Ops)); in FoldConstantArithmetic() 6617 Value = DAG.getBitcast(VT.getScalarType(), Value); in getMemsetValue()
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| H A D | LegalizeIntegerTypes.cpp | 466 InOp = DAG.getBitcast(WideOutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2150 Vec = DAG.getBitcast(MVT::v8i1, Vec); in lowerBUILD_VECTOR() 2157 Vec = DAG.getBitcast(VT, Vec); in lowerBUILD_VECTOR() 2306 return DAG.getBitcast(VT, Splat); in lowerBUILD_VECTOR() 2766 V1 = DAG.getBitcast(IntHalfVT, V1); in lowerVECTOR_SHUFFLE() 2767 V2 = DAG.getBitcast(IntHalfVT, V2); in lowerVECTOR_SHUFFLE() 2796 Add = DAG.getBitcast(ContainerVT, Add); in lowerVECTOR_SHUFFLE() 3178 SDValue BVec = DAG.getBitcast(BVT, Op0); in LowerOperation() 4806 Vec = DAG.getBitcast(VT, Vec); in lowerVectorIntrinsicScalars() 5435 Vec = DAG.getBitcast(VecVT, Vec); in lowerINSERT_SUBVECTOR() 5587 Vec = DAG.getBitcast(VecVT, Vec); in lowerEXTRACT_SUBVECTOR() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5777 Lo = DAG.getBitcast(LoVT, in lowerEXTRACT_VECTOR_ELT() 5780 Hi = DAG.getBitcast(HiVT, in lowerEXTRACT_VECTOR_ELT() 6170 Elt = DAG.getBitcast(MVT::f32, Elt); in getBuildDwordsVector() 6311 Addr = DAG.getBitcast(MVT::i16, Addr); in packImage16bitOpsToDwords() 6317 Addr = DAG.getBitcast(MVT::f32, Addr); in packImage16bitOpsToDwords() 6359 VData = DAG.getBitcast(MVT::v4i32, VData); in lowerImage() 7732 DAG.getBitcast(MVT::i32, in LowerINTRINSIC_W_CHAIN() 7739 DAG.getBitcast(MVT::i32, in LowerINTRINSIC_W_CHAIN() 7743 DAG.getBitcast(MVT::i32, in LowerINTRINSIC_W_CHAIN() 7759 MergedLanes.push_back(DAG.getBitcast( in LowerINTRINSIC_W_CHAIN() [all …]
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| H A D | AMDGPUISelLowering.cpp | 1749 SDValue Rcp64 = DAG.getBitcast(VT, in LowerUDIVREM64() 1769 SDValue Add1 = DAG.getBitcast(VT, in LowerUDIVREM64() 1783 SDValue Add2 = DAG.getBitcast(VT, in LowerUDIVREM64() 1797 SDValue Sub1 = DAG.getBitcast(VT, in LowerUDIVREM64() 1818 SDValue Sub2 = DAG.getBitcast(VT, in LowerUDIVREM64() 1838 SDValue Sub3 = DAG.getBitcast(VT, in LowerUDIVREM64()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 7748 return DAG.getBitcast(VT, Op); in LowerFCOPYSIGN() 7870 Val = DAG.getBitcast(VT8Bit, Val); in LowerCTPOP_PARITY() 9475 return DAG.getBitcast(VT, Shuffle); in ReconstructShuffle() 10146 return DAG.getBitcast(VT, Ins); in GeneratePerfectShuffle() 10440 V0 = DAG.getBitcast(NewVT, V0); in tryWidenMaskForShuffle() 10441 V1 = DAG.getBitcast(NewVT, V1); in tryWidenMaskForShuffle() 10442 return DAG.getBitcast(VT, in tryWidenMaskForShuffle() 10504 V1 = DAG.getBitcast(NewVecTy, V1); in LowerVECTOR_SHUFFLE() 10508 return DAG.getBitcast(VT, V1); in LowerVECTOR_SHUFFLE() 17298 SDValue BC = DAG.getBitcast(BCVT, Op0); in performUzpCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3541 return DAG.getBitcast(MVT::v2i64, in LowerSETCC() 8474 Arrange = DAG.getBitcast(IntermediateVT, Arrange); in LowerINT_TO_FPVector() 9196 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR() 9222 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR() 9847 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0); in LowerROTL() 10854 SDValue BitcastVector = DAG.getBitcast(MVT::v4i32, V1); in LowerINSERT_VECTOR_ELT() 10855 SDValue BitcastLoad = DAG.getBitcast(MVT::i32, V2); in LowerINSERT_VECTOR_ELT() 10859 return DAG.getBitcast(MVT::v4f32, InsVecElt); in LowerINSERT_VECTOR_ELT() 14210 SDValue Conv = DAG.getBitcast(VT, Shuffle); in addShuffleForVecExtend() 14936 SToVLHS = DAG.getBitcast(LHS.getValueType(), SToVLHS); in combineVectorShuffle() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 616 Arg = DAG.getBitcast(RegVT, Arg); in LowerCall() 919 ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue); in LowerFormalArguments() 1053 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 2916 Result = DAG.getBitcast(MVT::f32, Result); in lowerEXTRACT_VECTOR_ELT() 2949 Val = DAG.getBitcast(MVT::i32, Val); in lowerINSERT_VECTOR_ELT()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1507 SDValue getBitcast(EVT VT, SDValue V);
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6481 SDValue Res = DAG.getBitcast(VT8Bit, N->getOperand(0)); in LowerCTPOP() 8597 SDValue BitCast = DAG.getBitcast(MVT::v4f32, Input); in LowerVECTOR_SHUFFLEUsingMovs() 8617 SDValue BitCast = DAG.getBitcast(MVT::v4f32, NewShuffle); in LowerVECTOR_SHUFFLEUsingMovs() 8627 return DAG.getBitcast(VT, NewVec); in LowerVECTOR_SHUFFLEUsingMovs()
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