Lines Matching refs:getBitcast
3541 return DAG.getBitcast(MVT::v2i64, in LowerSETCC()
7464 DAG.getBitcast(MVT::getIntegerVT(ValVT.getSizeInBits()), Arg); in LowerCall_AIX()
8474 Arrange = DAG.getBitcast(IntermediateVT, Arrange); in LowerINT_TO_FPVector()
8957 return DAG.getBitcast(ReqVT, DAG.getConstant(Val, dl, CanonicalVT)); in getCanonicalConstSplat()
9196 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR()
9222 return DAG.getBitcast(Op.getValueType(), SplatNode); in LowerBUILD_VECTOR()
9821 PPCISD::XXSPLTI32DX, DL, MVT::v2i64, DAG.getBitcast(MVT::v2i64, LHS), in lowerToXXSPLTI32DX()
9843 DAG.getVectorShuffle(MVT::v16i8, dl, DAG.getBitcast(MVT::v16i8, N0), in LowerROTL()
9847 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0); in LowerROTL()
9937 LdSplt = DAG.getBitcast(SVOp->getValueType(0), LdSplt); in LowerVECTOR_SHUFFLE()
10854 SDValue BitcastVector = DAG.getBitcast(MVT::v4i32, V1); in LowerINSERT_VECTOR_ELT()
10855 SDValue BitcastLoad = DAG.getBitcast(MVT::i32, V2); in LowerINSERT_VECTOR_ELT()
10859 return DAG.getBitcast(MVT::v4f32, InsVecElt); in LowerINSERT_VECTOR_ELT()
14210 SDValue Conv = DAG.getBitcast(VT, Shuffle); in addShuffleForVecExtend()
14936 SToVLHS = DAG.getBitcast(LHS.getValueType(), SToVLHS); in combineVectorShuffle()
14946 SToVRHS = DAG.getBitcast(RHS.getValueType(), SToVRHS); in combineVectorShuffle()
17247 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE()