| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ShuffleDecodeConstantPool.cpp | 55 UndefElts = APInt(NumMaskElts, 0); in extractConstantMask()
67 UndefElts.setBit(i); in extractConstantMask()
104 UndefElts.setBit(i); in extractConstantMask()
123 APInt UndefElts; in DecodePSHUFBMask() local
133 if (UndefElts[i]) { in DecodePSHUFBMask()
162 APInt UndefElts; in DecodeVPERMILPMask() local
173 if (UndefElts[i]) { in DecodeVPERMILPMask()
198 APInt UndefElts; in DecodeVPERMIL2PMask() local
209 if (UndefElts[i]) { in DecodeVPERMIL2PMask()
252 APInt UndefElts; in DecodeVPPERMMask() local
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| H A D | X86InstCombineIntrinsic.cpp | 931 APInt UndefElts(Width, 0); in instCombineIntrinsic() local
1798 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
1801 UndefElts = UndefElts[0]; in simplifyDemandedVectorEltsIntrinsic()
1842 UndefElts.clearBit(0); in simplifyDemandedVectorEltsIntrinsic()
1868 UndefElts.clearBit(0); in simplifyDemandedVectorEltsIntrinsic()
1869 UndefElts |= UndefElts2[0]; in simplifyDemandedVectorEltsIntrinsic()
1904 UndefElts.clearBit(0); in simplifyDemandedVectorEltsIntrinsic()
1929 UndefElts &= UndefElts2; in simplifyDemandedVectorEltsIntrinsic()
1946 UndefElts &= UndefElts2; in simplifyDemandedVectorEltsIntrinsic()
1995 UndefElts |= LaneElts; in simplifyDemandedVectorEltsIntrinsic()
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| H A D | X86TargetTransformInfo.h | 180 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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| H A D | X86ISelLowering.cpp | 7438 UndefElts = UndefElts.extractBits(NumSubElts, BaseIdx); in getTargetConstantBitsFromNode()
7496 APInt UndefElts; in isConstantSplat() local
8163 APInt UndefElts; in createShuffleMaskFromVSELECT() local
8228 APInt UndefElts; in getFauxShuffleMask() local
29862 APInt UndefElts; in convertShiftLeftToScale() local
37004 APInt UndefElts; in computeKnownBitsForTargetNode() local
42735 APInt UndefElts; in combineBitcast() local
47071 APInt UndefElts; in combineVectorShiftVar() local
47155 APInt UndefElts; in combineVectorShiftImm() local
47176 UndefElts = 0; in combineVectorShiftImm()
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| H A D | X86ISelLowering.h | 1160 APInt &UndefElts,
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86ShuffleDecode.h | 100 void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
124 void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
149 ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
154 ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
158 void DecodeVPERMVMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
162 void DecodeVPERMV3Mask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts,
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| H A D | X86ShuffleDecode.cpp | 292 void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, in DecodePSHUFBMask() argument
296 if (UndefElts[i]) { in DecodePSHUFBMask()
324 void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, in DecodeVPPERMMask() argument
342 if (UndefElts[i]) { in DecodeVPPERMMask()
477 ArrayRef<uint64_t> RawMask, const APInt &UndefElts, in DecodeVPERMILPMask() argument
487 if (UndefElts[i]) { in DecodeVPERMILPMask()
509 if (UndefElts[i]) { in DecodeVPERMIL2PMask()
544 void DecodeVPERMVMask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, in DecodeVPERMVMask() argument
548 if (UndefElts[i]) { in DecodeVPERMVMask()
558 void DecodeVPERMV3Mask(ArrayRef<uint64_t> RawMask, const APInt &UndefElts, in DecodeVPERMV3Mask() argument
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 1187 UndefElts = EltMask; in SimplifyDemandedVectorElts()
1192 UndefElts = EltMask; in SimplifyDemandedVectorElts()
1196 UndefElts = 0; in SimplifyDemandedVectorElts()
1210 UndefElts.setBit(i); in SimplifyDemandedVectorElts()
1219 UndefElts.setBit(i); in SimplifyDemandedVectorElts()
1289 UndefElts = EltMask; in SimplifyDemandedVectorElts()
1368 UndefElts = EltMask; in SimplifyDemandedVectorElts()
1427 UndefElts.setBit(i); in SimplifyDemandedVectorElts()
1430 UndefElts.setBit(i); in SimplifyDemandedVectorElts()
1490 if (UndefElts[i]) in SimplifyDemandedVectorElts()
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| H A D | InstCombineVectorOps.cpp | 561 APInt UndefElts(NumElts, 0); in visitExtractElementInst() local
565 SimplifyDemandedVectorElts(SrcVec, DemandedElts, UndefElts)) in visitExtractElementInst()
572 APInt UndefElts(NumElts, 0); in visitExtractElementInst() local
574 SrcVec, DemandedElts, UndefElts, 0 /* Depth */, in visitExtractElementInst()
1598 APInt UndefElts(VWidth, 0); in visitInsertElementInst() local
1600 if (Value *V = SimplifyDemandedVectorElts(&IE, AllOnesEltMask, UndefElts)) { in visitInsertElementInst()
2640 APInt UndefElts(VWidth, 0); in visitShuffleVectorInst() local
2642 if (Value *V = SimplifyDemandedVectorElts(&SVI, AllOnesEltMask, UndefElts)) { in visitShuffleVectorInst()
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| H A D | InstCombineCalls.cpp | 368 APInt UndefElts(DemandedElts.getBitWidth(), 0); in simplifyMaskedStore() local
370 SimplifyDemandedVectorElts(II.getOperand(0), DemandedElts, UndefElts)) in simplifyMaskedStore()
452 APInt UndefElts(DemandedElts.getBitWidth(), 0); in simplifyMaskedScatter() local
454 SimplifyDemandedVectorElts(II.getOperand(0), DemandedElts, UndefElts)) in simplifyMaskedScatter()
457 SimplifyDemandedVectorElts(II.getOperand(1), DemandedElts, UndefElts)) in simplifyMaskedScatter()
1226 APInt UndefElts(VWidth, 0); in visitCallInst() local
1228 if (Value *V = SimplifyDemandedVectorElts(II, AllOnesEltMask, UndefElts)) { in visitCallInst()
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| H A D | InstructionCombining.cpp | 191 IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, in targetSimplifyDemandedVectorEltsIntrinsic() argument
198 *this, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in targetSimplifyDemandedVectorEltsIntrinsic()
2279 APInt UndefElts(VWidth, 0); in visitGetElementPtrInst() local
2282 UndefElts)) { in visitGetElementPtrInst()
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| H A D | InstCombineInternal.h | 601 APInt &UndefElts, unsigned Depth = 0,
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/ |
| H A D | AArch64SelectionDAGTest.cpp | 283 APInt UndefElts; in TEST_F() local
285 EXPECT_FALSE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
289 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
307 APInt UndefElts; in TEST_F() local
313 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
327 APInt UndefElts; in TEST_F() local
329 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
333 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
351 APInt UndefElts; in TEST_F() local
353 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F()
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| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | isel-splat-vector-dag-crash.ll | 3 ; This used to crash because SelectionDAG::isSplatValue did not set UndefElts
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| /llvm-project-15.0.7/llvm/include/llvm/Transforms/InstCombine/ |
| H A D | InstCombiner.h | 387 IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
525 SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &UndefElts,
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetTransformInfo.h | 191 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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| H A D | AMDGPUInstCombineIntrinsic.cpp | 1224 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.h | 110 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.h | 124 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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| H A D | ARMTargetTransformInfo.cpp | 254 APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, in simplifyDemandedVectorEltsIntrinsic() argument
270 SimplifyAndSetOp(&II, 0, OrigDemandedElts & DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
272 UndefElts &= APInt::getSplat(NumElts, !IsTop ? APInt::getLowBitsSet(2, 1) in simplifyDemandedVectorEltsIntrinsic()
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 585 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
1577 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
1964 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
1969 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in simplifyDemandedVectorEltsIntrinsic()
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| H A D | TargetTransformInfoImpl.h | 187 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 321 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
326 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in simplifyDemandedVectorEltsIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 2561 UndefElts = V.getOperand(0).isUndef() in isSplatValue()
2575 UndefElts = UndefLHS | UndefRHS; in isSplatValue()
2599 UndefElts = APInt::getZero(NumElts); in isSplatValue()
2607 UndefElts.setBit(i); in isSplatValue()
2626 UndefElts.setBit(i); in isSplatValue()
2684 UndefElts = UndefSrcElts.trunc(NumElts); in isSplatValue()
2732 APInt UndefElts; in isSplatValue() local
2739 (AllowUndefs || !UndefElts); in isSplatValue()
2749 APInt UndefElts; in getSplatSourceVector() local
2755 if (isSplatValue(V, DemandedElts, UndefElts)) { in getSplatSourceVector()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 629 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
634 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in simplifyDemandedVectorEltsIntrinsic()
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