| /llvm-project-15.0.7/clang/test/CXX/temp/temp.spec/temp.expl.spec/ |
| H A D | p2.cpp | 21 namespace N0 { namespace 53 namespace N0 { namespace 84 N0::X0<void> test_X0; 90 namespace N0 { namespace 105 namespace N0 { namespace 116 namespace N0 { namespace 141 namespace N0 { namespace 174 N0::X0<int>::Inner inner1; 175 N0::X0<long>::Inner inner2; 180 namespace N0 { namespace [all …]
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| H A D | p2-0x.cpp | 17 namespace N0 { namespace 47 namespace N0 { namespace 78 N0::X0<void> test_X0; 84 namespace N0 { namespace 93 namespace N0 { namespace 100 using N0::v0; 137 namespace N0 { namespace 148 namespace N0 { namespace 173 namespace N0 { namespace 212 namespace N0 { namespace [all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1437 N0 = SExtPromoteOperand(N0, PVT); in PromoteIntShiftOp() 1439 N0 = ZExtPromoteOperand(N0, PVT); in PromoteIntShiftOp() 1441 N0 = PromoteOperand(N0, PVT, Replace); in PromoteIntShiftOp() 5003 N->getVTList(), N0, N0); in visitMULO() 6546 N0 = N0.getOperand(0); in MatchBSwapHWordLow() 7481 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N0.getOperand(1) && in MatchFunnelPosNeg() 11190 N0 = N0->getOperand(0); in visitSETCC() 12138 if (N0.getValueType() == MVT::i1 && isBitwiseNot(N0) && N0.hasOneUse() && in visitSIGN_EXTEND() 12890 N0 = N0.getOperand(0); in reduceLoadWidth() 14402 if (isFusedOp(N0) && N0->hasOneUse()) { in visitFSUBForFMACombine() [all …]
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| H A D | TargetLowering.cpp | 3888 if (N0.getOpcode() != ISD::AND || !N0.hasOneUse()) in optimizeSetCCByHoistingAndByConstFromLogicalShift() 4078 (N0.getOpcode() != ISD::FSHL && N0.getOpcode() != ISD::FSHR)) in foldSetCCWithFunnelShift() 4785 N0.getOpcode() == ISD::AND && N0.hasOneUse()) { in SimplifySetCC() 4838 return DAG.getSetCC(dl, VT, N0, N0, Cond); in SimplifySetCC() 4873 if (N0 == N1) { in SimplifySetCC() 5000 N0 = DAG.getNode(ISD::XOR, dl, OpVT, N0, N1); in SimplifySetCC() 5012 N0 = DAG.getNode(ISD::AND, dl, OpVT, N0, Temp); in SimplifySetCC() 5026 N0 = DAG.getNode(ISD::OR, dl, OpVT, N0, Temp); in SimplifySetCC() 5034 N0 = DAG.getNode(ExtendCode, dl, VT, N0); in SimplifySetCC() 5036 return N0; in SimplifySetCC() [all …]
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| /llvm-project-15.0.7/lldb/test/Shell/SymbolFile/PDB/ |
| H A D | ast-restore.test | 15 ENUM: namespace N0 { 29 GLOBAL: namespace N0 { 36 BASE: namespace N0 { 39 BASE: N0::N1::(anonymous namespace)::Enum m_e; 45 CLASS: namespace N0 { 47 CLASS: class Class : public N0::N1::Base { 57 CLASS-DAG: N0::N1::Class::Inner m_inner; 66 INNER: namespace N0 { 68 INNER: class Class : public N0::N1::Base { 79 TEMPLATE: struct Template<N0::N1::Class> { [all …]
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| H A D | expressions.test | 10 CHECK: (lldb) print N0::N1::sum(N0::N1::buf1, sizeof(N0::N1::buf1))
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | invert-variable-mask-in-masked-merge-scalar.ll | 11 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], [[Y:%.*]] 12 ; CHECK-NEXT: [[TMP1:%.*]] = and i4 [[N0]], [[M:%.*]] 41 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], 6 68 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[Y:%.*]], 6 121 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X]], [[Y]] 185 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[Y]], [[X]] 201 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], 6 215 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[Y:%.*]], 6 240 ; CHECK-NEXT: call void @use4(i4 [[N0]]) 255 ; CHECK-NEXT: [[N1:%.*]] = and i4 [[N0]], [[IM]] [all …]
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| H A D | invert-variable-mask-in-masked-merge-vector.ll | 11 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X:%.*]], [[Y:%.*]] 12 ; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i4> [[N0]], [[M:%.*]] 25 ; CHECK-NEXT: [[N0:%.*]] = xor <3 x i4> [[X:%.*]], [[Y:%.*]] 26 ; CHECK-NEXT: [[TMP1:%.*]] = and <3 x i4> [[N0]], [[M:%.*]] 191 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X]], [[Y]] 255 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[Y]], [[X]] 310 ; CHECK-NEXT: call void @use4(<2 x i4> [[N0]]) 325 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], [[IM]] 342 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], [[IM]] 344 ; CHECK-NEXT: call void @use4(<2 x i4> [[N0]]) [all …]
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| H A D | unfold-masked-merge-with-const-mask-scalar.ll | 214 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], [[Y:%.*]] 215 ; CHECK-NEXT: [[N1:%.*]] = and i4 [[N0]], -2 217 ; CHECK-NEXT: call void @use4(i4 [[N0]]) 229 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], [[Y:%.*]] 230 ; CHECK-NEXT: [[N1:%.*]] = and i4 [[N0]], -2 244 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], [[Y:%.*]] 245 ; CHECK-NEXT: [[N1:%.*]] = and i4 [[N0]], -2 247 ; CHECK-NEXT: call void @use4(i4 [[N0]]) 263 ; CHECK-NEXT: [[N0:%.*]] = xor i4 [[X:%.*]], [[Y:%.*]] 264 ; CHECK-NEXT: [[N1:%.*]] = and i4 [[N0]], [[M:%.*]] [all …]
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| H A D | unfold-masked-merge-with-const-mask-vector.ll | 275 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X:%.*]], [[Y:%.*]] 276 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], <i4 -2, i4 -2> 278 ; CHECK-NEXT: call void @use4(<2 x i4> [[N0]]) 290 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X:%.*]], [[Y:%.*]] 291 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], <i4 -2, i4 -2> 305 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X:%.*]], [[Y:%.*]] 306 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], <i4 -2, i4 -2> 308 ; CHECK-NEXT: call void @use4(<2 x i4> [[N0]]) 324 ; CHECK-NEXT: [[N0:%.*]] = xor <2 x i4> [[X:%.*]], [[Y:%.*]] 325 ; CHECK-NEXT: [[N1:%.*]] = and <2 x i4> [[N0]], [[M:%.*]] [all …]
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| /llvm-project-15.0.7/llvm/unittests/Transforms/Utils/ |
| H A D | ValueMapperTest.cpp | 76 MDNode *N0; // !0 = !{!1} in TEST() local 87 ASSERT_FALSE(N0->isResolved()); in TEST() 89 N0->resolveCycles(); in TEST() 90 ASSERT_TRUE(N0->isResolved()); in TEST() 99 EXPECT_NE(N0, MappedN0); in TEST() 202 auto *N0 = MDTuple::get(C, None); in TEST() local 203 auto *N1 = MDTuple::get(C, N0); in TEST() 208 EXPECT_EQ(N0, ValueMapper(VM).mapMetadata(*N0)); in TEST() 213 EXPECT_EQ(N0, *VM.getMappedMD(N0)); in TEST() 220 auto *N1 = MDTuple::get(C, N0); in TEST() [all …]
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| /llvm-project-15.0.7/lldb/test/Shell/SymbolFile/PDB/Inputs/ |
| H A D | ExpressionsTest.cpp | 1 namespace N0 { namespace 18 char result = N0::N1::sum(N0::N1::buf1, sizeof(N0::N1::buf1)); in main()
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| H A D | ExpressionsTest0.script | 4 print N0::N1::sum(N0::N1::buf1, sizeof(N0::N1::buf1))
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| H A D | AstRestoreTest.cpp | 1 namespace N0 { namespace 61 N0::N1::foo(); in main()
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| /llvm-project-15.0.7/llvm/unittests/IR/ |
| H A D | MDBuilderTest.cpp | 84 MDNode *N0 = MDHelper.createTBAANode("Node", R); in TEST_F() local 88 EXPECT_EQ(N0, N3); in TEST_F() 89 EXPECT_NE(N0, N1); in TEST_F() 90 EXPECT_NE(N0, N2); in TEST_F() 91 EXPECT_GE(N0->getNumOperands(), 2U); in TEST_F() 94 EXPECT_TRUE(isa<MDString>(N0->getOperand(0))); in TEST_F() 97 EXPECT_EQ(cast<MDString>(N0->getOperand(0))->getString(), "Node"); in TEST_F() 100 EXPECT_EQ(N0->getOperand(1), R); in TEST_F()
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| /llvm-project-15.0.7/openmp/libomptarget/test/mapping/ |
| H A D | map_back_race.cpp | 19 const int N0{32768}; in test_parallel_for__target() local 20 const float expected_value{N0}; in test_parallel_for__target() 23 for (int i0 = 0; i0 < N0; i0++) { in test_parallel_for__target()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 625 if (N0.getOpcode() != ISD::AND || !N0.hasOneUse() || in Select() 655 if (N0.getOpcode() != ISD::AND || !N0.hasOneUse() || in Select() 724 if (N0.getOpcode() != ISD::SIGN_EXTEND_INREG || !N0.hasOneUse()) in Select() 779 SDValue X = N0.getOperand(0); in Select() 941 if (N0.getOpcode() != ISD::AND || !isa<ConstantSDNode>(N0.getOperand(1))) in Select() 2031 SDValue N0 = N.getOperand(0); in selectSHXADDOp() local 2080 SDValue N0 = N.getOperand(0); in selectSHXADDOp() local 2081 if (N0.getOpcode() == ISD::AND && N0.hasOneUse() && in selectSHXADDOp() 2355 SDValue N0 = N->getOperand(0); in doPeepholeSExtW() local 2356 if (!N0.isMachineOpcode()) in doPeepholeSExtW() [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/Attributor/ |
| H A D | read_write_returned_arguments_scc.ll | 40 ; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree returned [[W0:%.… 42 ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree… 50 ; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree returned [[W0:%.… 69 ; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { 73 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null 89 ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL5]], [[IF_END]] ], [ [[N0]], [[IF_THEN… 94 ; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { 98 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null 114 ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL5]], [[IF_END]] ], [ [[N0]], [[IF_THEN… 234 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null [all …]
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| /llvm-project-15.0.7/openmp/libomptarget/test/offloading/ |
| H A D | taskloop_offload_nowait.cpp | 20 constexpr const int N0{2}; in main() local 22 constexpr const float expected_value{N0 * N1}; in main() 28 for (int i0 = 0; i0 < N0; i0++) { in main()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 511 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); in performORCombine() local 531 if (N0.getOpcode() == ISD::AND && in performORCombine() 532 (CN0 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) && in performORCombine() 553 if (N0.getOpcode() == ISD::AND && in performORCombine() 554 (CN0 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) && in performORCombine() 577 (CN0 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) && in performORCombine() 600 (CN0 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) && in performORCombine() 618 if (N0.getOpcode() == ISD::AND && in performORCombine() 619 (CN0 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) && in performORCombine() 684 std::swap(N0, N1); in performORCombine() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelDAGToDAG.cpp | 557 SDValue N0 = N.getOperand(0); in matchWrapper() local 568 if (auto *G = dyn_cast<GlobalAddressSDNode>(N0)) { in matchWrapper() 575 } else if (auto *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in matchWrapper() 586 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) { in matchWrapper() 588 } else if (auto *J = dyn_cast<JumpTableSDNode>(N0)) { in matchWrapper() 591 } else if (auto *BA = dyn_cast<BlockAddressSDNode>(N0)) { in matchWrapper() 611 if (auto *G = dyn_cast<GlobalAddressSDNode>(N0)) { in matchWrapper() 615 } else if (auto *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in matchWrapper() 623 } else if (auto *S = dyn_cast<MCSymbolSDNode>(N0)) { in matchWrapper() 625 } else if (auto *J = dyn_cast<JumpTableSDNode>(N0)) { in matchWrapper() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3802 if (N0->getOpcode() != ISD::SRL && N0->getOpcode() != ISD::SRA) in matchBEXTRFromAndImm() 4344 A = N0; in tryVPTERNLOG() 4390 if (A == N0) in tryVPTERNLOG() 4552 SDValue Src0 = N0; in tryVPTESTM() 4553 SDValue Src1 = N0; in tryVPTESTM() 4710 std::swap(N0, N1); in tryMatchBitSelect() 4988 if (N0.getOpcode() == ISD::SETCC && N0.hasOneUse() && in Select() 5586 if (N0.getOpcode() == ISD::AND && N0.hasOneUse()) { in Select() 5599 if (N0.getOpcode() == ISD::TRUNCATE && N0.hasOneUse()) in Select() 5600 N0 = N0.getOperand(0); in Select() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3321 N0 = N0.getOperand(0); in performMulCombine() 3329 N0 = DAG.getZExtOrTrunc(N0, DL, MVT::i32); in performMulCombine() 3333 N0 = DAG.getSExtOrTrunc(N0, DL, MVT::i32); in performMulCombine() 3362 N0 = N0.getOperand(0); in performMulLoHiCombine() 3370 N0 = DAG.getZExtOrTrunc(N0, DL, MVT::i32); in performMulLoHiCombine() 3375 N0 = DAG.getSExtOrTrunc(N0, DL, MVT::i32); in performMulLoHiCombine() 3414 N0 = DAG.getSExtOrTrunc(N0, DL, MVT::i32); in performMulhsCombine() 3447 N0 = DAG.getZExtOrTrunc(N0, DL, MVT::i32); in performMulhuCombine() 3706 if (N0.hasOneUse()) { in performFNegCombine() 3740 if (!N0.hasOneUse()) in performFNegCombine() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-2013-01-13-ffast-fcmp.ll | 14 define <4 x i32> @_Z9example25v( <4 x float> %N0, <4 x float> %N1) { 15 %A = fcmp olt <4 x float> %N0, %N1
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 140 SDValue N0 = N.getOperand(0); in MatchWrapper() local 142 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper() 146 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper() 151 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper() 154 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper() 158 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
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