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Searched refs:LiveIn (Results 1 – 25 of 31) sorted by relevance

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/llvm-project-15.0.7/llvm/tools/llvm-objdump/
H A DSourcePrinter.cpp158 ActiveCols[ColIdx].LiveIn = LV.liveAtAddress(ThisAddr); in update()
162 << ColIdx << ": LiveIn=" << ActiveCols[ColIdx].LiveIn in update()
165 if (!ActiveCols[ColIdx].LiveIn && !ActiveCols[ColIdx].LiveOut) in update()
177 bool LiveIn = LV.liveAtAddress(ThisAddr); in update() local
179 if (!LiveIn && !LiveOut) in update()
185 << ColIdx << ": LiveIn=" << LiveIn in update()
188 ActiveCols[ColIdx].LiveIn = LiveIn; in update()
238 (!AfterInst && ActiveCols[ColIdx].LiveIn)) in printAfterOtherLine()
294 if (ActiveCols[ColIdx2].isActive() && ActiveCols[ColIdx2].LiveIn) in printBetweenInsts()
325 else if (ActiveCols[ColIdx].LiveIn && ActiveCols[ColIdx].LiveOut) in printAfterInst()
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H A DSourcePrinter.h47 bool LiveIn = false; member
/llvm-project-15.0.7/mlir/test/Analysis/
H A Dtest-liveness.mlir6 // CHECK-NEXT: LiveIn:{{ *$}}
20 // CHECK-NEXT: LiveIn:{{ *$}}
53 // CHECK-NEXT: LiveIn:{{ *$}}
105 // CHECK-NEXT: LiveIn:{{ *$}}
117 // CHECK-NEXT: LiveIn: arg1@0
162 // CHECK-NEXT: LiveIn: arg1@0
179 // CHECK-NEXT: LiveIn:{{ *$}}
280 // CHECK-NEXT: LiveIn: arg2@0
301 // CHECK-NEXT: LiveIn:{{ *$}}
355 // CHECK-NEXT: LiveIn:{{ *$}}
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/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCMachineFunctionInfo.cpp62 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInSExt() local
63 if (LiveIn.first == VReg) in isLiveInSExt()
64 return LiveIn.second.isSExt(); in isLiveInSExt()
69 for (const std::pair<Register, ISD::ArgFlagsTy> &LiveIn : LiveInAttrs) in isLiveInZExt() local
70 if (LiveIn.first == VReg) in isLiveInZExt()
71 return LiveIn.second.isZExt(); in isLiveInZExt()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLiveRangeCalc.cpp59 LiveIn.clear(); in reset()
64 for (const LiveInBlock &I : LiveIn) { in updateFromLiveIns()
84 LiveIn.clear(); in updateFromLiveIns()
268 LiveIn.clear(); in findReachingDefs()
311 LiveIn.reserve(WorkList.size()); in findReachingDefs()
319 LiveIn.back().Kill = Use; in findReachingDefs()
337 for (LiveInBlock &I : LiveIn) { in updateSSA()
H A DRDFLiveness.cpp857 RefMap LiveIn; in computeLiveIns() local
858 traverse(&MF.front(), LiveIn); in computeLiveIns()
927 BitVector LiveIn(TRI.getNumRegs()), Live(TRI.getNumRegs()); in resetKills() local
928 CopyLiveIns(B, LiveIn); in resetKills()
980 void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) { in traverse() argument
1028 LiveIn[S.first].insert(S.second.begin(), S.second.end()); in traverse()
1043 RefMap LiveInCopy = LiveIn; in traverse()
1044 LiveIn.clear(); in traverse()
1048 NodeRefSet &NewDefs = LiveIn[LRef.Reg]; // To be filled. in traverse()
1112 emptify(LiveIn); in traverse()
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H A DStackColoring.cpp424 BitVector LiveIn; member
578 dumpBV("LIVE_IN", BlockInfo.LiveIn); in dumpBB()
842 if (LocalLiveIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
844 BlockInfo.LiveIn |= LocalLiveIn; in calculateLocalLiveness()
872 for (int pos = MBBLiveness.LiveIn.find_first(); pos != -1; in calculateLiveIntervals()
873 pos = MBBLiveness.LiveIn.find_next(pos)) { in calculateLiveIntervals()
H A DSplitKit.cpp239 BI.LiveIn = LVI->start <= Start; in calcLiveBlockInfo()
242 if (!BI.LiveIn) { in calcLiveBlockInfo()
269 BI.LiveIn = false; in calcLiveBlockInfo()
1585 if (BI.LiveIn && BI.LiveOut) in shouldSplitSingleBlock()
1735 assert(BI.LiveIn && "Must be live-in"); in splitRegInBlock()
1825 << (BI.LiveIn ? ", stack-in" : ", defined in block")); in splitRegOutBlock()
1833 if (!BI.LiveIn && (!EnterAfter || EnterAfter <= BI.FirstInstr)) { in splitRegOutBlock()
1882 << (LiveIn ? "live in" : "dead in") << ", " in print()
H A DRegAllocGreedy.cpp580 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()
594 if (BI.LiveIn) { in addSplitConstraints()
806 if (BI.LiveIn && BI.LiveOut && BI.FirstDef) in calcSpillCost()
830 if (BI.LiveIn) in calcGlobalSplitCost()
891 if (BI.LiveIn) { in splitAroundRegion()
1311 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr; in calcGapWeights()
1493 const bool LiveBefore = SplitBefore != 0 || BI.LiveIn; in tryLocalSplit()
1586 bool LiveBefore = BestBefore != 0 || BI.LiveIn; in tryLocalSplit()
H A DMachineCSE.cpp708 auto LiveIn = PhysDefs.pop_back_val(); in ProcessBlockCSE() local
709 if (!MBB->isLiveIn(LiveIn.second)) in ProcessBlockCSE()
710 MBB->addLiveIn(LiveIn.second); in ProcessBlockCSE()
H A DBranchRelaxation.cpp454 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) in fixupUnconditionalBranch() local
455 BranchBB->addLiveIn(LiveIn); in fixupUnconditionalBranch()
H A DRegisterPressure.cpp918 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; in advance() local
919 if (LiveIn.any()) { in advance()
920 discoverLiveIn(RegisterMaskPair(Reg, LiveIn)); in advance()
921 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); in advance()
922 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn)); in advance()
H A DMIRPrinter.cpp323 yaml::MachineFunctionLiveIn LiveIn; in convert() local
324 printRegMIR(LI.first, LiveIn.Register, TRI); in convert()
326 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI); in convert()
327 MF.LiveIns.push_back(LiveIn); in convert()
H A DSplitKit.h127 bool LiveIn; ///< Current reg is live in. member
H A DMachineBasicBlock.cpp610 bool LiveIn = isLiveIn(PhysReg); in addLiveIn() local
616 if (LiveIn) in addLiveIn()
629 if (!LiveIn) in addLiveIn()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h125 SmallVector<LiveInBlock, 16> LiveIn; variable
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DRDFLiveness.h161 void traverse(MachineBasicBlock *B, RefMap &LiveIn);
H A DMIRYamlMapping.h223 static void mapping(IO &YamlIO, MachineFunctionLiveIn &LiveIn) {
224 YamlIO.mapRequired("reg", LiveIn.Register);
226 "virtual-reg", LiveIn.VirtualRegister,
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DSnippetRepetitor.cpp89 for (const auto &LiveIn : Entry.MBB->liveins()) in Repeat() local
90 Loop.MBB->addLiveIn(LiveIn); in Repeat()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DStackLifetime.cpp215 if (LocalLiveIn.test(BlockInfo.LiveIn)) { in calculateLocalLiveness()
216 BlockInfo.LiveIn |= LocalLiveIn; in calculateLocalLiveness()
243 if (BlockInfo.LiveIn.test(AllocaNo)) { in calculateLiveIntervals()
290 << ", livein " << BlockInfo.LiveIn << ", liveout " in dumpBlockLiveness()
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DStackLifetime.h43 : Begin(Size), End(Size), LiveIn(Size), LiveOut(Size) {} in BlockLifetimeInfo()
52 BitVector LiveIn; member
/llvm-project-15.0.7/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp2455 DbgValue &LiveIn) { in vlocJoin() argument
2509 if (LiveIn.Kind != DbgValue::VPHI || LiveIn.BlockNo != MBB.getNumber()) { in vlocJoin()
2510 Changed = LiveIn != FirstVal; in vlocJoin()
2512 LiveIn = FirstVal; in vlocJoin()
2546 Changed = LiveIn != FirstVal; in vlocJoin()
2548 LiveIn = FirstVal; in vlocJoin()
2553 Changed = LiveIn != VPHI; in vlocJoin()
2555 LiveIn = VPHI; in vlocJoin()
2773 if (LiveIn->Kind == DbgValue::VPHI && LiveIn->BlockNo == (int)CurBB) { in buildVLocValueMap()
2783 LiveIn->ID = *ValueNum; in buildVLocValueMap()
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/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp719 Register LiveIn = MRI.getLiveInVirtReg(PhysReg); in getFunctionLiveInPhysReg() local
720 if (LiveIn) { in getFunctionLiveInPhysReg()
721 MachineInstr *Def = MRI.getVRegDef(LiveIn); in getFunctionLiveInPhysReg()
725 return LiveIn; in getFunctionLiveInPhysReg()
733 LiveIn = MF.addLiveIn(PhysReg, &RC); in getFunctionLiveInPhysReg()
735 MRI.setType(LiveIn, RegTy); in getFunctionLiveInPhysReg()
738 BuildMI(EntryMBB, EntryMBB.begin(), DL, TII.get(TargetOpcode::COPY), LiveIn) in getFunctionLiveInPhysReg()
742 return LiveIn; in getFunctionLiveInPhysReg()
/llvm-project-15.0.7/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp627 for (const auto &LiveIn : YamlMF.LiveIns) { in parseRegisterInfo() local
629 if (parseNamedRegisterReference(PFS, Reg, LiveIn.Register.Value, Error)) in parseRegisterInfo()
630 return error(Error, LiveIn.Register.SourceRange); in parseRegisterInfo()
632 if (!LiveIn.VirtualRegister.Value.empty()) { in parseRegisterInfo()
634 if (parseVirtualRegisterReference(PFS, Info, LiveIn.VirtualRegister.Value, in parseRegisterInfo()
636 return error(Error, LiveIn.VirtualRegister.SourceRange); in parseRegisterInfo()
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DRewriteStatepointsForGC.cpp243 MapVector<BasicBlock *, SetVector<Value *>> LiveIn; member
3171 checkBasicSSA(DT, Data.LiveIn[&BB], BB.getTerminator()); in checkBasicSSA()
3192 Data.LiveIn[&BB] = Data.LiveSet[&BB]; in computeLiveInValues()
3193 Data.LiveIn[&BB].set_union(Data.LiveOut[&BB]); in computeLiveInValues()
3194 Data.LiveIn[&BB].set_subtract(Data.KillSet[&BB]); in computeLiveInValues()
3195 if (!Data.LiveIn[&BB].empty()) in computeLiveInValues()
3208 assert(Data.LiveIn.count(Succ)); in computeLiveInValues()
3209 LiveOut.set_union(Data.LiveIn[Succ]); in computeLiveInValues()
3225 assert(Data.LiveIn.count(BB)); in computeLiveInValues()
3226 const SetVector<Value *> &OldLiveIn = Data.LiveIn[BB]; in computeLiveInValues()
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