| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | livevars-crash1.mir | 61 %5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0) 66 %8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr) 98 ; CHECK: %5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0) 103 ; CHECK: %8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr)
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| H A D | livevars-crash2.mir | 155 %5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0) 160 %8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr) 192 ; CHECK: %5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0) 197 ; CHECK: %8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr)
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| H A D | aix-cc-byval.ll | 34 ; 32BIT-NEXT: renamable $r3 = LBZ 0, killed renamable $r[[REG]] :: (load (s8)) 84 ; 32BIT-NEXT: renamable $r3 = LBZ 0, %fixed-stack.0 :: (dereferenceable load (s8) 195 ; 32BIT-NEXT: renamable $r3 = LBZ 1, %fixed-stack.0 :: (dereferenceable load (s8) 238 ; 32BIT-DAG: renamable $r[[REG2:[0-9]+]] = LBZ 2, renamable $r[[REGADDR]] :: (load (s8)) 437 ; 64BIT-DAG: renamable $r[[SCRATCH1:[0-9]+]] = LBZ 3, %fixed-stack.2 :: (dereferenceable load (s… 477 ; 32BIT-DAG: renamable $r[[REG1:[0-9]+]] = LBZ 4, renamable $r[[REGADDR]] :: (load (s8)) 589 ; 32BIT-DAG: renamable $r[[REG2:[0-9]+]] = LBZ 6, renamable $r[[REGADDR]] :: (load (s8)) 763 ; 32BIT: renamable $r3 = LBZ 21, %fixed-stack.0 :: (dereferenceable load (s8) 825 ; 32BIT-DAG: renamable $r10 = LBZ 30, renamable $r[[REGADDR]] :: (load (s8))
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| H A D | aix-cc-byval-mem.ll | 58 ; 32BIT-NEXT: %[[VAL:[0-9]+]]:gprc = LBZ 0, %fixed-stack.0 158 ; 32BIT-NEXT: %[[VAL:[0-9]+]]:gprc = LBZ 255, %fixed-stack.0
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| H A D | aix-cc-abi.ll | 984 ; 32BIT-DAG: renamable $r[[REGC:[0-9]+]] = LBZ 0, killed renamable $r[[REGCADDR]] :: (dereferencea… 1494 ; 32BIT-DAG: renamable $r[[REGCH:[0-9]+]] = LBZ 0, killed renamable $r[[REGCHADDR]] :: (dereferen… 1508 ; 32BIT-DAG: renamable $r[[REGUC:[0-9]+]] = LBZ 0, killed renamable $r[[REGUCADDR]] :: (dereferen… 1659 ; 32BIT-DAG: renamable $r[[REGB:[0-9]+]] = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-stac… 1667 ; 64BIT-DAG: renamable $r[[REGB:[0-9]+]] = LBZ 0, %fixed-stack.0 :: (load (s8) from %fixed-st…
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| H A D | convert-rr-to-ri-instrs.mir | 2169 ; CHECK: LBZ 45, killed %6 2176 ; CHECK: LBZ 45, killed %11
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| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 5 PCREL_OPT(LBZ, PLBZ, OPC_AND_RST);
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| H A D | PPC64.cpp | 43 LBZ = 34, enumerator 70 LBZ = 0x88000000, enumerator 830 return LBZ; in getPPCDFormOp()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.def | 42 FUSION_OP_SET(LD, LBZ, LBZ8, LHZ, LHZ8, LWZ, LWZ8)) 97 FUSION_OP_SET(LBZ, LBZ8, LBZX, LBZX8, LBZXTLS, LBZXTLS_,
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| H A D | PPCPreEmitPeephole.cpp | 60 case PPC::LBZ: in hasPCRelativeForm()
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| H A D | PPCFastISel.cpp | 478 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad() 555 case PPC::LBZ: Opc = PPC::LBZX; break; in PPCEmitLoad()
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| H A D | PPCMIPeephole.cpp | 214 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
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| H A D | PPCInstrInfo.cpp | 4136 case PPC::LBZX: III.ImmOpcode = PPC::LBZ; break; in instrHasImmForm() 5141 Opcode == PPC::LHAX8 || Opcode == PPC::LBZ || Opcode == PPC::LBZX || in isSignExtendingOp() 5212 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || Opcode == PPC::LBZ || in isZeroExtendingOp()
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| H A D | PPCRegisterInfo.cpp | 104 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; in PPCRegisterInfo()
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| H A D | P10InstrResources.td | 1283 LBZ, LBZ8,
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| H A D | P9InstrResources.td | 743 (instregex "LBZ(CIX|8|X|X8|XTLS|XTLS_32)?(_)?$"),
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| H A D | PPCInstrInfo.td | 1792 def LBZ : DForm_1<34, (outs gprc:$rD), (ins memri:$src), 3187 (LBZ DForm:$src)>; 3191 (LBZ DForm:$src)>; 3195 (LBZ DForm:$src)>; 4842 def : Pat<(atomic_load_8 DForm:$src), (LBZ memri:$src)>;
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| H A D | PPCISelDAGToDAG.cpp | 7310 case PPC::LBZ: in PeepholePPC64()
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