| /llvm-project-15.0.7/llvm/include/llvm/Support/ |
| H A D | ScaledNumber.h | 438 static int64_t joinSigned(uint64_t U, bool IsNeg) { in joinSigned() argument 440 return IsNeg ? INT64_MIN : INT64_MAX; in joinSigned() 441 return IsNeg ? -int64_t(U) : int64_t(U); in joinSigned()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | AsmWriterEmitter.cpp | 1015 bool IsNeg = false; in EmitPrintAliasInstruction() local 1021 IsNeg = true; in EmitPrintAliasInstruction() 1029 IsNeg ? "Neg" : "", Namespace, Arg->getAsString()))); in EmitPrintAliasInstruction()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 378 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local 379 return SelectInst::Create(IsNeg, NegC, ConstantInt::getNullValue(Ty)); in visitMul() 389 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitMul() local 390 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitMul()
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| H A D | InstCombineAndOrXor.cpp | 2163 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local 2164 return SelectInst::Create(IsNeg, Y, ConstantInt::getNullValue(Ty)); in visitAnd() 2171 Value *IsNeg = Builder.CreateIsNeg(X, "isneg"); in visitAnd() local 2172 return SelectInst::Create(IsNeg, ConstantInt::getNullValue(Ty), Y); in visitAnd() 3384 Value *IsNeg = Builder.CreateIsNeg(A); in canonicalizeAbs() local 3389 return SelectInst::Create(IsNeg, NegA, A); in canonicalizeAbs()
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| H A D | InstCombineAddSub.cpp | 2174 Value *IsNeg = Builder.CreateIsNeg(A); in visitSub() local 2178 return SelectInst::Create(IsNeg, NegA, A); in visitSub()
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| H A D | InstCombineSelect.cpp | 1619 Value *IsNeg = Builder.CreateIsNeg(CmpLHS, ICI->getName()); in foldSelectInstWithICmp() local 1620 replaceOperand(SI, 0, IsNeg); in foldSelectInstWithICmp()
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| /llvm-project-15.0.7/llvm/lib/Frontend/OpenMP/ |
| H A D | OMPIRBuilder.cpp | 1975 Value *IsNeg = Builder.CreateICmpSLT(Step, Zero); in createCanonicalLoop() local 1976 Incr = Builder.CreateSelect(IsNeg, Builder.CreateNeg(Step), Step); in createCanonicalLoop() 1977 Value *LB = Builder.CreateSelect(IsNeg, Stop, Start); in createCanonicalLoop() 1978 Value *UB = Builder.CreateSelect(IsNeg, Start, Stop); in createCanonicalLoop()
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| /llvm-project-15.0.7/llvm/lib/MC/MCParser/ |
| H A D | AsmParser.cpp | 3257 bool IsNeg = false; in parseRealValue() local 3260 IsNeg = true; in parseRealValue() 3285 if (IsNeg) in parseRealValue()
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| H A D | MasmParser.cpp | 3833 bool IsNeg = false; in parseRealValue() local 3838 IsNeg = true; in parseRealValue() 3881 if (IsNeg) in parseRealValue()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyLibCalls.cpp | 2582 Value *IsNeg = B.CreateIsNeg(X); in optimizeAbs() local 2584 return B.CreateSelect(IsNeg, NegX, X); in optimizeAbs()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 17267 auto IsProfitable = [this](bool IsNeg, bool IsAddOne, EVT VT) -> bool { in combineMUL() argument 17290 return IsAddOne && IsNeg ? VT.isVector() : true; in combineMUL() 17298 bool IsNeg = MulAmt.isNegative(); in combineMUL() local 17305 if (!IsProfitable(IsNeg, true, VT)) in combineMUL() 17314 if (!IsNeg) in combineMUL() 17322 if (!IsProfitable(IsNeg, false, VT)) in combineMUL() 17330 if (!IsNeg) in combineMUL()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4384 bool IsNeg = StringRef(BLGPLoc.getPointer()).startswith("neg:"); in validateBLGP() local 4397 if (IsNeg == UsesNeg) in validateBLGP()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 20912 SDValue IsNeg = DAG.getSetCC(DL, MVT::v4i64, Src, Zero, ISD::SETLT); in lowerINT_TO_FP_vXi64() local 20913 SDValue SignSrc = DAG.getSelect(DL, MVT::v4i64, IsNeg, Sign, Src); in lowerINT_TO_FP_vXi64() 20940 IsNeg = DAG.getNode(ISD::TRUNCATE, DL, MVT::v4i32, IsNeg); in lowerINT_TO_FP_vXi64() 20941 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() 33004 SDValue IsNeg = DAG.getSetCC(dl, MVT::v2i64, Src, Zero, ISD::SETLT); in ReplaceNodeResults() local 33005 SDValue SignSrc = DAG.getSelect(dl, SrcVT, IsNeg, Sign, Src); in ReplaceNodeResults() 33028 IsNeg = DAG.getBitcast(MVT::v4i32, IsNeg); in ReplaceNodeResults() 33029 IsNeg = in ReplaceNodeResults() 33030 DAG.getVectorShuffle(MVT::v4i32, dl, IsNeg, IsNeg, {1, 3, -1, -1}); in ReplaceNodeResults() 33031 SDValue Cvt = DAG.getSelect(dl, MVT::v4f32, IsNeg, Slow, SignCvt); in ReplaceNodeResults()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 2615 Value *IsNeg = Builder.CreateICmpSLT(ArgValue, Zero, "isneg"); in EmitBuiltinExpr() local 2617 Value *Tmp = Builder.CreateSelect(IsNeg, Inverse, ArgValue); in EmitBuiltinExpr() 3265 Value *IsNeg = EmitSignBit(*this, Arg); in EmitBuiltinExpr() local 3271 Value *SignResult = Builder.CreateSelect(IsNeg, NegativeOne, One); in EmitBuiltinExpr()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 19233 bool IsNeg = false; in isLegalT2AddressImmediate() local 19235 IsNeg = true; in isLegalT2AddressImmediate() 19266 if (IsNeg) in isLegalT2AddressImmediate()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4433 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike() local 4434 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike()
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