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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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37502e04 |
| 22-Jul-2022 |
Sergei Barannikov <[email protected]> |
[clang][CodeGen] Only include ABIInfo.h where required (NFC)
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D130322
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4a782252 |
| 01-Jul-2022 |
Piotr Sobczak <[email protected]> |
[AMDGPU] Add WMMA clang builtins
Add WMMA clang builtins and tests. Extra changes in code are needed to handle function overloads.
WavefrontSize 32: __builtin_amdgcn_wmma_f32_16x16x16_f16_w32 __bui
[AMDGPU] Add WMMA clang builtins
Add WMMA clang builtins and tests. Extra changes in code are needed to handle function overloads.
WavefrontSize 32: __builtin_amdgcn_wmma_f32_16x16x16_f16_w32 __builtin_amdgcn_wmma_f32_16x16x16_bf16_w32 __builtin_amdgcn_wmma_f16_16x16x16_f16_w32 __builtin_amdgcn_wmma_bf16_16x16x16_bf16_w32 __builtin_amdgcn_wmma_i32_16x16x16_iu8_w32 __builtin_amdgcn_wmma_i32_16x16x16_iu4_w32
WavefrontSize 64: __builtin_amdgcn_wmma_f32_16x16x16_f16_w64 __builtin_amdgcn_wmma_f32_16x16x16_bf16_w64 __builtin_amdgcn_wmma_f16_16x16x16_f16_w64 __builtin_amdgcn_wmma_bf16_16x16x16_bf16_w64 __builtin_amdgcn_wmma_i32_16x16x16_iu8_w64 __builtin_amdgcn_wmma_i32_16x16x16_iu4_w64
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D128952
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016342e3 |
| 26-Jun-2022 |
Craig Topper <[email protected]> |
[RISCV] Evaluate ICE operands to builtins using getIntegerConstantExpr.
Some RISC-V builtins requires ICE operands. We should call getIntegerConstantExpr instead of EmitScalarExpr to match other tar
[RISCV] Evaluate ICE operands to builtins using getIntegerConstantExpr.
Some RISC-V builtins requires ICE operands. We should call getIntegerConstantExpr instead of EmitScalarExpr to match other targets.
This was made a little trickier by the vector intrinsics not having a valid type string, but there are two that have ICE operands so I specified them manually.
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d0a4450e |
| 22-Jun-2022 |
Guillaume Gomez <[email protected]> |
Rename GCCBuiltin into ClangBuiltin
This patch is needed because developers expect "GCCBuiltin" items to be the GCC intrinsics equivalent and not the Clang internals.
Reviewed By: #libc_abi, RKSimo
Rename GCCBuiltin into ClangBuiltin
This patch is needed because developers expect "GCCBuiltin" items to be the GCC intrinsics equivalent and not the Clang internals.
Reviewed By: #libc_abi, RKSimon, xbolva00
Differential Revision: https://reviews.llvm.org/D127460
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Revision tags: llvmorg-14.0.6 |
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6e070c3c |
| 17-Jun-2022 |
Pavel Iliin <[email protected]> |
[NFC] Specifing clang namespace for builtins.
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dba2ff50 |
| 16-Jun-2022 |
Lei Huang <[email protected]> |
fix x86 sanitizer failure due to use of or
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a9ddb7d5 |
| 16-Jun-2022 |
Maryam Moghadas <[email protected]> |
[PowerPC] Fixing implicit castings in altivec for -fno-lax-vector-conversions
XL considers different vector types to be incompatible with each other. For example assignment between variables of type
[PowerPC] Fixing implicit castings in altivec for -fno-lax-vector-conversions
XL considers different vector types to be incompatible with each other. For example assignment between variables of types vector float and vector long long or even vector signed int and vector unsigned int are diagnosed. clang, however does not diagnose such cases and does a simple bitcast between the two types. This could easily result in program errors. This patch is to fix the implicit casts in altivec.h so that there is no incompatible vector type errors whit -fno-lax-vector-conversions, this is the prerequisite patch to switch the default to -fno-lax-vector-conversions later.
Reviewed By: nemanjai, amyk
Differential Revision: https://reviews.llvm.org/D124093
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Revision tags: llvmorg-14.0.5 |
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38637ee4 |
| 07-Jun-2022 |
Guillaume Chatelet <[email protected]> |
[clang] Add support for __builtin_memset_inline
In the same spirit as D73543 and in reply to https://reviews.llvm.org/D126768#3549920 this patch is adding support for `__builtin_memset_inline`.
The
[clang] Add support for __builtin_memset_inline
In the same spirit as D73543 and in reply to https://reviews.llvm.org/D126768#3549920 this patch is adding support for `__builtin_memset_inline`.
The idea is to get support from the compiler to easily write efficient memory function implementations.
This patch could be split in two: - one for the LLVM part adding the `llvm.memset.inline.*` intrinsics. - and another one for the Clang part providing the instrinsic as a builtin.
Differential Revision: https://reviews.llvm.org/D126903
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aff679a4 |
| 08-Jun-2022 |
Thomas Lively <[email protected]> |
[WebAssembly] Implement remaining relaxed SIMD instructions
Add codegen, intrinsics, and builtins for the i16x8.relaxed_q15mulr_s, i16x8.dot_i8x16_i7x16_s, and i32x4.dot_i8x16_i7x16_add_s instructio
[WebAssembly] Implement remaining relaxed SIMD instructions
Add codegen, intrinsics, and builtins for the i16x8.relaxed_q15mulr_s, i16x8.dot_i8x16_i7x16_s, and i32x4.dot_i8x16_i7x16_add_s instructions. These are the last instructions from the relaxed SIMD proposal[1] that had not been implemented.
[1]: https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md.
Differential Revision: https://reviews.llvm.org/D127170
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Revision tags: llvmorg-14.0.4 |
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f730749e |
| 19-May-2022 |
Martin Storsjö <[email protected]> |
[clang] [ARM] Add __builtin_sponentry like on aarch64
This is used for calling the SEH aware setjmp on MinGW.
Differential Revision: https://reviews.llvm.org/D126764
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4f1e64b5 |
| 23-May-2022 |
Stephen Long <[email protected]> |
[MSVC, ARM64] Add __readx18 intrinsics
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
unsigned char __readx18byte(unsigned long) unsigned short __readx18word(uns
[MSVC, ARM64] Add __readx18 intrinsics
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
unsigned char __readx18byte(unsigned long) unsigned short __readx18word(unsigned long) unsigned long __readx18dword(unsigned long) unsigned __int64 __readx18qword(unsigned long)
Given the lack of documentation of the intrinsics, we chose to align the offset with just `CharUnits::One()` when calling `IRBuilderBase::CreateAlignedLoad()`
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D126024
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3e0be561 |
| 23-May-2022 |
Stephen Long <[email protected]> |
[MSVC, ARM64] Add __writex18 intrinsics
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
void __writex18byte(unsigned long, unsigned char) void __writex18word(unsi
[MSVC, ARM64] Add __writex18 intrinsics
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
void __writex18byte(unsigned long, unsigned char) void __writex18word(unsigned long, unsigned short) void __writex18dword(unsigned long, unsigned long) void __writex18qword(unsigned long, unsigned __int64)
Given the lack of documentation of the intrinsics, we chose to align the offset with just `CharUnits::One()` when calling `IRBuilderBase::CreateAlignedStore()`.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D126023
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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6bec3e93 |
| 06-Oct-2021 |
Jay Foad <[email protected]> |
[APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf
Most clients only used these methods because they wanted to be able to extend or truncate to the same bit width (which is a no-op).
[APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf
Most clients only used these methods because they wanted to be able to extend or truncate to the same bit width (which is a no-op). Now that the standard zext, sext and trunc allow this, there is no reason to use the OrSelf versions.
The OrSelf versions additionally have the strange behaviour of allowing extending to a *smaller* width, or truncating to a *larger* width, which are also treated as no-ops. A small amount of client code relied on this (ConstantRange::castOp and MicrosoftCXXNameMangler::mangleNumber) and needed rewriting.
Differential Revision: https://reviews.llvm.org/D125557
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ec6024d0 |
| 09-May-2022 |
Simon Pilgrim <[email protected]> |
[X86] Replace avx512f integer mul reduction builtins with generic builtin
D117829 added the generic "__builtin_reduce_mul" which we can use to replace the x86 specific integer mul reduction builtins
[X86] Replace avx512f integer mul reduction builtins with generic builtin
D117829 added the generic "__builtin_reduce_mul" which we can use to replace the x86 specific integer mul reduction builtins - internally these were mapping to the same intrinsic already so there are no test changes required.
Differential Revision: https://reviews.llvm.org/D125222
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8a92c45e |
| 09-May-2022 |
Simon Pilgrim <[email protected]> |
[Clang] Add integer mul reduction builtin
Similar to the existing bitwise reduction builtins, this lowers to a llvm.vector.reduce.mul intrinsic call.
For other reductions, we've tried to share buil
[Clang] Add integer mul reduction builtin
Similar to the existing bitwise reduction builtins, this lowers to a llvm.vector.reduce.mul intrinsic call.
For other reductions, we've tried to share builtins for float/integer vectors, but the fmul reduction intrinsic also take a starting value argument and can either do unordered or serialized, but not reduction-trees as specified for the builtins. However we address fmul support this shouldn't affect the integer case.
Differential Revision: https://reviews.llvm.org/D117829
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c4f95ef8 |
| 05-May-2022 |
Richard Smith <[email protected]> |
Reimplement `__builtin_dump_struct` in Sema.
Compared to the old implementation:
* In C++, we only recurse into aggregate classes. * Unnamed bit-fields are not printed. * Constant evaluation is sup
Reimplement `__builtin_dump_struct` in Sema.
Compared to the old implementation:
* In C++, we only recurse into aggregate classes. * Unnamed bit-fields are not printed. * Constant evaluation is supported. * Proper conversion is done when passing arguments through `...`. * Additional arguments are supported and are injected prior to the format string; this directly supports use with `fprintf`, for example. * An arbitrary callable can be passed rather than only a function pointer. In particular, in C++, a function template or overload set is acceptable. * All text generated by Clang is printed via `%s` rather than directly; this avoids issues where Clang's pretty-printing output might itself contain a `%` character. * Fields of types that we don't know how to print are printed with a `"*%p"` format and passed by address to the print function. * No return value is produced.
Reviewed By: aaron.ballman, erichkeane, yihanaa
Differential Revision: https://reviews.llvm.org/D124221
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9a14c369 |
| 02-May-2022 |
Simon Pilgrim <[email protected]> |
[X86] Replace avx512f integer add reduction builtins with generic builtin
D124741 added the generic "__builtin_reduce_add" which we can use to replace the x86 specific integer add reduction builtins
[X86] Replace avx512f integer add reduction builtins with generic builtin
D124741 added the generic "__builtin_reduce_add" which we can use to replace the x86 specific integer add reduction builtins - internally these were mapping to the same intrinsic already so there are no test changes required.
Differential Revision: https://reviews.llvm.org/D124757
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a23291b7 |
| 02-May-2022 |
Simon Pilgrim <[email protected]> |
[Clang] Add integer add reduction builtin
Similar to the existing bitwise reduction builtins, this lowers to a llvm.vector.reduce.add intrinsic call.
For other reductions, we've tried to share buil
[Clang] Add integer add reduction builtin
Similar to the existing bitwise reduction builtins, this lowers to a llvm.vector.reduce.add intrinsic call.
For other reductions, we've tried to share builtins for float/integer vectors, but the fadd reduction intrinsics also take a starting value argument and can either do unordered or serialized, but not reduction-trees as specified for the builtins. However we address fadd support this shouldn't affect the integer case.
(Split off from D117829)
Differential Revision: https://reviews.llvm.org/D124741
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19978e08 |
| 28-Apr-2022 |
joker881 <[email protected]> |
[RISCV]Add CTZ Intrinsic for ZBB in Clang
Add Intrinsics and test for B extension (updating coming soon (:
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D124348
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eaca933c |
| 29-Apr-2022 |
jonasyhwang <[email protected]> |
[Clang][CodeGen]Fix __builtin_dump_struct missing record type field name
Thanks for @rsmith to point this. I'm sorry for introducing this bug. See @rsmith 's comment in https://reviews.llvm.org/D122
[Clang][CodeGen]Fix __builtin_dump_struct missing record type field name
Thanks for @rsmith to point this. I'm sorry for introducing this bug. See @rsmith 's comment in https://reviews.llvm.org/D122248 Eg:(By @rsmith ) https://godbolt.org/z/o7vcbWaEf I have added a test case struct: ``` struct U19A { int a; }; struct U19B { struct U19A a; };
struct U19B a = { .a.a = 2022 }; ``` Dump result: ``` struct U19B { struct U19A a = { int a = 2022 } } ```
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D122920
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9727c77d |
| 25-Apr-2022 |
David Green <[email protected]> |
[NFC] Rename Instrinsic to Intrinsic
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72315d02 |
| 21-Apr-2022 |
Richard Smith <[email protected]> |
Treat `std::move`, `forward`, etc. as builtins.
This is extended to all `std::` functions that take a reference to a value and return a reference (or pointer) to that same value: `move`, `forward`,
Treat `std::move`, `forward`, etc. as builtins.
This is extended to all `std::` functions that take a reference to a value and return a reference (or pointer) to that same value: `move`, `forward`, `move_if_noexcept`, `as_const`, `addressof`, and the libstdc++-specific function `__addressof`.
We still require these functions to be declared before they can be used, but don't instantiate their definitions unless their addresses are taken. Instead, code generation, constant evaluation, and static analysis are given direct knowledge of their effect.
This change aims to reduce various costs associated with these functions -- per-instantiation memory costs, compile time and memory costs due to creating out-of-line copies and inlining them, code size at -O0, and so on -- so that they are not substantially more expensive than a cast. Most of these improvements are very small, but I measured a 3% decrease in -O0 object file size for a simple C++ source file using the standard library after this change.
We now automatically infer the `const` and `nothrow` attributes on these now-builtin functions, in particular meaning that we get a warning for an unused call to one of these functions.
In C++20 onwards, we disallow taking the addresses of these functions, per the C++20 "addressable function" rule. In earlier language modes, a compatibility warning is produced but the address can still be taken.
The same infrastructure is extended to the existing MSVC builtin `__GetExceptionInfo`, which is now only recognized in namespace `std` like it always should have been.
This is a re-commit of fc3090109643af8d2da9822d0f99c84742b9c877, a571f82a50416b767fd3cce0fb5027bb5dfec58c, 64c045e25b8471bbb572bd29159c294a82a86a2, and de6ddaeef3aaa8a9ae3663c12cdb57d9afc0f906, and reverts aa643f455a5362de7189eac630050d2c8aefe8f2. This change also includes a workaround for users using libc++ 3.1 and earlier (!!), as apparently happens on AIX, where std::move sometimes returns by value.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D123345
Revert "Fixup D123950 to address revert of D123345"
This reverts commit aa643f455a5362de7189eac630050d2c8aefe8f2.
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98d911e0 |
| 20-Apr-2022 |
David Tenty <[email protected]> |
Revert "Treat `std::move`, `forward`, etc. as builtins."
This reverts commit b27430f9f46b88bcd54d992debc8d72e131e1bd0 as the parent https://reviews.llvm.org/D123345 breaks the AIX CI:
https
Revert "Treat `std::move`, `forward`, etc. as builtins."
This reverts commit b27430f9f46b88bcd54d992debc8d72e131e1bd0 as the parent https://reviews.llvm.org/D123345 breaks the AIX CI:
https://lab.llvm.org/buildbot/#/builders/214/builds/819
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38612fbc |
| 15-Apr-2022 |
Pengxuan Zheng <[email protected]> |
Reland "[COFF, ARM64] Add __break intrinsic"
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
Reland after fixing the test failure. The failure was due to conflict wit
Reland "[COFF, ARM64] Add __break intrinsic"
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170
Reland after fixing the test failure. The failure was due to conflict with a change (D122983) which was merged right before this patch.
Reviewed By: rnk, mstorsjo
Differential Revision: https://reviews.llvm.org/D124032
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bff8356b |
| 20-Apr-2022 |
Pengxuan Zheng <[email protected]> |
Revert "[COFF, ARM64] Add __break intrinsic"
This reverts commit 8a9b4fb4aa6d2dde026d9ae08459aa9e7a1edb05.
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